From: Vignesh Raghavendra <vigneshr@ti.com>
To: <Tudor.Ambarus@microchip.com>, <boris.brezillon@collabora.com>
Cc: richard@nod.at, linux-mtd@lists.infradead.org,
linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com
Subject: Re: [PATCH v4 08/20] mtd: spi-nor: Describe all the Reg Ops
Date: Tue, 5 Nov 2019 17:51:49 +0530 [thread overview]
Message-ID: <2db8722f-d4ea-b230-8729-f02cc95e23b2@ti.com> (raw)
In-Reply-To: <20191102112316.20715-9-tudor.ambarus@microchip.com>
On 02/11/19 4:53 PM, Tudor.Ambarus@microchip.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> Document all the Register Operations.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Regards
Vignesh
> ---
> drivers/mtd/spi-nor/spi-nor.c | 138 ++++++++++++++++++++++++++++++++++++++----
> 1 file changed, 127 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 857675a4e329..99a9a6aba41d 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -388,9 +388,11 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
> return nor->controller_ops->write(nor, to, len, buf);
> }
>
> -/*
> - * Set write enable latch with Write Enable command.
> - * Returns negative if error occurred.
> +/**
> + * spi_nor_write_enable() - Set write enable latch with Write Enable command.
> + * @nor: pointer to 'struct spi_nor'.
> + *
> + * Return: 0 on success, -errno otherwise.
> */
> static int spi_nor_write_enable(struct spi_nor *nor)
> {
> @@ -415,8 +417,11 @@ static int spi_nor_write_enable(struct spi_nor *nor)
> return ret;
> }
>
> -/*
> - * Send write disable instruction to the chip.
> +/**
> + * spi_nor_write_disable() - Send Write Disable instruction to the chip.
> + * @nor: pointer to 'struct spi_nor'.
> + *
> + * Return: 0 on success, -errno otherwise.
> */
> static int spi_nor_write_disable(struct spi_nor *nor)
> {
> @@ -534,6 +539,14 @@ static int spi_nor_read_cr(struct spi_nor *nor, u8 *cr)
> return ret;
> }
>
> +/**
> + * macronix_set_4byte() - Set 4-byte address mode for Macronix flashes.
> + * @nor: pointer to 'struct spi_nor'.
> + * @enable: true to enter the 4-byte address mode, false to exit the 4-byte
> + * address mode.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int macronix_set_4byte(struct spi_nor *nor, bool enable)
> {
> int ret;
> @@ -562,6 +575,14 @@ static int macronix_set_4byte(struct spi_nor *nor, bool enable)
> return ret;
> }
>
> +/**
> + * st_micron_set_4byte() - Set 4-byte address mode for ST and Micron flashes.
> + * @nor: pointer to 'struct spi_nor'.
> + * @enable: true to enter the 4-byte address mode, false to exit the 4-byte
> + * address mode.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int st_micron_set_4byte(struct spi_nor *nor, bool enable)
> {
> int ret;
> @@ -577,6 +598,14 @@ static int st_micron_set_4byte(struct spi_nor *nor, bool enable)
> return spi_nor_write_disable(nor);
> }
>
> +/**
> + * spansion_set_4byte() - Set 4-byte address mode for Spansion flashes.
> + * @nor: pointer to 'struct spi_nor'.
> + * @enable: true to enter the 4-byte address mode, false to exit the 4-byte
> + * address mode.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int spansion_set_4byte(struct spi_nor *nor, bool enable)
> {
> int ret;
> @@ -602,6 +631,13 @@ static int spansion_set_4byte(struct spi_nor *nor, bool enable)
> return ret;
> }
>
> +/**
> + * spi_nor_write_ear() - Write Extended Address Register.
> + * @nor: pointer to 'struct spi_nor'.
> + * @ear: value to write to the Extended Address Register.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int spi_nor_write_ear(struct spi_nor *nor, u8 ear)
> {
> int ret;
> @@ -627,6 +663,14 @@ static int spi_nor_write_ear(struct spi_nor *nor, u8 ear)
> return ret;
> }
>
> +/**
> + * winbond_set_4byte() - Set 4-byte address mode for Winbond flashes.
> + * @nor: pointer to 'struct spi_nor'.
> + * @enable: true to enter the 4-byte address mode, false to exit the 4-byte
> + * address mode.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int winbond_set_4byte(struct spi_nor *nor, bool enable)
> {
> int ret;
> @@ -651,6 +695,14 @@ static int winbond_set_4byte(struct spi_nor *nor, bool enable)
> return spi_nor_write_disable(nor);
> }
>
> +/**
> + * spi_nor_xread_sr() - Read the Status Register on S3AN flashes.
> + * @nor: pointer to 'struct spi_nor'.
> + * @sr: pointer to a DMA-able buffer where the value of the
> + * Status Register will be written.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
> {
> int ret;
> @@ -674,6 +726,13 @@ static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
> return ret;
> }
>
> +/**
> + * s3an_sr_ready() - Query the Status Register of the S3AN flash to see if the
> + * flash is ready for new commands.
> + * @nor: pointer to 'struct spi_nor'.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int s3an_sr_ready(struct spi_nor *nor)
> {
> int ret;
> @@ -685,6 +744,10 @@ static int s3an_sr_ready(struct spi_nor *nor)
> return !!(nor->bouncebuf[0] & XSR_RDY);
> }
>
> +/**
> + * spi_nor_clear_sr() - Clear the Status Register.
> + * @nor: pointer to 'struct spi_nor'.
> + */
> static void spi_nor_clear_sr(struct spi_nor *nor)
> {
> int ret;
> @@ -706,6 +769,13 @@ static void spi_nor_clear_sr(struct spi_nor *nor)
> dev_dbg(nor->dev, "error %d clearing SR\n", ret);
> }
>
> +/**
> + * spi_nor_sr_ready() - Query the Status Register to see if the flash is ready
> + * for new commands.
> + * @nor: pointer to 'struct spi_nor'.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int spi_nor_sr_ready(struct spi_nor *nor)
> {
> int ret = spi_nor_read_sr(nor, nor->bouncebuf);
> @@ -727,6 +797,10 @@ static int spi_nor_sr_ready(struct spi_nor *nor)
> return !(nor->bouncebuf[0] & SR_WIP);
> }
>
> +/**
> + * spi_nor_clear_fsr() - Clear the Flag Status Register.
> + * @nor: pointer to 'struct spi_nor'.
> + */
> static void spi_nor_clear_fsr(struct spi_nor *nor)
> {
> int ret;
> @@ -748,6 +822,13 @@ static void spi_nor_clear_fsr(struct spi_nor *nor)
> dev_dbg(nor->dev, "error %d clearing FSR\n", ret);
> }
>
> +/**
> + * spi_nor_fsr_ready() - Query the Flag Status Register to see if the flash is
> + * ready for new commands.
> + * @nor: pointer to 'struct spi_nor'.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int spi_nor_fsr_ready(struct spi_nor *nor)
> {
> int ret = spi_nor_read_fsr(nor, nor->bouncebuf);
> @@ -772,6 +853,12 @@ static int spi_nor_fsr_ready(struct spi_nor *nor)
> return nor->bouncebuf[0] & FSR_READY;
> }
>
> +/**
> + * spi_nor_ready() - Query the flash to see if it is ready for new commands.
> + * @nor: pointer to 'struct spi_nor'.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int spi_nor_ready(struct spi_nor *nor)
> {
> int sr, fsr;
> @@ -788,9 +875,13 @@ static int spi_nor_ready(struct spi_nor *nor)
> return sr && fsr;
> }
>
> -/*
> - * Service routine to read status register until ready, or timeout occurs.
> - * Returns non-zero if error.
> +/**
> + * spi_nor_wait_till_ready_with_timeout() - Service routine to read the
> + * Status Register until ready, or timeout occurs.
> + * @nor: pointer to "struct spi_nor".
> + * @timeout_jiffies: jiffies to wait until timeout.
> + *
> + * Return: 0 on success, -errno otherwise.
> */
> static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor,
> unsigned long timeout_jiffies)
> @@ -818,6 +909,13 @@ static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor,
> return -ETIMEDOUT;
> }
>
> +/**
> + * spi_nor_wait_till_ready() - Wait for a predefined amount of time for the
> + * flash to be ready, or timeout occurs.
> + * @nor: pointer to "struct spi_nor".
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int spi_nor_wait_till_ready(struct spi_nor *nor)
> {
> return spi_nor_wait_till_ready_with_timeout(nor,
> @@ -880,6 +978,14 @@ static int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 status_new,
> return ((nor->bouncebuf[0] & mask) != (status_new & mask)) ? -EIO : 0;
> }
>
> +/**
> + * spi_nor_write_sr2() - Write the Status Register 2 using the
> + * SPINOR_OP_WRSR2 (3eh) command.
> + * @nor: pointer to 'struct spi_nor'.
> + * @sr2: pointer to DMA-able buffer to write to the Status Register 2.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2)
> {
> int ret;
> @@ -909,6 +1015,15 @@ static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2)
> return spi_nor_wait_till_ready(nor);
> }
>
> +/**
> + * spi_nor_read_sr2() - Read the Status Register 2 using the
> + * SPINOR_OP_RDSR2 (3fh) command.
> + * @nor: pointer to 'struct spi_nor'.
> + * @sr2: pointer to DMA-able buffer where the value of the
> + * Status Register 2 will be written.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2)
> {
> int ret;
> @@ -932,10 +1047,11 @@ static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2)
> return ret;
> }
>
> -/*
> - * Erase the whole flash memory
> +/**
> + * spi_nor_erase_chip() - Erase the entire flash memory.
> + * @nor: pointer to 'struct spi_nor'.
> *
> - * Returns 0 if successful, non-zero otherwise.
> + * Return: 0 on success, -errno otherwise.
> */
> static int spi_nor_erase_chip(struct spi_nor *nor)
> {
>
--
Regards
Vignesh
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next prev parent reply other threads:[~2019-11-05 12:21 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-02 11:23 [PATCH v4 00/20] mtd: spi-nor: Quad Enable and (un)lock methods Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 01/20] mtd: spi-nor: Use dev_dbg insted of dev_err for low level info Tudor.Ambarus
2019-11-05 12:12 ` Vignesh Raghavendra
2019-11-06 7:07 ` Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 02/20] mtd: spi-nor: Print debug info inside Reg Ops methods Tudor.Ambarus
2019-11-05 12:13 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 03/20] mtd: spi-nor: Check for errors after each Register Operation Tudor.Ambarus
2019-11-06 9:19 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 04/20] mtd: spi-nor: Rename label as it is no longer generic Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 05/20] mtd: spi-nor: Void return type for spi_nor_clear_sr/fsr() Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 06/20] mtd: spi-nor: Move the WE and wait calls inside Write SR methods Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 07/20] mtd: spi-nor: Merge spi_nor_write_sr() and spi_nor_write_sr_cr() Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 08/20] mtd: spi-nor: Describe all the Reg Ops Tudor.Ambarus
2019-11-05 12:21 ` Vignesh Raghavendra [this message]
2019-11-02 11:23 ` [PATCH v4 09/20] mtd: spi-nor: Drop spansion_quad_enable() Tudor.Ambarus
2019-11-05 12:35 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 10/20] mtd: spi-nor: Fix errno on Quad Enable methods Tudor.Ambarus
2019-11-05 12:36 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 11/20] mtd: spi-nor: Check all the bits written, not just the BP ones Tudor.Ambarus
2019-11-05 12:21 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 12/20] mtd: spi-nor: Print debug message when the read back test fails Tudor.Ambarus
2019-11-05 12:37 ` Vignesh Raghavendra
2019-11-06 7:24 ` Tudor.Ambarus
2019-11-06 7:39 ` Vignesh Raghavendra
2019-11-07 5:58 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 13/20] mtd: spi-nor: Fix clearing of QE bit on lock()/unlock() Tudor.Ambarus
2019-11-05 17:07 ` Vignesh Raghavendra
2019-11-06 8:33 ` Tudor.Ambarus
2019-11-06 16:26 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 14/20] mtd: spi-nor: Extend the QE Read Back test to the entire SR byte Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 15/20] mtd: spi-nor: Extend the QE Read Back test to both SR1 and SR2 Tudor.Ambarus
2019-11-05 16:06 ` Vignesh Raghavendra
2019-11-06 8:41 ` Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 16/20] mtd: spi-nor: Rename CR_QUAD_EN_SPAN to SR2_QUAD_EN_BIT1 Tudor.Ambarus
2019-11-06 5:45 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 17/20] mtd: spi-nor: Merge spansion Quad Enable methods Tudor.Ambarus
2019-11-06 5:46 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 18/20] mtd: spi-nor: Rename macronix_quad_enable to spi_nor_sr1_bit6_quad_enable Tudor.Ambarus
2019-11-06 6:00 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 19/20] mtd: spi-nor: Prepend "spi_nor_" to "sr2_bit7_quad_enable" Tudor.Ambarus
2019-11-02 11:24 ` [PATCH v4 20/20] mtd: spi-nor: Rework the disabling of block write protection Tudor.Ambarus
2019-11-07 6:27 ` [PATCH v4 00/20] mtd: spi-nor: Quad Enable and (un)lock methods Tudor.Ambarus
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