[PATCH v4 00/20] usb: dwc3: add support for AMD Nolan SoC

[PATCH v4 00/20] usb: dwc3: add support for AMD Nolan SoC

[Huang Rui]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="yes", Size: 10085 bytes --]

Hi,

The series of patches add AMD Nolan (NL) SoC support for DesignWare USB3
OTG IP with PCI bus glue layer. This controller supported hibernation, LPM
erratum and used the 2.80a IP version and amd own phy. Current
implementation support both simulation and SoC platform. And already tested
with gadget zero and msc tool. It works well on file storage gadget.


These patches are generated on balbi/testing/next

Changes from v3 -> v4
- Add comment on hibernation patch
- Fix typos of commit log and comments
- Remove WARN_ON for temporary solution of FPGA board
- Rename tx deemph to tx de-emphasis
- Add documentation under Documentation/devicetree/bindings/usb/dwc3.txt
- Check FPGA flag on usb3 and usb2 suspend phy quirk
- Refine description of PCI quirk patch
- Remove amd_nl_plat flag at dwc3 structure
- Make HIRD threshold configurable

Changes from v2 -> v3
- Confirmed these quirks will be needed in product level
- Move AMD configuration patch to the last one with all quirk flags
- Make all quirks as 1-bit field instead of single-bits on a 32-bit
  variable
- Add all quirks DeviceTree counterparts
- Make LPM erratum configurable
- Add PCI ID into pci_ids.h because it will be used both on PCI and DWC3
  device driver.

Changes from v1 -> v2
- Remove dual role function temporarily
- Add pci quirk to avoid to bind with xhci driver
- Distinguish between simulation board and soc
- Break down all the special quirks


Patch 1:
- Enable hibernation

Patch 2:
- Distinguish between simulation board and SoC

Patch 3:
- Initialize platform data at pci glue layer

Patch 4 - 16:
- Break down all the special quirks

Patch 17:
- Add PCI device ID of AMD NL USB3 DRD

Patch 18:
- Prevent xHCI driver from claiming AMD NL USB3 DRD device

Patch 19:
- Add support AMD NL USB3 DRD for dwc3 driver

Patch 20:
- Make HIRD threshold configurable

Patch set already passed all the MSC testing on simulation board with low
clock frequency, so the speed will slower than true SoC. Detailed result
without verbose debug option is below:

root@hr-bak:/home/ray/felipe/usb-tools# ./msc.sh -o /dev/sdb1
Starting test suite: 2014年 10月 30日 星期四 15:42:32 CST
test 0a: simple 4k read/write
test  0: sent       3.91 MB read       7.43 MB/s write       6.45 MB/s ... success
test 0b: simple 8k read/write
test  0: sent       7.81 MB read      10.10 MB/s write       8.92 MB/s ... success
test 0c: simple 16k read/write
test  0: sent      15.62 MB read      15.22 MB/s write      12.02 MB/s ... success
test 0d: simple 32k read/write
test  0: sent      31.25 MB read      19.30 MB/s write      16.65 MB/s ... success
test 0e: simple 64k read/write
test  0: sent      62.50 MB read      22.43 MB/s write      16.04 MB/s ... success
test 1: simple 1-sector read/write
test  1: sent     500.00 kB read       1.27 MB/s write       1.04 MB/s ... success
test 2: simple 8-sectors read/write
test  2: sent       3.91 MB read       7.39 MB/s write       6.35 MB/s ... success
test 3: simple 32-sectors read/write
test  3: sent      15.62 MB read      15.26 MB/s write      12.42 MB/s ... success
test 4: simple 64-sectors read/write
test  4: sent      31.25 MB read      19.56 MB/s write      16.83 MB/s ... success
test 5a: scatter/gather for 2-sectors buflen 4k
test  5: sent    1000.00 kB read       2.53 MB/s write       1.89 MB/s ... success
test 5b: scatter/gather for 2-sectors buflen 8k
test  5: sent    1000.00 kB read       2.52 MB/s write       1.87 MB/s ... success
test 5c: scatter/gather for 2-sectors buflen 16k
test  5: sent    1000.00 kB read       2.53 MB/s write       1.85 MB/s ... success
test 5d: scatter/gather for 2-sectors buflen 32k
test  5: sent    1000.00 kB read       2.47 MB/s write       2.08 MB/s ... success
test 5e: scatter/gather for 2-sectors buflen 64k
test  5: sent    1000.00 kB read       2.48 MB/s write       2.09 MB/s ... success
test 6a: scatter/gather for 8-sectors buflen 4k
test  6: sent       3.91 MB read       7.05 MB/s write       6.31 MB/s ... success
test 6b: scatter/gather for 8-sectors buflen 8k
test  6: sent       3.91 MB read       7.43 MB/s write       6.39 MB/s ... success
test 6c: scatter/gather for 8-sectors buflen 16k
test  6: sent       3.91 MB read       7.66 MB/s write       6.27 MB/s ... success
test 6d: scatter/gather for 8-sectors buflen 32k
test  6: sent       3.91 MB read       7.71 MB/s write       6.30 MB/s ... success
test 6e: scatter/gather for 8-sectors buflen 64k
test  6: sent       3.91 MB read       7.38 MB/s write       6.46 MB/s ... success
test 7a: scatter/gather for 32-sectors buflen 16k
test  7: sent      15.62 MB read      14.56 MB/s write      11.90 MB/s ... success
test 7b: scatter/gather for 32-sectors buflen 32k
test  7: sent      15.62 MB read      15.16 MB/s write      12.02 MB/s ... success
test 7c: scatter/gather for 32-sectors buflen 64k
test  7: sent      15.62 MB read      15.29 MB/s write      12.03 MB/s ... success
test 8a: scatter/gather for 64-sectors buflen 32k
test  8: sent      31.25 MB read      19.48 MB/s write      16.62 MB/s ... success
test 8b: scatter/gather for 64-sectors buflen 64k
test  8: sent      31.25 MB read      19.62 MB/s write      16.71 MB/s ... success
test 9: scatter/gather for 128-sectors buflen 64k
test  9: sent      62.50 MB read      22.14 MB/s write      16.65 MB/s ... success
test 10: read over the end of the block device
test 10: sent      62.01 MB read       0.00 MB/s write       0.00 MB/s ... success
test 11: lseek past the end of the block device
test 11: sent       0.00 B read       0.00 MB/s write       0.00 MB/s ... success
test 12: write over the end of the block device
test 12: sent       0.00 B read       0.00 MB/s write       0.00 MB/s ... success
test 13: write 1 sg, read 8 random size sgs
test 13: sent      62.50 MB read      21.54 MB/s write      16.17 MB/s ... success
test 14: write 8 random size sgs, read 1 sg
test 14: sent      62.50 MB read      21.62 MB/s write      15.98 MB/s ... success
test 15: write and read 8 random size sgs
test 15: sent      62.50 MB read      22.00 MB/s write      16.53 MB/s ... success
test 16a: read with heap allocated buffer
test 16: sent      62.50 MB read      21.10 MB/s write       0.00 MB/s ... success
test 16b: read with stack allocated buffer
test 16: sent      62.50 MB read      21.28 MB/s write       0.00 MB/s ... success
test 17a: write with heap allocated buffer
test 17: sent       0.00 B read       0.00 MB/s write      20.29 MB/s ... success
test 17b: write with stack allocated buffer
test 17: sent       0.00 B read       0.00 MB/s write      20.34 MB/s ... success
test 18a: write 0x00 and read it back
test 18: sent      62.50 MB read      21.80 MB/s write      16.02 MB/s ... success
test 18b: write 0xff and read it back
test 18: sent      62.50 MB read      20.56 MB/s write      15.06 MB/s ... success
test 18c: write 0x55 and read it back
test 18: sent      62.50 MB read      21.68 MB/s write      15.94 MB/s ... success
test 18d: write 0xaa and read it back
test 18: sent      62.50 MB read      21.69 MB/s write      15.99 MB/s ... success
test 18e: write 0x11 and read it back
test 18: sent      62.50 MB read      21.59 MB/s write      15.97 MB/s ... success
test 18f: write 0x22 and read it back
test 18: sent      62.50 MB read      21.62 MB/s write      15.98 MB/s ... success
test 18g: write 0x44 and read it back
test 18: sent      62.50 MB read      21.42 MB/s write      16.09 MB/s ... success
test 18h: write 0x88 and read it back
test 18: sent      62.50 MB read      21.01 MB/s write      15.83 MB/s ... success
test 18i: write 0x33 and read it back
test 18: sent      62.50 MB read      21.42 MB/s write      16.06 MB/s ... success
test 18j: write 0x66 and read it back
test 18: sent      62.50 MB read      21.53 MB/s write      16.01 MB/s ... success
test 18k: write 0x99 and read it back
test 18: sent      62.50 MB read      21.39 MB/s write      16.03 MB/s ... success
test 18l: write 0xcc and read it back
test 18: sent      62.50 MB read      21.77 MB/s write      16.02 MB/s ... success
test 18m: write 0x77 and read it back
test 18: sent      62.50 MB read      21.99 MB/s write      16.09 MB/s ... success
test 18n: write 0xbb and read it back
test 18: sent      62.50 MB read      21.91 MB/s write      16.02 MB/s ... success
test 18o: write 0xdd and read it back
test 18: sent      62.50 MB read      21.17 MB/s write      15.90 MB/s ... success
test 18p: write 0xee and read it back
test 18: sent      62.50 MB read      21.93 MB/s write      16.05 MB/s ... success
Test suite ended: 2014年 10月 30日 星期四 15:46:12 CST

Thanks,
Rui

Huang Rui (20):
  usb: dwc3: enable hibernation if to be supported
  usb: dwc3: add a flag to check if it is FPGA board
  usb: dwc3: initialize platform data at pci glue layer
  usb: dwc3: add disable scramble quirk
  usb: dwc3: add lpm erratum support
  usb: dwc3: add U2Exit LFPS quirk
  usb: dwc3: add P3 in U2 SS Inactive quirk
  usb: dwc3: add request P1/P2/P3 quirk
  usb: dwc3: add delay P1/P2/P3 quirk
  usb: dwc3: add delay phy power change quirk
  usb: dwc3: add LFPS filter quirk
  usb: dwc3: add rx_detect to polling LFPS quirk
  usb: dwc3: set SUSPHY bit for all cores
  usb: dwc3: add Tx de-emphasis quirk
  usb: dwc3: add disable usb3 suspend phy quirk
  usb: dwc3: add disable usb2 suspend phy quirk
  PCI: Add support for AMD Nolan USB3 DRD
  PCI: Prevent xHCI driver from claiming AMD Nolan USB3 DRD device
  usb: dwc3: add support for AMD Nolan platform
  usb: dwc3: make HIRD threshold configurable

 Documentation/devicetree/bindings/usb/dwc3.txt |  23 ++++
 drivers/pci/quirks.c                           |  20 +++
 drivers/usb/dwc3/core.c                        | 174 ++++++++++++++++++++++++-
 drivers/usb/dwc3/core.h                        |  78 +++++++++--
 drivers/usb/dwc3/dwc3-pci.c                    |  32 +++++
 drivers/usb/dwc3/gadget.c                      |  15 ++-
 drivers/usb/dwc3/platform_data.h               |  20 +++
 include/linux/pci_ids.h                        |   1 +
 8 files changed, 347 insertions(+), 16 deletions(-)

-- 
1.9.1

[PATCH v4 01/20] usb: dwc3: enable hibernation if to be supported

[Huang Rui]

It enables hibernation if the function is set in coreConsultant.

Suggested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/usb/dwc3/core.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index fa396fc..5a47482 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -447,8 +447,14 @@ static int dwc3_core_init(struct dwc3 *dwc)
 			reg &= ~DWC3_GCTL_DSBLCLKGTNG;
 		break;
 	case DWC3_GHWPARAMS1_EN_PWROPT_HIB:
-		/* enable hibernation here */
 		dwc->nr_scratch = DWC3_GHWPARAMS4_HIBER_SCRATCHBUFS(hwparams4);
+		/*
+		 * Enable hibernation here.
+		 *
+		 * Enabling this bit so that host-mode hibernation will
+		 * work, device-mode hibernation is not implemented yet.
+		 */
+		reg |= DWC3_GCTL_GBLHIBERNATIONEN;
 		break;
 	default:
 		dev_dbg(dwc->dev, "No power optimization available\n");
-- 
1.9.1

[PATCH v4 02/20] usb: dwc3: add a flag to check if it is FPGA board

[Huang Rui]

Some chip vendor is on pre-silicon phase, which needs to use the simulation
board. It should have the same product and vendor id with the true SoC, but
might have some minor different configurations.

Below thread discussion proposes to find a method to distinguish between
simulation board and SoC.

http://marc.info/?l=linux-usb&m=141194772206369&w=2

In Advanced Configuration of coreConsultant, there is the parameter of
DWC_USB_EN_FPGA. This bit has the function we need. And it would response
as 7 bit of GHWPARAMS6 register. So it's able to check this functional bit
to confirm if works on FPGA board.

Reported-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/usb/dwc3/core.c | 6 ++++++
 drivers/usb/dwc3/core.h | 5 +++++
 2 files changed, 11 insertions(+)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 5a47482..c8ae098 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -460,6 +460,12 @@ static int dwc3_core_init(struct dwc3 *dwc)
 		dev_dbg(dwc->dev, "No power optimization available\n");
 	}
 
+	/* check if current dwc3 is on simulation board */
+	if (dwc->hwparams.hwparams6 & DWC3_GHWPARAMS6_EN_FPGA) {
+		dev_dbg(dwc->dev, "it is on FPGA board\n");
+		dwc->is_fpga = true;
+	}
+
 	/*
 	 * WORKAROUND: DWC3 revisions <1.90a have a bug
 	 * where the device can fail to connect at SuperSpeed
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index a715ee1..f6ee623 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -210,6 +210,9 @@
 #define DWC3_GHWPARAMS4_HIBER_SCRATCHBUFS(n)	(((n) & (0x0f << 13)) >> 13)
 #define DWC3_MAX_HIBER_SCRATCHBUFS		15
 
+/* Global HWPARAMS6 Register */
+#define DWC3_GHWPARAMS6_EN_FPGA			(1 << 7)
+
 /* Device Configuration Register */
 #define DWC3_DCFG_DEVADDR(addr)	((addr) << 3)
 #define DWC3_DCFG_DEVADDR_MASK	DWC3_DCFG_DEVADDR(0x7f)
@@ -662,6 +665,7 @@ struct dwc3_scratchpad_array {
  * @ep0_expect_in: true when we expect a DATA IN transfer
  * @has_hibernation: true when dwc3 was configured with Hibernation
  * @is_selfpowered: true when we are selfpowered
+ * @is_fpga: true when we are using the FPGA board
  * @needs_fifo_resize: not all users might want fifo resizing, flag it
  * @pullups_connected: true when Run/Stop bit is set
  * @resize_fifos: tells us it's ok to reconfigure our TxFIFO sizes.
@@ -765,6 +769,7 @@ struct dwc3 {
 	unsigned		ep0_expect_in:1;
 	unsigned		has_hibernation:1;
 	unsigned		is_selfpowered:1;
+	unsigned		is_fpga:1;
 	unsigned		needs_fifo_resize:1;
 	unsigned		pullups_connected:1;
 	unsigned		resize_fifos:1;
-- 
1.9.1

[PATCH v4 03/20] usb: dwc3: initialize platform data at pci glue layer

[Huang Rui]

This patch initializes platform data at pci glue layer, and SoCs x86-based
platform vendor is able to define their flags in platform data at bus glue
layer. Then do some independent behaviors at dwc3 core level.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/usb/dwc3/dwc3-pci.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index a36cf66..ada975f 100644
--- a/drivers/usb/dwc3/dwc3-pci.c
+++ b/drivers/usb/dwc3/dwc3-pci.c
@@ -25,6 +25,8 @@
 #include <linux/usb/otg.h>
 #include <linux/usb/usb_phy_generic.h>
 
+#include "platform_data.h"
+
 /* FIXME define these in <linux/pci_ids.h> */
 #define PCI_VENDOR_ID_SYNOPSYS		0x16c3
 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3	0xabcd
@@ -102,6 +104,9 @@ static int dwc3_pci_probe(struct pci_dev *pci,
 	struct dwc3_pci		*glue;
 	int			ret;
 	struct device		*dev = &pci->dev;
+	struct dwc3_platform_data dwc3_pdata;
+
+	memset(&dwc3_pdata, 0x00, sizeof(dwc3_pdata));
 
 	glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
 	if (!glue)
@@ -148,6 +153,10 @@ static int dwc3_pci_probe(struct pci_dev *pci,
 
 	pci_set_drvdata(pci, glue);
 
+	ret = platform_device_add_data(dwc3, &dwc3_pdata, sizeof(dwc3_pdata));
+	if (ret)
+		goto err3;
+
 	dma_set_coherent_mask(&dwc3->dev, dev->coherent_dma_mask);
 
 	dwc3->dev.dma_mask = dev->dma_mask;
-- 
1.9.1

[PATCH v4 04/20] usb: dwc3: add disable scramble quirk

[Huang Rui]

This patch adds disable scramble quirk, and it only needs to be enabled at
FPGA board on some vendor platforms.

[Note] In DesignWare databook, HW designer describes:
disscramble = disable scramble

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt |  2 ++
 drivers/usb/dwc3/core.c                        | 11 ++++++++++-
 drivers/usb/dwc3/core.h                        |  3 +++
 drivers/usb/dwc3/platform_data.h               |  2 ++
 4 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 471366d..8ec2256 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -14,6 +14,8 @@ Optional properties:
  - phys: from the *Generic PHY* bindings
  - phy-names: from the *Generic PHY* bindings
  - tx-fifo-resize: determines if the FIFO *has* to be reallocated.
+ - snps,disable_scramble_quirk: true when SW should disable data scrambling.
+	Only really useful for FPGA builds.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index c8ae098..fae095f 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -422,7 +422,6 @@ static int dwc3_core_init(struct dwc3 *dwc)
 
 	reg = dwc3_readl(dwc->regs, DWC3_GCTL);
 	reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
-	reg &= ~DWC3_GCTL_DISSCRAMBLE;
 
 	switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1)) {
 	case DWC3_GHWPARAMS1_EN_PWROPT_CLK:
@@ -466,6 +465,11 @@ static int dwc3_core_init(struct dwc3 *dwc)
 		dwc->is_fpga = true;
 	}
 
+	if (dwc->disable_scramble_quirk && dwc->is_fpga)
+		reg |= DWC3_GCTL_DISSCRAMBLE;
+	else
+		reg &= ~DWC3_GCTL_DISSCRAMBLE;
+
 	/*
 	 * WORKAROUND: DWC3 revisions <1.90a have a bug
 	 * where the device can fail to connect at SuperSpeed
@@ -710,11 +714,16 @@ static int dwc3_probe(struct platform_device *pdev)
 
 		dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
 		dwc->dr_mode = of_usb_get_dr_mode(node);
+
+		dwc->disable_scramble_quirk = of_property_read_bool(node,
+				"snps,disable_scramble_quirk");
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
 
 		dwc->needs_fifo_resize = pdata->tx_fifo_resize;
 		dwc->dr_mode = pdata->dr_mode;
+
+		dwc->disable_scramble_quirk = pdata->disable_scramble_quirk;
 	}
 
 	/* default to superspeed if no maximum_speed passed */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index f6ee623..56bada6 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -672,6 +672,7 @@ struct dwc3_scratchpad_array {
  * @setup_packet_pending: true when there's a Setup Packet in FIFO. Workaround
  * @start_config_issued: true when StartConfig command has been issued
  * @three_stage_setup: set if we perform a three phase setup
+ * @disable_scramble_quirk: set if we enable the disable scramble quirk
  */
 struct dwc3 {
 	struct usb_ctrlrequest	*ctrl_req;
@@ -776,6 +777,8 @@ struct dwc3 {
 	unsigned		setup_packet_pending:1;
 	unsigned		start_config_issued:1;
 	unsigned		three_stage_setup:1;
+
+	unsigned		disable_scramble_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index 7db34f0..9209d02 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -24,4 +24,6 @@ struct dwc3_platform_data {
 	enum usb_device_speed maximum_speed;
 	enum usb_dr_mode dr_mode;
 	bool tx_fifo_resize;
+
+	unsigned disable_scramble_quirk:1;
 };
-- 
1.9.1

[PATCH v4 05/20] usb: dwc3: add lpm erratum support

[Huang Rui]

When parameter DWC_USB3_LPM_ERRATA_ENABLE is enabled in Advanced
Configuration of coreConsultant, support of xHCI BESL Errata Dated
10/19/2011 is enabled in host mode. In device mode it adds the capability
to send NYET response threshold based on the BESL value received in the LPM
token, and the threshold is configurable for each SoC platform.

This patch adds an entry that soc platform is able to define the lpm
capacity with their own device tree or bus glue layer.

[ balbi@ti.com : added devicetree documentation, spelled threshold
		completely, made sure threshold is only applied to
		proper core revisions. ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt |  2 ++
 drivers/usb/dwc3/core.c                        | 16 +++++++++++++++-
 drivers/usb/dwc3/core.h                        | 26 +++++++++++++++++---------
 drivers/usb/dwc3/gadget.c                      | 13 +++++++++++++
 drivers/usb/dwc3/platform_data.h               |  3 +++
 5 files changed, 50 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 8ec2256..2b0c1f2 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -16,6 +16,8 @@ Optional properties:
  - tx-fifo-resize: determines if the FIFO *has* to be reallocated.
  - snps,disable_scramble_quirk: true when SW should disable data scrambling.
 	Only really useful for FPGA builds.
+ - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
+ - snps,lpm-nyet-threshold: LPM NYET threshold
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index fae095f..2ac96e4 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -654,6 +654,7 @@ static int dwc3_probe(struct platform_device *pdev)
 	struct device_node	*node = dev->of_node;
 	struct resource		*res;
 	struct dwc3		*dwc;
+	u8			lpm_nyet_threshold;
 
 	int			ret;
 
@@ -709,16 +710,27 @@ static int dwc3_probe(struct platform_device *pdev)
 	 */
 	res->start -= DWC3_GLOBALS_REGS_START;
 
+	/* default to highest possible threshold */
+	lpm_nyet_threshold = 0xff;
+
 	if (node) {
 		dwc->maximum_speed = of_usb_get_maximum_speed(node);
+		dwc->has_lpm_erratum = of_property_read_bool(node,
+				"snps,has-lpm-erratum");
+		of_property_read_u8(node, "snps,lpm-nyet-threshold",
+				&lpm_nyet_threshold);
 
-		dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
+		dwc->needs_fifo_resize = of_property_read_bool(node,
+				"tx-fifo-resize");
 		dwc->dr_mode = of_usb_get_dr_mode(node);
 
 		dwc->disable_scramble_quirk = of_property_read_bool(node,
 				"snps,disable_scramble_quirk");
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
+		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
+		if (pdata->lpm_nyet_threshold)
+			lpm_nyet_threshold = pdata->lpm_nyet_threshold;
 
 		dwc->needs_fifo_resize = pdata->tx_fifo_resize;
 		dwc->dr_mode = pdata->dr_mode;
@@ -730,6 +742,8 @@ static int dwc3_probe(struct platform_device *pdev)
 	if (dwc->maximum_speed == USB_SPEED_UNKNOWN)
 		dwc->maximum_speed = USB_SPEED_SUPER;
 
+	dwc->lpm_nyet_threshold = lpm_nyet_threshold;
+
 	ret = dwc3_core_get_phy(dwc);
 	if (ret)
 		return ret;
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 56bada6..34f1e08 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -246,16 +246,19 @@
 #define DWC3_DCTL_TRGTULST_SS_INACT	(DWC3_DCTL_TRGTULST(6))
 
 /* These apply for core versions 1.94a and later */
-#define DWC3_DCTL_KEEP_CONNECT	(1 << 19)
-#define DWC3_DCTL_L1_HIBER_EN	(1 << 18)
-#define DWC3_DCTL_CRS		(1 << 17)
-#define DWC3_DCTL_CSS		(1 << 16)
+#define DWC3_DCTL_LPM_ERRATA_MASK	DWC3_DCTL_LPM_ERRATA(0xf)
+#define DWC3_DCTL_LPM_ERRATA(n)		((n) << 20)
 
-#define DWC3_DCTL_INITU2ENA	(1 << 12)
-#define DWC3_DCTL_ACCEPTU2ENA	(1 << 11)
-#define DWC3_DCTL_INITU1ENA	(1 << 10)
-#define DWC3_DCTL_ACCEPTU1ENA	(1 << 9)
-#define DWC3_DCTL_TSTCTRL_MASK	(0xf << 1)
+#define DWC3_DCTL_KEEP_CONNECT		(1 << 19)
+#define DWC3_DCTL_L1_HIBER_EN		(1 << 18)
+#define DWC3_DCTL_CRS			(1 << 17)
+#define DWC3_DCTL_CSS			(1 << 16)
+
+#define DWC3_DCTL_INITU2ENA		(1 << 12)
+#define DWC3_DCTL_ACCEPTU2ENA		(1 << 11)
+#define DWC3_DCTL_INITU1ENA		(1 << 10)
+#define DWC3_DCTL_ACCEPTU1ENA		(1 << 9)
+#define DWC3_DCTL_TSTCTRL_MASK		(0xf << 1)
 
 #define DWC3_DCTL_ULSTCHNGREQ_MASK	(0x0f << 5)
 #define DWC3_DCTL_ULSTCHNGREQ(n) (((n) << 5) & DWC3_DCTL_ULSTCHNGREQ_MASK)
@@ -660,10 +663,13 @@ struct dwc3_scratchpad_array {
  * @regset: debugfs pointer to regdump file
  * @test_mode: true when we're entering a USB test mode
  * @test_mode_nr: test feature selector
+ * @lpm_nyet_threshold: LPM NYET response threshold
  * @delayed_status: true when gadget driver asks for delayed status
  * @ep0_bounced: true when we used bounce buffer
  * @ep0_expect_in: true when we expect a DATA IN transfer
  * @has_hibernation: true when dwc3 was configured with Hibernation
+ * @has_lpm_erratum: true when core was configured with LPM Erratum. Note that
+ *			there's now way for software to detect this in runtime.
  * @is_selfpowered: true when we are selfpowered
  * @is_fpga: true when we are using the FPGA board
  * @needs_fifo_resize: not all users might want fifo resizing, flag it
@@ -764,11 +770,13 @@ struct dwc3 {
 
 	u8			test_mode;
 	u8			test_mode_nr;
+	u8			lpm_nyet_threshold;
 
 	unsigned		delayed_status:1;
 	unsigned		ep0_bounced:1;
 	unsigned		ep0_expect_in:1;
 	unsigned		has_hibernation:1;
+	unsigned		has_lpm_erratum:1;
 	unsigned		is_selfpowered:1;
 	unsigned		is_fpga:1;
 	unsigned		needs_fifo_resize:1;
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 7a64c2f..2c0d19a4 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2297,6 +2297,19 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
 		 */
 		reg |= DWC3_DCTL_HIRD_THRES(12);
 
+		/*
+		 * When dwc3 revisions >= 2.40a, LPM Erratum is enabled and
+		 * DCFG.LPMCap is set, core responses with an ACK and the
+		 * BESL value in the LPM token is less than or equal to LPM
+		 * NYET threshold.
+		 */
+		WARN_ONCE(dwc->revision < DWC3_REVISION_240A
+				&& dwc->has_lpm_erratum,
+				"LPM Erratum not available on dwc3 revisisions < 2.40a\n");
+
+		if (dwc->has_lpm_erratum && dwc->revision >= DWC3_REVISION_240A)
+			reg |= DWC3_DCTL_LPM_ERRATA(dwc->lpm_nyet_threshold);
+
 		dwc3_writel(dwc->regs, DWC3_DCTL, reg);
 	} else {
 		reg = dwc3_readl(dwc->regs, DWC3_DCTL);
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index 9209d02..e128308 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -25,5 +25,8 @@ struct dwc3_platform_data {
 	enum usb_dr_mode dr_mode;
 	bool tx_fifo_resize;
 
+	u8 lpm_nyet_threshold;
+
 	unsigned disable_scramble_quirk:1;
+	unsigned has_lpm_erratum:1;
 };
-- 
1.9.1

[PATCH v4 06/20] usb: dwc3: add U2Exit LFPS quirk

[Huang Rui]

This patch adds U2Exit LFPS quirk, and some special platforms can configure
that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
 drivers/usb/dwc3/core.c                        | 6 ++++++
 drivers/usb/dwc3/core.h                        | 3 +++
 drivers/usb/dwc3/platform_data.h               | 1 +
 4 files changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 2b0c1f2..79ed37c 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -18,6 +18,7 @@ Optional properties:
 	Only really useful for FPGA builds.
  - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
  - snps,lpm-nyet-threshold: LPM NYET threshold
+ - snps,u2exit_lfps_quirk: set if we want to enable U2Exit LFPS quirk
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 2ac96e4..6d1f09f 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -470,6 +470,9 @@ static int dwc3_core_init(struct dwc3 *dwc)
 	else
 		reg &= ~DWC3_GCTL_DISSCRAMBLE;
 
+	if (dwc->u2exit_lfps_quirk)
+		reg |= DWC3_GCTL_U2EXIT_LFPS;
+
 	/*
 	 * WORKAROUND: DWC3 revisions <1.90a have a bug
 	 * where the device can fail to connect at SuperSpeed
@@ -726,6 +729,8 @@ static int dwc3_probe(struct platform_device *pdev)
 
 		dwc->disable_scramble_quirk = of_property_read_bool(node,
 				"snps,disable_scramble_quirk");
+		dwc->u2exit_lfps_quirk = of_property_read_bool(node,
+				"snps,u2exit_lfps_quirk");
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
 		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -736,6 +741,7 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->dr_mode = pdata->dr_mode;
 
 		dwc->disable_scramble_quirk = pdata->disable_scramble_quirk;
+		dwc->u2exit_lfps_quirk = pdata->u2exit_lfps_quirk;
 	}
 
 	/* default to superspeed if no maximum_speed passed */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 34f1e08..45130a1 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -166,6 +166,7 @@
 #define DWC3_GCTL_SCALEDOWN(n)		((n) << 4)
 #define DWC3_GCTL_SCALEDOWN_MASK	DWC3_GCTL_SCALEDOWN(3)
 #define DWC3_GCTL_DISSCRAMBLE		(1 << 3)
+#define DWC3_GCTL_U2EXIT_LFPS		(1 << 2)
 #define DWC3_GCTL_GBLHIBERNATIONEN	(1 << 1)
 #define DWC3_GCTL_DSBLCLKGTNG		(1 << 0)
 
@@ -679,6 +680,7 @@ struct dwc3_scratchpad_array {
  * @start_config_issued: true when StartConfig command has been issued
  * @three_stage_setup: set if we perform a three phase setup
  * @disable_scramble_quirk: set if we enable the disable scramble quirk
+ * @u2exit_lfps_quirk: set if we enable U2Exit LFPS quirk
  */
 struct dwc3 {
 	struct usb_ctrlrequest	*ctrl_req;
@@ -787,6 +789,7 @@ struct dwc3 {
 	unsigned		three_stage_setup:1;
 
 	unsigned		disable_scramble_quirk:1;
+	unsigned		u2exit_lfps_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index e128308..3f21591 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -29,4 +29,5 @@ struct dwc3_platform_data {
 
 	unsigned disable_scramble_quirk:1;
 	unsigned has_lpm_erratum:1;
+	unsigned u2exit_lfps_quirk:1;
 };
-- 
1.9.1

[PATCH v4 07/20] usb: dwc3: add P3 in U2 SS Inactive quirk

[Huang Rui]

This patch adds P3 in U2 SS Inactive quirk, and some special platforms can
configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt |  1 +
 drivers/usb/dwc3/core.c                        | 23 +++++++++++++++++++++++
 drivers/usb/dwc3/core.h                        |  3 +++
 drivers/usb/dwc3/platform_data.h               |  1 +
 4 files changed, 28 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 79ed37c..f714357 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -19,6 +19,7 @@ Optional properties:
  - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
  - snps,lpm-nyet-threshold: LPM NYET threshold
  - snps,u2exit_lfps_quirk: set if we want to enable U2Exit LFPS quirk
+ - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 6d1f09f..0a935cb 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -365,6 +365,24 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc)
 }
 
 /**
+ * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core
+ * @dwc: Pointer to our controller context structure
+ */
+static void dwc3_phy_setup(struct dwc3 *dwc)
+{
+	u32 reg;
+
+	reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
+
+	if (dwc->u2ss_inp3_quirk)
+		reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK;
+
+	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
+
+	mdelay(100);
+}
+
+/**
  * dwc3_core_init - Low-level initialization of DWC3 Core
  * @dwc: Pointer to our controller context structure
  *
@@ -486,6 +504,8 @@ static int dwc3_core_init(struct dwc3 *dwc)
 
 	dwc3_writel(dwc->regs, DWC3_GCTL, reg);
 
+	dwc3_phy_setup(dwc);
+
 	ret = dwc3_alloc_scratch_buffers(dwc);
 	if (ret)
 		goto err1;
@@ -731,6 +751,8 @@ static int dwc3_probe(struct platform_device *pdev)
 				"snps,disable_scramble_quirk");
 		dwc->u2exit_lfps_quirk = of_property_read_bool(node,
 				"snps,u2exit_lfps_quirk");
+		dwc->u2ss_inp3_quirk = of_property_read_bool(node,
+				"snps,u2ss_inp3_quirk");
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
 		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -742,6 +764,7 @@ static int dwc3_probe(struct platform_device *pdev)
 
 		dwc->disable_scramble_quirk = pdata->disable_scramble_quirk;
 		dwc->u2exit_lfps_quirk = pdata->u2exit_lfps_quirk;
+		dwc->u2ss_inp3_quirk = pdata->u2ss_inp3_quirk;
 	}
 
 	/* default to superspeed if no maximum_speed passed */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 45130a1..3843511 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -176,6 +176,7 @@
 
 /* Global USB3 PIPE Control Register */
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
+#define DWC3_GUSB3PIPECTL_U2SSINP3OK	(1 << 29)
 #define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)
 
 /* Global TX Fifo Size Register */
@@ -681,6 +682,7 @@ struct dwc3_scratchpad_array {
  * @three_stage_setup: set if we perform a three phase setup
  * @disable_scramble_quirk: set if we enable the disable scramble quirk
  * @u2exit_lfps_quirk: set if we enable U2Exit LFPS quirk
+ * @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
  */
 struct dwc3 {
 	struct usb_ctrlrequest	*ctrl_req;
@@ -790,6 +792,7 @@ struct dwc3 {
 
 	unsigned		disable_scramble_quirk:1;
 	unsigned		u2exit_lfps_quirk:1;
+	unsigned		u2ss_inp3_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index 3f21591..cf92c81 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -30,4 +30,5 @@ struct dwc3_platform_data {
 	unsigned disable_scramble_quirk:1;
 	unsigned has_lpm_erratum:1;
 	unsigned u2exit_lfps_quirk:1;
+	unsigned u2ss_inp3_quirk:1;
 };
-- 
1.9.1

[PATCH v4 08/20] usb: dwc3: add request P1/P2/P3 quirk

[Huang Rui]

This patch adds request P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
 drivers/usb/dwc3/core.c                        | 6 ++++++
 drivers/usb/dwc3/core.h                        | 3 +++
 drivers/usb/dwc3/platform_data.h               | 1 +
 4 files changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index f714357..9de11fd 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -20,6 +20,8 @@ Optional properties:
  - snps,lpm-nyet-threshold: LPM NYET threshold
  - snps,u2exit_lfps_quirk: set if we want to enable U2Exit LFPS quirk
  - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
+ - snps,req_p1p2p3_quirk: when set, the core will always request for
+			P1/P2/P3 transition sequence.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 0a935cb..e951984 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -377,6 +377,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->u2ss_inp3_quirk)
 		reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK;
 
+	if (dwc->req_p1p2p3_quirk)
+		reg |= DWC3_GUSB3PIPECTL_REQP1P2P3;
+
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
 	mdelay(100);
@@ -753,6 +756,8 @@ static int dwc3_probe(struct platform_device *pdev)
 				"snps,u2exit_lfps_quirk");
 		dwc->u2ss_inp3_quirk = of_property_read_bool(node,
 				"snps,u2ss_inp3_quirk");
+		dwc->req_p1p2p3_quirk = of_property_read_bool(node,
+				"snps,req_p1p2p3_quirk");
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
 		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -765,6 +770,7 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->disable_scramble_quirk = pdata->disable_scramble_quirk;
 		dwc->u2exit_lfps_quirk = pdata->u2exit_lfps_quirk;
 		dwc->u2ss_inp3_quirk = pdata->u2ss_inp3_quirk;
+		dwc->req_p1p2p3_quirk = pdata->req_p1p2p3_quirk;
 	}
 
 	/* default to superspeed if no maximum_speed passed */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 3843511..cbb8593 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -177,6 +177,7 @@
 /* Global USB3 PIPE Control Register */
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
 #define DWC3_GUSB3PIPECTL_U2SSINP3OK	(1 << 29)
+#define DWC3_GUSB3PIPECTL_REQP1P2P3	(1 << 24)
 #define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)
 
 /* Global TX Fifo Size Register */
@@ -683,6 +684,7 @@ struct dwc3_scratchpad_array {
  * @disable_scramble_quirk: set if we enable the disable scramble quirk
  * @u2exit_lfps_quirk: set if we enable U2Exit LFPS quirk
  * @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
+ * @req_p1p2p3_quirk: set if we enable request P1/P2/P3 quirk
  */
 struct dwc3 {
 	struct usb_ctrlrequest	*ctrl_req;
@@ -793,6 +795,7 @@ struct dwc3 {
 	unsigned		disable_scramble_quirk:1;
 	unsigned		u2exit_lfps_quirk:1;
 	unsigned		u2ss_inp3_quirk:1;
+	unsigned		req_p1p2p3_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index cf92c81..d3e6ec2 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -31,4 +31,5 @@ struct dwc3_platform_data {
 	unsigned has_lpm_erratum:1;
 	unsigned u2exit_lfps_quirk:1;
 	unsigned u2ss_inp3_quirk:1;
+	unsigned req_p1p2p3_quirk:1;
 };
-- 
1.9.1

[PATCH v4 09/20] usb: dwc3: add delay P1/P2/P3 quirk

[Huang Rui]

This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
 drivers/usb/dwc3/core.c                        | 6 ++++++
 drivers/usb/dwc3/core.h                        | 5 +++++
 drivers/usb/dwc3/platform_data.h               | 1 +
 4 files changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 9de11fd..a406bb5 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -22,6 +22,8 @@ Optional properties:
  - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
  - snps,req_p1p2p3_quirk: when set, the core will always request for
 			P1/P2/P3 transition sequence.
+ - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
+			amount of 8B10B errors occur.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index e951984..4429de7 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -380,6 +380,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->req_p1p2p3_quirk)
 		reg |= DWC3_GUSB3PIPECTL_REQP1P2P3;
 
+	if (dwc->del_p1p2p3_quirk)
+		reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN;
+
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
 	mdelay(100);
@@ -758,6 +761,8 @@ static int dwc3_probe(struct platform_device *pdev)
 				"snps,u2ss_inp3_quirk");
 		dwc->req_p1p2p3_quirk = of_property_read_bool(node,
 				"snps,req_p1p2p3_quirk");
+		dwc->del_p1p2p3_quirk = of_property_read_bool(node,
+				"snps,del_p1p2p3_quirk");
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
 		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -771,6 +776,7 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->u2exit_lfps_quirk = pdata->u2exit_lfps_quirk;
 		dwc->u2ss_inp3_quirk = pdata->u2ss_inp3_quirk;
 		dwc->req_p1p2p3_quirk = pdata->req_p1p2p3_quirk;
+		dwc->del_p1p2p3_quirk = pdata->del_p1p2p3_quirk;
 	}
 
 	/* default to superspeed if no maximum_speed passed */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index cbb8593..750e473 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -178,6 +178,9 @@
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
 #define DWC3_GUSB3PIPECTL_U2SSINP3OK	(1 << 29)
 #define DWC3_GUSB3PIPECTL_REQP1P2P3	(1 << 24)
+#define DWC3_GUSB3PIPECTL_DEP1P2P3(n)	((n) << 19)
+#define DWC3_GUSB3PIPECTL_DEP1P2P3_MASK	DWC3_GUSB3PIPECTL_DEP1P2P3(7)
+#define DWC3_GUSB3PIPECTL_DEP1P2P3_EN	DWC3_GUSB3PIPECTL_DEP1P2P3(1)
 #define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)
 
 /* Global TX Fifo Size Register */
@@ -685,6 +688,7 @@ struct dwc3_scratchpad_array {
  * @u2exit_lfps_quirk: set if we enable U2Exit LFPS quirk
  * @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
  * @req_p1p2p3_quirk: set if we enable request P1/P2/P3 quirk
+ * @del_p1p2p3_quirk: set if we enable delay P1/P2/P3 quirk
  */
 struct dwc3 {
 	struct usb_ctrlrequest	*ctrl_req;
@@ -796,6 +800,7 @@ struct dwc3 {
 	unsigned		u2exit_lfps_quirk:1;
 	unsigned		u2ss_inp3_quirk:1;
 	unsigned		req_p1p2p3_quirk:1;
+	unsigned                del_p1p2p3_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index d3e6ec2..a421cec 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -32,4 +32,5 @@ struct dwc3_platform_data {
 	unsigned u2exit_lfps_quirk:1;
 	unsigned u2ss_inp3_quirk:1;
 	unsigned req_p1p2p3_quirk:1;
+	unsigned del_p1p2p3_quirk:1;
 };
-- 
1.9.1

[PATCH v4 10/20] usb: dwc3: add delay phy power change quirk

[Huang Rui]

This patch adds delay PHY power change from P0 to P1/P2/P3 when link state
changing from U0 to U1/U2/U3 respectively, and some special platforms can
configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
 drivers/usb/dwc3/core.c                        | 6 ++++++
 drivers/usb/dwc3/core.h                        | 3 +++
 drivers/usb/dwc3/platform_data.h               | 1 +
 4 files changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index a406bb5..216cc35 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -24,6 +24,8 @@ Optional properties:
 			P1/P2/P3 transition sequence.
  - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
 			amount of 8B10B errors occur.
+ - snps,del_phy_power_chg_quirk: when set core will delay PHY power change
+			from P0 to P1/P2/P3.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 4429de7..deceb7c 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -383,6 +383,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->del_p1p2p3_quirk)
 		reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN;
 
+	if (dwc->del_phy_power_chg_quirk)
+		reg |= DWC3_GUSB3PIPECTL_DEPOCHANGE;
+
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
 	mdelay(100);
@@ -763,6 +766,8 @@ static int dwc3_probe(struct platform_device *pdev)
 				"snps,req_p1p2p3_quirk");
 		dwc->del_p1p2p3_quirk = of_property_read_bool(node,
 				"snps,del_p1p2p3_quirk");
+		dwc->del_phy_power_chg_quirk = of_property_read_bool(node,
+				"snps,del_phy_power_chg_quirk");
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
 		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -777,6 +782,7 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->u2ss_inp3_quirk = pdata->u2ss_inp3_quirk;
 		dwc->req_p1p2p3_quirk = pdata->req_p1p2p3_quirk;
 		dwc->del_p1p2p3_quirk = pdata->del_p1p2p3_quirk;
+		dwc->del_phy_power_chg_quirk = pdata->del_phy_power_chg_quirk;
 	}
 
 	/* default to superspeed if no maximum_speed passed */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 750e473..176f3f1 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -181,6 +181,7 @@
 #define DWC3_GUSB3PIPECTL_DEP1P2P3(n)	((n) << 19)
 #define DWC3_GUSB3PIPECTL_DEP1P2P3_MASK	DWC3_GUSB3PIPECTL_DEP1P2P3(7)
 #define DWC3_GUSB3PIPECTL_DEP1P2P3_EN	DWC3_GUSB3PIPECTL_DEP1P2P3(1)
+#define DWC3_GUSB3PIPECTL_DEPOCHANGE	(1 << 18)
 #define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)
 
 /* Global TX Fifo Size Register */
@@ -689,6 +690,7 @@ struct dwc3_scratchpad_array {
  * @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
  * @req_p1p2p3_quirk: set if we enable request P1/P2/P3 quirk
  * @del_p1p2p3_quirk: set if we enable delay P1/P2/P3 quirk
+ * @del_phy_power_chg_quirk: set if we enable delay phy power change quirk
  */
 struct dwc3 {
 	struct usb_ctrlrequest	*ctrl_req;
@@ -801,6 +803,7 @@ struct dwc3 {
 	unsigned		u2ss_inp3_quirk:1;
 	unsigned		req_p1p2p3_quirk:1;
 	unsigned                del_p1p2p3_quirk:1;
+	unsigned		del_phy_power_chg_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index a421cec..ae67151 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -33,4 +33,5 @@ struct dwc3_platform_data {
 	unsigned u2ss_inp3_quirk:1;
 	unsigned req_p1p2p3_quirk:1;
 	unsigned del_p1p2p3_quirk:1;
+	unsigned del_phy_power_chg_quirk:1;
 };
-- 
1.9.1

[PATCH v4 11/20] usb: dwc3: add LFPS filter quirk

[Huang Rui]

This patch adds LFPS filter quirk, and some special platforms can configure
that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
 drivers/usb/dwc3/core.c                        | 6 ++++++
 drivers/usb/dwc3/core.h                        | 3 +++
 drivers/usb/dwc3/platform_data.h               | 1 +
 4 files changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 216cc35..0647100 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -26,6 +26,7 @@ Optional properties:
 			amount of 8B10B errors occur.
  - snps,del_phy_power_chg_quirk: when set core will delay PHY power change
 			from P0 to P1/P2/P3.
+ - snps,lfps_filter_quirk: when set core will filter LFPS reception.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index deceb7c..ae7ff8f 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -386,6 +386,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->del_phy_power_chg_quirk)
 		reg |= DWC3_GUSB3PIPECTL_DEPOCHANGE;
 
+	if (dwc->lfps_filter_quirk)
+		reg |= DWC3_GUSB3PIPECTL_LFPSFILT;
+
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
 	mdelay(100);
@@ -768,6 +771,8 @@ static int dwc3_probe(struct platform_device *pdev)
 				"snps,del_p1p2p3_quirk");
 		dwc->del_phy_power_chg_quirk = of_property_read_bool(node,
 				"snps,del_phy_power_chg_quirk");
+		dwc->lfps_filter_quirk = of_property_read_bool(node,
+				"snps,lfps_filter_quirk");
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
 		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -783,6 +788,7 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->req_p1p2p3_quirk = pdata->req_p1p2p3_quirk;
 		dwc->del_p1p2p3_quirk = pdata->del_p1p2p3_quirk;
 		dwc->del_phy_power_chg_quirk = pdata->del_phy_power_chg_quirk;
+		dwc->lfps_filter_quirk = pdata->lfps_filter_quirk;
 	}
 
 	/* default to superspeed if no maximum_speed passed */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 176f3f1..cf9dd73 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -183,6 +183,7 @@
 #define DWC3_GUSB3PIPECTL_DEP1P2P3_EN	DWC3_GUSB3PIPECTL_DEP1P2P3(1)
 #define DWC3_GUSB3PIPECTL_DEPOCHANGE	(1 << 18)
 #define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)
+#define DWC3_GUSB3PIPECTL_LFPSFILT	(1 << 9)
 
 /* Global TX Fifo Size Register */
 #define DWC3_GTXFIFOSIZ_TXFDEF(n)	((n) & 0xffff)
@@ -691,6 +692,7 @@ struct dwc3_scratchpad_array {
  * @req_p1p2p3_quirk: set if we enable request P1/P2/P3 quirk
  * @del_p1p2p3_quirk: set if we enable delay P1/P2/P3 quirk
  * @del_phy_power_chg_quirk: set if we enable delay phy power change quirk
+ * @lfps_filter_quirk: set if we enable LFPS filter quirk
  */
 struct dwc3 {
 	struct usb_ctrlrequest	*ctrl_req;
@@ -804,6 +806,7 @@ struct dwc3 {
 	unsigned		req_p1p2p3_quirk:1;
 	unsigned                del_p1p2p3_quirk:1;
 	unsigned		del_phy_power_chg_quirk:1;
+	unsigned		lfps_filter_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index ae67151..dad0211 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -34,4 +34,5 @@ struct dwc3_platform_data {
 	unsigned req_p1p2p3_quirk:1;
 	unsigned del_p1p2p3_quirk:1;
 	unsigned del_phy_power_chg_quirk:1;
+	unsigned lfps_filter_quirk:1;
 };
-- 
1.9.1

[PATCH v4 12/20] usb: dwc3: add rx_detect to polling LFPS quirk

[Huang Rui]

This patch adds RX_DETECT to Polling.LFPS control quirk, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
 drivers/usb/dwc3/core.c                        | 6 ++++++
 drivers/usb/dwc3/core.h                        | 3 +++
 drivers/usb/dwc3/platform_data.h               | 1 +
 4 files changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 0647100..38bac28 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -27,6 +27,8 @@ Optional properties:
  - snps,del_phy_power_chg_quirk: when set core will delay PHY power change
 			from P0 to P1/P2/P3.
  - snps,lfps_filter_quirk: when set core will filter LFPS reception.
+ - snps,rx_detect_poll_quirk: when set core will disable a 400us delay to start
+			Polling LFPS after RX.Detect.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index ae7ff8f..11b0ab08 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -389,6 +389,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->lfps_filter_quirk)
 		reg |= DWC3_GUSB3PIPECTL_LFPSFILT;
 
+	if (dwc->rx_detect_poll_quirk)
+		reg |= DWC3_GUSB3PIPECTL_RX_DETOPOLL;
+
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
 	mdelay(100);
@@ -773,6 +776,8 @@ static int dwc3_probe(struct platform_device *pdev)
 				"snps,del_phy_power_chg_quirk");
 		dwc->lfps_filter_quirk = of_property_read_bool(node,
 				"snps,lfps_filter_quirk");
+		dwc->rx_detect_poll_quirk = of_property_read_bool(node,
+				"snps,rx_detect_poll_quirk");
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
 		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -789,6 +794,7 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->del_p1p2p3_quirk = pdata->del_p1p2p3_quirk;
 		dwc->del_phy_power_chg_quirk = pdata->del_phy_power_chg_quirk;
 		dwc->lfps_filter_quirk = pdata->lfps_filter_quirk;
+		dwc->rx_detect_poll_quirk = pdata->rx_detect_poll_quirk;
 	}
 
 	/* default to superspeed if no maximum_speed passed */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index cf9dd73..eeef976 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -184,6 +184,7 @@
 #define DWC3_GUSB3PIPECTL_DEPOCHANGE	(1 << 18)
 #define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)
 #define DWC3_GUSB3PIPECTL_LFPSFILT	(1 << 9)
+#define DWC3_GUSB3PIPECTL_RX_DETOPOLL	(1 << 8)
 
 /* Global TX Fifo Size Register */
 #define DWC3_GTXFIFOSIZ_TXFDEF(n)	((n) & 0xffff)
@@ -693,6 +694,7 @@ struct dwc3_scratchpad_array {
  * @del_p1p2p3_quirk: set if we enable delay P1/P2/P3 quirk
  * @del_phy_power_chg_quirk: set if we enable delay phy power change quirk
  * @lfps_filter_quirk: set if we enable LFPS filter quirk
+ * @rx_detect_poll_quirk: set if we enable rx_detect to polling LFPS quirk
  */
 struct dwc3 {
 	struct usb_ctrlrequest	*ctrl_req;
@@ -807,6 +809,7 @@ struct dwc3 {
 	unsigned                del_p1p2p3_quirk:1;
 	unsigned		del_phy_power_chg_quirk:1;
 	unsigned		lfps_filter_quirk:1;
+	unsigned		rx_detect_poll_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index dad0211..4a0f06b 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -35,4 +35,5 @@ struct dwc3_platform_data {
 	unsigned del_p1p2p3_quirk:1;
 	unsigned del_phy_power_chg_quirk:1;
 	unsigned lfps_filter_quirk:1;
+	unsigned rx_detect_poll_quirk:1;
 };
-- 
1.9.1

[PATCH v4 13/20] usb: dwc3: set SUSPHY bit for all cores

[Huang Rui]

It is recommended to set USB3 and USB2 SUSPHY bits to '1' after the core
initialization is completed above the dwc3 revision 1.94a.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/usb/dwc3/core.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 11b0ab08..e02c3b0 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -374,6 +374,15 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 
 	reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
 
+	/*
+	 * Above 1.94a, it is recommended to set DWC3_GUSB3PIPECTL_SUSPHY
+	 * to '0' during coreConsultant configuration. So default value
+	 * will be '0' when the core is reset. Application needs to set it
+	 * to '1' after the core initialization is completed.
+	 */
+	if (dwc->revision > DWC3_REVISION_194A)
+		reg |= DWC3_GUSB3PIPECTL_SUSPHY;
+
 	if (dwc->u2ss_inp3_quirk)
 		reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK;
 
@@ -395,6 +404,21 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
 	mdelay(100);
+
+	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+
+	/*
+	 * Above 1.94a, it is recommended to set DWC3_GUSB2PHYCFG_SUSPHY to
+	 * '0' during coreConsultant configuration. So default value will
+	 * be '0' when the core is reset. Application needs to set it to
+	 * '1' after the core initialization is completed.
+	 */
+	if (dwc->revision > DWC3_REVISION_194A)
+		reg |= DWC3_GUSB2PHYCFG_SUSPHY;
+
+	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+
+	mdelay(100);
 }
 
 /**
-- 
1.9.1

[PATCH v4 14/20] usb: dwc3: add Tx de-emphasis quirk

[Huang Rui]

This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is
configurable according to PIPE3 specification.

Value		Description
0		-6dB de-emphasis
1		-3.5dB de-emphasis
2		No de-emphasis
3		Reserved

It can be configured on DT or platform data.

Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt |  3 +++
 drivers/usb/dwc3/core.c                        | 17 +++++++++++++++++
 drivers/usb/dwc3/core.h                        | 11 +++++++++++
 drivers/usb/dwc3/platform_data.h               |  3 +++
 4 files changed, 34 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 38bac28..a9e54ae 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -29,6 +29,9 @@ Optional properties:
  - snps,lfps_filter_quirk: when set core will filter LFPS reception.
  - snps,rx_detect_poll_quirk: when set core will disable a 400us delay to start
 			Polling LFPS after RX.Detect.
+ - snps,tx_de_emphasis_quirk: when set core will set Tx de-emphasis value.
+ - snps,tx_de_emphasis: the value driven to the PHY is controlled by the
+			LTSSM during USB3 Compliance mode.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index e02c3b0..b55fa5b 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -401,6 +401,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->rx_detect_poll_quirk)
 		reg |= DWC3_GUSB3PIPECTL_RX_DETOPOLL;
 
+	if (dwc->tx_de_emphasis_quirk)
+		reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(dwc->tx_de_emphasis);
+
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
 	mdelay(100);
@@ -717,6 +720,7 @@ static int dwc3_probe(struct platform_device *pdev)
 	struct resource		*res;
 	struct dwc3		*dwc;
 	u8			lpm_nyet_threshold;
+	u8			tx_de_emphasis;
 
 	int			ret;
 
@@ -775,6 +779,9 @@ static int dwc3_probe(struct platform_device *pdev)
 	/* default to highest possible threshold */
 	lpm_nyet_threshold = 0xff;
 
+	/* default to -3.5dB de-emphasis */
+	tx_de_emphasis = 1;
+
 	if (node) {
 		dwc->maximum_speed = of_usb_get_maximum_speed(node);
 		dwc->has_lpm_erratum = of_property_read_bool(node,
@@ -802,6 +809,11 @@ static int dwc3_probe(struct platform_device *pdev)
 				"snps,lfps_filter_quirk");
 		dwc->rx_detect_poll_quirk = of_property_read_bool(node,
 				"snps,rx_detect_poll_quirk");
+
+		dwc->tx_de_emphasis_quirk = of_property_read_bool(node,
+				"snps,tx_de_emphasis_quirk");
+		of_property_read_u8(node, "snps,tx_de_emphasis",
+				&tx_de_emphasis);
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
 		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -819,6 +831,10 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->del_phy_power_chg_quirk = pdata->del_phy_power_chg_quirk;
 		dwc->lfps_filter_quirk = pdata->lfps_filter_quirk;
 		dwc->rx_detect_poll_quirk = pdata->rx_detect_poll_quirk;
+
+		dwc->tx_de_emphasis_quirk = pdata->tx_de_emphasis_quirk;
+		if (pdata->tx_de_emphasis)
+			tx_de_emphasis = pdata->tx_de_emphasis;
 	}
 
 	/* default to superspeed if no maximum_speed passed */
@@ -826,6 +842,7 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->maximum_speed = USB_SPEED_SUPER;
 
 	dwc->lpm_nyet_threshold = lpm_nyet_threshold;
+	dwc->tx_de_emphasis = tx_de_emphasis;
 
 	ret = dwc3_core_get_phy(dwc);
 	if (ret)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index eeef976..469ee13 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -185,6 +185,8 @@
 #define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)
 #define DWC3_GUSB3PIPECTL_LFPSFILT	(1 << 9)
 #define DWC3_GUSB3PIPECTL_RX_DETOPOLL	(1 << 8)
+#define DWC3_GUSB3PIPECTL_TX_DEEPH_MASK	DWC3_GUSB3PIPECTL_TX_DEEPH(3)
+#define DWC3_GUSB3PIPECTL_TX_DEEPH(n)	((n) << 1)
 
 /* Global TX Fifo Size Register */
 #define DWC3_GTXFIFOSIZ_TXFDEF(n)	((n) & 0xffff)
@@ -695,6 +697,12 @@ struct dwc3_scratchpad_array {
  * @del_phy_power_chg_quirk: set if we enable delay phy power change quirk
  * @lfps_filter_quirk: set if we enable LFPS filter quirk
  * @rx_detect_poll_quirk: set if we enable rx_detect to polling LFPS quirk
+ * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
+ * @tx_de_emphasis: Tx de-emphasis value
+ * 	0       - -6dB de-emphasis
+ * 	1       - -3.5dB de-emphasis
+ * 	2       - No de-emphasis
+ * 	3       - Reserved
  */
 struct dwc3 {
 	struct usb_ctrlrequest	*ctrl_req;
@@ -810,6 +818,9 @@ struct dwc3 {
 	unsigned		del_phy_power_chg_quirk:1;
 	unsigned		lfps_filter_quirk:1;
 	unsigned		rx_detect_poll_quirk:1;
+
+	unsigned		tx_de_emphasis_quirk:1;
+	unsigned		tx_de_emphasis:2;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index 4a0f06b..e1ab900 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -36,4 +36,7 @@ struct dwc3_platform_data {
 	unsigned del_phy_power_chg_quirk:1;
 	unsigned lfps_filter_quirk:1;
 	unsigned rx_detect_poll_quirk:1;
+
+	unsigned tx_de_emphasis_quirk:1;
+	unsigned tx_de_emphasis:2;
 };
-- 
1.9.1

[PATCH v4 15/20] usb: dwc3: add disable usb3 suspend phy quirk

[Huang Rui]

This patch adds disable usb3 suspend phy quirk, and some special platforms
can configure that if it is needed.

Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
 drivers/usb/dwc3/core.c                        | 7 +++++++
 drivers/usb/dwc3/core.h                        | 2 ++
 drivers/usb/dwc3/platform_data.h               | 1 +
 4 files changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index a9e54ae..3720fca 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -32,6 +32,7 @@ Optional properties:
  - snps,tx_de_emphasis_quirk: when set core will set Tx de-emphasis value.
  - snps,tx_de_emphasis: the value driven to the PHY is controlled by the
 			LTSSM during USB3 Compliance mode.
+ - snps,dis_u3_susphy_quirk: when set core will disable USB3 suspend phy.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index b55fa5b..fdc715a 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -404,6 +404,10 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->tx_de_emphasis_quirk)
 		reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(dwc->tx_de_emphasis);
 
+	/* FIXME will move FPGA flag when AMD NL taps out */
+	if (dwc->dis_u3_susphy_quirk && dwc->is_fpga)
+		reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
+
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
 	mdelay(100);
@@ -809,6 +813,8 @@ static int dwc3_probe(struct platform_device *pdev)
 				"snps,lfps_filter_quirk");
 		dwc->rx_detect_poll_quirk = of_property_read_bool(node,
 				"snps,rx_detect_poll_quirk");
+		dwc->dis_u3_susphy_quirk = of_property_read_bool(node,
+				"snps,dis_u3_susphy_quirk");
 
 		dwc->tx_de_emphasis_quirk = of_property_read_bool(node,
 				"snps,tx_de_emphasis_quirk");
@@ -831,6 +837,7 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->del_phy_power_chg_quirk = pdata->del_phy_power_chg_quirk;
 		dwc->lfps_filter_quirk = pdata->lfps_filter_quirk;
 		dwc->rx_detect_poll_quirk = pdata->rx_detect_poll_quirk;
+		dwc->dis_u3_susphy_quirk = pdata->dis_u3_susphy_quirk;
 
 		dwc->tx_de_emphasis_quirk = pdata->tx_de_emphasis_quirk;
 		if (pdata->tx_de_emphasis)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 469ee13..be793f7 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -697,6 +697,7 @@ struct dwc3_scratchpad_array {
  * @del_phy_power_chg_quirk: set if we enable delay phy power change quirk
  * @lfps_filter_quirk: set if we enable LFPS filter quirk
  * @rx_detect_poll_quirk: set if we enable rx_detect to polling LFPS quirk
+ * @dis_u3_susphy_quirk: set if we disable usb3 suspend phy
  * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
  * @tx_de_emphasis: Tx de-emphasis value
  * 	0       - -6dB de-emphasis
@@ -818,6 +819,7 @@ struct dwc3 {
 	unsigned		del_phy_power_chg_quirk:1;
 	unsigned		lfps_filter_quirk:1;
 	unsigned		rx_detect_poll_quirk:1;
+	unsigned		dis_u3_susphy_quirk:1;
 
 	unsigned		tx_de_emphasis_quirk:1;
 	unsigned		tx_de_emphasis:2;
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index e1ab900..0f1d5ad 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -36,6 +36,7 @@ struct dwc3_platform_data {
 	unsigned del_phy_power_chg_quirk:1;
 	unsigned lfps_filter_quirk:1;
 	unsigned rx_detect_poll_quirk:1;
+	unsigned dis_u3_susphy_quirk:1;
 
 	unsigned tx_de_emphasis_quirk:1;
 	unsigned tx_de_emphasis:2;
-- 
1.9.1

[PATCH v4 16/20] usb: dwc3: add disable usb2 suspend phy quirk

[Huang Rui]

This patch adds disable usb2 suspend phy quirk, and some special platforms
can configure that if it is needed.

Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
 drivers/usb/dwc3/core.c                        | 7 +++++++
 drivers/usb/dwc3/core.h                        | 2 ++
 drivers/usb/dwc3/platform_data.h               | 1 +
 4 files changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 3720fca..feaf2c8 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -33,6 +33,7 @@ Optional properties:
  - snps,tx_de_emphasis: the value driven to the PHY is controlled by the
 			LTSSM during USB3 Compliance mode.
  - snps,dis_u3_susphy_quirk: when set core will disable USB3 suspend phy.
+ - snps,dis_u2_susphy_quirk: when set core will disable USB2 suspend phy.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index fdc715a..a28ed1c 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -423,6 +423,10 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->revision > DWC3_REVISION_194A)
 		reg |= DWC3_GUSB2PHYCFG_SUSPHY;
 
+	/* FIXME will move FPGA flag when AMD NL taps out */
+	if (dwc->dis_u2_susphy_quirk && dwc->is_fpga)
+		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
+
 	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 
 	mdelay(100);
@@ -815,6 +819,8 @@ static int dwc3_probe(struct platform_device *pdev)
 				"snps,rx_detect_poll_quirk");
 		dwc->dis_u3_susphy_quirk = of_property_read_bool(node,
 				"snps,dis_u3_susphy_quirk");
+		dwc->dis_u2_susphy_quirk = of_property_read_bool(node,
+				"snps,dis_u2_susphy_quirk");
 
 		dwc->tx_de_emphasis_quirk = of_property_read_bool(node,
 				"snps,tx_de_emphasis_quirk");
@@ -838,6 +844,7 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->lfps_filter_quirk = pdata->lfps_filter_quirk;
 		dwc->rx_detect_poll_quirk = pdata->rx_detect_poll_quirk;
 		dwc->dis_u3_susphy_quirk = pdata->dis_u3_susphy_quirk;
+		dwc->dis_u2_susphy_quirk = pdata->dis_u2_susphy_quirk;
 
 		dwc->tx_de_emphasis_quirk = pdata->tx_de_emphasis_quirk;
 		if (pdata->tx_de_emphasis)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index be793f7..8b6c308 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -698,6 +698,7 @@ struct dwc3_scratchpad_array {
  * @lfps_filter_quirk: set if we enable LFPS filter quirk
  * @rx_detect_poll_quirk: set if we enable rx_detect to polling LFPS quirk
  * @dis_u3_susphy_quirk: set if we disable usb3 suspend phy
+ * @dis_u2_susphy_quirk: set if we disable usb2 suspend phy
  * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
  * @tx_de_emphasis: Tx de-emphasis value
  * 	0       - -6dB de-emphasis
@@ -820,6 +821,7 @@ struct dwc3 {
 	unsigned		lfps_filter_quirk:1;
 	unsigned		rx_detect_poll_quirk:1;
 	unsigned		dis_u3_susphy_quirk:1;
+	unsigned		dis_u2_susphy_quirk:1;
 
 	unsigned		tx_de_emphasis_quirk:1;
 	unsigned		tx_de_emphasis:2;
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index 0f1d5ad..245300b 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -37,6 +37,7 @@ struct dwc3_platform_data {
 	unsigned lfps_filter_quirk:1;
 	unsigned rx_detect_poll_quirk:1;
 	unsigned dis_u3_susphy_quirk:1;
+	unsigned dis_u2_susphy_quirk:1;
 
 	unsigned tx_de_emphasis_quirk:1;
 	unsigned tx_de_emphasis:2;
-- 
1.9.1

[PATCH v4 17/20] PCI: Add support for AMD Nolan USB3 DRD

[Huang Rui]

This patch adds PCI id for USB3 Dual-Role Device of AMD Nolan (NL) SoC.
It will be used for PCI quirks and DWC3 device driver.

Signed-off-by: Jason Chang <jason.chang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
---
 include/linux/pci_ids.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 1fa99a3..5decad7 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -562,6 +562,7 @@
 #define PCI_DEVICE_ID_AMD_8131_BRIDGE	0x7450
 #define PCI_DEVICE_ID_AMD_8131_APIC	0x7451
 #define PCI_DEVICE_ID_AMD_8132_BRIDGE	0x7458
+#define PCI_DEVICE_ID_AMD_NL_USB	0x7912
 #define PCI_DEVICE_ID_AMD_CS5535_IDE    0x208F
 #define PCI_DEVICE_ID_AMD_CS5536_ISA    0x2090
 #define PCI_DEVICE_ID_AMD_CS5536_FLASH  0x2091
-- 
1.9.1

[PATCH v4 18/20] PCI: Prevent xHCI driver from claiming AMD Nolan USB3 DRD device

[Huang Rui]

The AMD Nolan (NL) SoC contains a DesignWare USB3 Dual-Role Device that can
be operated either as a USB Host or a USB Device.  In the AMD NL platform,
this device ([1022:7912]) has a class code of PCI_CLASS_SERIAL_USB_XHCI
(0x0c0330), which means the xhci driver will claim it.

But the dwc3 driver is a more specific driver for this device, and we'd
prefer to use it instead of xhci.  To prevent xhci from claiming the
device, change the class code to 0x0c03fe, which the PCI r3.0 spec defines
as "USB device (not host controller)".  The dwc3 driver can then claim it
based on its Vendor and Device ID.

Suggested-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jason Chang <jason.chang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 drivers/pci/quirks.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 90acb32..ed6f89b 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -379,6 +379,26 @@ static void quirk_ati_exploding_mce(struct pci_dev *dev)
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI,	PCI_DEVICE_ID_ATI_RS100,   quirk_ati_exploding_mce);
 
 /*
+ * In the AMD NL platform, this device ([1022:7912]) has a class code of
+ * PCI_CLASS_SERIAL_USB_XHCI (0x0c0330), which means the xhci driver will
+ * claim it.
+ * But the dwc3 driver is a more specific driver for this device, and we'd
+ * prefer to use it instead of xhci. To prevent xhci from claiming the
+ * device, change the class code to 0x0c03fe, which the PCI r3.0 spec
+ * defines as "USB device (not host controller)". The dwc3 driver can then
+ * claim it based on its Vendor and Device ID.
+ */
+static void quirk_amd_nl_class(struct pci_dev *pdev)
+{
+	/*
+	 * Use 'USB Device' (0x0c03fe) instead of PCI header provided
+	 */
+	pdev->class = 0x0c03fe;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB,
+		quirk_amd_nl_class);
+
+/*
  * Let's make the southbridge information explicit instead
  * of having to worry about people probing the ACPI areas,
  * for example.. (Yes, it happens, and if you read the wrong
-- 
1.9.1

[PATCH v4 19/20] usb: dwc3: add support for AMD Nolan platform

[Huang Rui]

This patch adds support for AMD Nolan (NL) FPGA and SoC platform.

Cc: Jason Chang <jason.chang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 drivers/usb/dwc3/dwc3-pci.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index ada975f..257fb3f9e 100644
--- a/drivers/usb/dwc3/dwc3-pci.c
+++ b/drivers/usb/dwc3/dwc3-pci.c
@@ -145,6 +145,28 @@ static int dwc3_pci_probe(struct pci_dev *pci,
 	res[1].name	= "dwc_usb3";
 	res[1].flags	= IORESOURCE_IRQ;
 
+	if (pci->vendor == PCI_VENDOR_ID_AMD &&
+			pci->device == PCI_DEVICE_ID_AMD_NL_USB) {
+		dwc3_pdata.has_lpm_erratum = true;
+		dwc3_pdata.lpm_nyet_threshold = 0xf;
+
+		dwc3_pdata.u2exit_lfps_quirk = true;
+		dwc3_pdata.u2ss_inp3_quirk = true;
+		dwc3_pdata.req_p1p2p3_quirk = true;
+		dwc3_pdata.del_p1p2p3_quirk = true;
+		dwc3_pdata.del_phy_power_chg_quirk = true;
+		dwc3_pdata.lfps_filter_quirk = true;
+		dwc3_pdata.rx_detect_poll_quirk = true;
+
+		dwc3_pdata.tx_de_emphasis_quirk = true;
+		dwc3_pdata.tx_de_emphasis = 1;
+
+		/* FIXME these quirks should move when AMD NL taps out */
+		dwc3_pdata.disable_scramble_quirk = true;
+		dwc3_pdata.dis_u3_susphy_quirk = true;
+		dwc3_pdata.dis_u2_susphy_quirk = true;
+	}
+
 	ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res));
 	if (ret) {
 		dev_err(dev, "couldn't add resources to dwc3 device\n");
@@ -194,6 +216,7 @@ static const struct pci_device_id dwc3_pci_id_table[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
 	{  }	/* Terminating Entry */
 };
 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
-- 
1.9.1

[PATCH v4 20/20] usb: dwc3: make HIRD threshold configurable

[Huang Rui]

HIRD threshold should be configurable by different platforms.

>From DesignWare databook:
When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or
equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals
utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1.

When HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than
HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt |  3 +++
 drivers/usb/dwc3/core.c                        | 17 +++++++++++++++++
 drivers/usb/dwc3/core.h                        |  6 ++++++
 drivers/usb/dwc3/gadget.c                      |  6 +-----
 drivers/usb/dwc3/platform_data.h               |  3 +++
 5 files changed, 30 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index feaf2c8..5b99755 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -34,6 +34,9 @@ Optional properties:
 			LTSSM during USB3 Compliance mode.
  - snps,dis_u3_susphy_quirk: when set core will disable USB3 suspend phy.
  - snps,dis_u2_susphy_quirk: when set core will disable USB2 suspend phy.
+ - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
+			utmi_l1_suspend_n, false when asserts utmi_sleep_n
+ - snps,hird-threshold: HIRD threshold
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index a28ed1c..f4172ab 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -729,6 +729,7 @@ static int dwc3_probe(struct platform_device *pdev)
 	struct dwc3		*dwc;
 	u8			lpm_nyet_threshold;
 	u8			tx_de_emphasis;
+	u8			hird_threshold;
 
 	int			ret;
 
@@ -790,12 +791,22 @@ static int dwc3_probe(struct platform_device *pdev)
 	/* default to -3.5dB de-emphasis */
 	tx_de_emphasis = 1;
 
+	/*
+	 * defalut to assert utmi_sleep_n and use maximum allowed HIRD
+	 * threshold value of 0b1100
+	 */
+	hird_threshold = 12;
+
 	if (node) {
 		dwc->maximum_speed = of_usb_get_maximum_speed(node);
 		dwc->has_lpm_erratum = of_property_read_bool(node,
 				"snps,has-lpm-erratum");
 		of_property_read_u8(node, "snps,lpm-nyet-threshold",
 				&lpm_nyet_threshold);
+		dwc->is_utmi_l1_suspend = of_property_read_bool(node,
+				"snps,is-utmi-l1-suspend");
+		of_property_read_u8(node, "snps,hird-threshold",
+				&hird_threshold);
 
 		dwc->needs_fifo_resize = of_property_read_bool(node,
 				"tx-fifo-resize");
@@ -831,6 +842,9 @@ static int dwc3_probe(struct platform_device *pdev)
 		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
 		if (pdata->lpm_nyet_threshold)
 			lpm_nyet_threshold = pdata->lpm_nyet_threshold;
+		dwc->is_utmi_l1_suspend = pdata->is_utmi_l1_suspend;
+		if (pdata->hird_threshold)
+			hird_threshold = pdata->hird_threshold;
 
 		dwc->needs_fifo_resize = pdata->tx_fifo_resize;
 		dwc->dr_mode = pdata->dr_mode;
@@ -858,6 +872,9 @@ static int dwc3_probe(struct platform_device *pdev)
 	dwc->lpm_nyet_threshold = lpm_nyet_threshold;
 	dwc->tx_de_emphasis = tx_de_emphasis;
 
+	dwc->hird_threshold = hird_threshold
+		| (dwc->is_utmi_l1_suspend << 4);
+
 	ret = dwc3_core_get_phy(dwc);
 	if (ret)
 		return ret;
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 8b6c308..2c90139 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -675,12 +675,16 @@ struct dwc3_scratchpad_array {
  * @test_mode: true when we're entering a USB test mode
  * @test_mode_nr: test feature selector
  * @lpm_nyet_threshold: LPM NYET response threshold
+ * @hird_threshold: HIRD threshold
  * @delayed_status: true when gadget driver asks for delayed status
  * @ep0_bounced: true when we used bounce buffer
  * @ep0_expect_in: true when we expect a DATA IN transfer
  * @has_hibernation: true when dwc3 was configured with Hibernation
  * @has_lpm_erratum: true when core was configured with LPM Erratum. Note that
  *			there's now way for software to detect this in runtime.
+ * @is_utmi_l1_suspend: the core asserts output signal
+ * 	0	- utmi_sleep_n
+ * 	1	- utmi_l1_suspend_n
  * @is_selfpowered: true when we are selfpowered
  * @is_fpga: true when we are using the FPGA board
  * @needs_fifo_resize: not all users might want fifo resizing, flag it
@@ -797,12 +801,14 @@ struct dwc3 {
 	u8			test_mode;
 	u8			test_mode_nr;
 	u8			lpm_nyet_threshold;
+	u8			hird_threshold;
 
 	unsigned		delayed_status:1;
 	unsigned		ep0_bounced:1;
 	unsigned		ep0_expect_in:1;
 	unsigned		has_hibernation:1;
 	unsigned		has_lpm_erratum:1;
+	unsigned		is_utmi_l1_suspend:1;
 	unsigned		is_selfpowered:1;
 	unsigned		is_fpga:1;
 	unsigned		needs_fifo_resize:1;
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 2c0d19a4..303bb67 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2291,11 +2291,7 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
 		reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 		reg &= ~(DWC3_DCTL_HIRD_THRES_MASK | DWC3_DCTL_L1_HIBER_EN);
 
-		/*
-		 * TODO: This should be configurable. For now using
-		 * maximum allowed HIRD threshold value of 0b1100
-		 */
-		reg |= DWC3_DCTL_HIRD_THRES(12);
+		reg |= DWC3_DCTL_HIRD_THRES(dwc->hird_threshold);
 
 		/*
 		 * When dwc3 revisions >= 2.40a, LPM Erratum is enabled and
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index 245300b..a3a3b6d 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -25,6 +25,9 @@ struct dwc3_platform_data {
 	enum usb_dr_mode dr_mode;
 	bool tx_fifo_resize;
 
+	unsigned is_utmi_l1_suspend:1;
+	u8 hird_threshold;
+
 	u8 lpm_nyet_threshold;
 
 	unsigned disable_scramble_quirk:1;
-- 
1.9.1

Re: [PATCH v4 01/20] usb: dwc3: enable hibernation if to be supported

[Arnd Bergmann]

On Thursday 30 October 2014 18:08:26 Huang Rui wrote:
> It enables hibernation if the function is set in coreConsultant.
> 
> Suggested-by: Felipe Balbi <balbi@ti.com>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> 

Something went wrong with the Signed-off-by lines here. 
You should never add someone else's Signed-off-by below yours.

I took a brief look at the entire series and the patches all look good
to me, but you have made the same mistake with the Signed-off-by
multiple times.

	Arnd

Re: [PATCH v4 01/20] usb: dwc3: enable hibernation if to be supported

[Huang Rui]

On Thu, Oct 30, 2014 at 12:35:56PM +0100, Arnd Bergmann wrote:
> On Thursday 30 October 2014 18:08:26 Huang Rui wrote:
> > It enables hibernation if the function is set in coreConsultant.
> > 
> > Suggested-by: Felipe Balbi <balbi@ti.com>
> > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > 
> 
> Something went wrong with the Signed-off-by lines here. 
> You should never add someone else's Signed-off-by below yours.
> 
> I took a brief look at the entire series and the patches all look good
> to me, but you have made the same mistake with the Signed-off-by
> multiple times.
> 

Actually, this patch is applied at testing branch, so Felipe added his
Signed-off-by. Please see:

http://git.kernel.org/cgit/linux/kernel/git/balbi/usb.git/commit/?h=testing/next&id=5c9669f92c9441d134f7776274e9afb71c246acc

I just update some comment description in V4.

Thanks,
Rui

Re: [PATCH v4 01/20] usb: dwc3: enable hibernation if to be supported

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 800 bytes --]

On Thu, Oct 30, 2014 at 12:35:56PM +0100, Arnd Bergmann wrote:
> On Thursday 30 October 2014 18:08:26 Huang Rui wrote:
> > It enables hibernation if the function is set in coreConsultant.
> > 
> > Suggested-by: Felipe Balbi <balbi@ti.com>
> > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > 
> 
> Something went wrong with the Signed-off-by lines here. 
> You should never add someone else's Signed-off-by below yours.
> 
> I took a brief look at the entire series and the patches all look good
> to me, but you have made the same mistake with the Signed-off-by
> multiple times.

there are no mistakes, I just asked Huang to resend what I had on my
testing/next because it had not been sent to devicetree mailing list.

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

Re: [PATCH v4 01/20] usb: dwc3: enable hibernation if to be supported

[Arnd Bergmann]

On Thursday 30 October 2014 09:08:32 Felipe Balbi wrote:
> On Thu, Oct 30, 2014 at 12:35:56PM +0100, Arnd Bergmann wrote:
> > On Thursday 30 October 2014 18:08:26 Huang Rui wrote:
> > > It enables hibernation if the function is set in coreConsultant.
> > > 
> > > Suggested-by: Felipe Balbi <balbi@ti.com>
> > > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > > 
> > 
> > Something went wrong with the Signed-off-by lines here. 
> > You should never add someone else's Signed-off-by below yours.
> > 
> > I took a brief look at the entire series and the patches all look good
> > to me, but you have made the same mistake with the Signed-off-by
> > multiple times.
> 
> there are no mistakes, I just asked Huang to resend what I had on my
> testing/next because it had not been sent to devicetree mailing list.
> 

It's definitely a tricky question what the right Signed-off-by
chain is in this case, I guess strictly speaking it could have
been 

Suggested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>

which could correctly track where the patches went, but it's also
somewhat silly.

I would probably just have dropped the second Signed-off-by,
so that the last S-o-b in the patch matches the "From", as we expect.

It's definitely good to know that Huang Rui was not faking your
Signed-off-by but that you had actually provided it yourself.

	Arnd

Re: [PATCH v4 01/20] usb: dwc3: enable hibernation if to be supported

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 1485 bytes --]

On Thu, Oct 30, 2014 at 03:14:17PM +0100, Arnd Bergmann wrote:
> On Thursday 30 October 2014 09:08:32 Felipe Balbi wrote:
> > On Thu, Oct 30, 2014 at 12:35:56PM +0100, Arnd Bergmann wrote:
> > > On Thursday 30 October 2014 18:08:26 Huang Rui wrote:
> > > > It enables hibernation if the function is set in coreConsultant.
> > > > 
> > > > Suggested-by: Felipe Balbi <balbi@ti.com>
> > > > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > > > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > > > 
> > > 
> > > Something went wrong with the Signed-off-by lines here. 
> > > You should never add someone else's Signed-off-by below yours.
> > > 
> > > I took a brief look at the entire series and the patches all look good
> > > to me, but you have made the same mistake with the Signed-off-by
> > > multiple times.
> > 
> > there are no mistakes, I just asked Huang to resend what I had on my
> > testing/next because it had not been sent to devicetree mailing list.
> > 
> 
> It's definitely a tricky question what the right Signed-off-by
> chain is in this case, I guess strictly speaking it could have
> been 
> 
> Suggested-by: Felipe Balbi <balbi@ti.com>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> 
> which could correctly track where the patches went, but it's also
> somewhat silly.

somewhat ? You don't need to be so black and white.

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

Re: [PATCH v4 20/20] usb: dwc3: make HIRD threshold configurable

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 2321 bytes --]

On Thu, Oct 30, 2014 at 06:08:45PM +0800, Huang Rui wrote:
> HIRD threshold should be configurable by different platforms.
> 
> From DesignWare databook:
> When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or
> equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals
> utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1.
> 
> When HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than
> HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1.
> 
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> ---
>  Documentation/devicetree/bindings/usb/dwc3.txt |  3 +++
>  drivers/usb/dwc3/core.c                        | 17 +++++++++++++++++
>  drivers/usb/dwc3/core.h                        |  6 ++++++
>  drivers/usb/dwc3/gadget.c                      |  6 +-----
>  drivers/usb/dwc3/platform_data.h               |  3 +++
>  5 files changed, 30 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
> index feaf2c8..5b99755 100644
> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> @@ -34,6 +34,9 @@ Optional properties:
>  			LTSSM during USB3 Compliance mode.
>   - snps,dis_u3_susphy_quirk: when set core will disable USB3 suspend phy.
>   - snps,dis_u2_susphy_quirk: when set core will disable USB2 suspend phy.
> + - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
> +			utmi_l1_suspend_n, false when asserts utmi_sleep_n
> + - snps,hird-threshold: HIRD threshold
>  
>  This is usually a subnode to DWC3 glue to which it is connected.
>  
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index a28ed1c..f4172ab 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -729,6 +729,7 @@ static int dwc3_probe(struct platform_device *pdev)
>  	struct dwc3		*dwc;
>  	u8			lpm_nyet_threshold;
>  	u8			tx_de_emphasis;
> +	u8			hird_threshold;
>  
>  	int			ret;
>  
> @@ -790,12 +791,22 @@ static int dwc3_probe(struct platform_device *pdev)
>  	/* default to -3.5dB de-emphasis */
>  	tx_de_emphasis = 1;
>  
> +	/*
> +	 * defalut to assert utmi_sleep_n and use maximum allowed HIRD

default

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

Re: [PATCH v4 19/20] usb: dwc3: add support for AMD Nolan platform

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 1421 bytes --]

On Thu, Oct 30, 2014 at 06:08:44PM +0800, Huang Rui wrote:
> This patch adds support for AMD Nolan (NL) FPGA and SoC platform.
> 
> Cc: Jason Chang <jason.chang@amd.com>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> ---
>  drivers/usb/dwc3/dwc3-pci.c | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
> index ada975f..257fb3f9e 100644
> --- a/drivers/usb/dwc3/dwc3-pci.c
> +++ b/drivers/usb/dwc3/dwc3-pci.c
> @@ -145,6 +145,28 @@ static int dwc3_pci_probe(struct pci_dev *pci,
>  	res[1].name	= "dwc_usb3";
>  	res[1].flags	= IORESOURCE_IRQ;
>  
> +	if (pci->vendor == PCI_VENDOR_ID_AMD &&
> +			pci->device == PCI_DEVICE_ID_AMD_NL_USB) {
> +		dwc3_pdata.has_lpm_erratum = true;
> +		dwc3_pdata.lpm_nyet_threshold = 0xf;
> +
> +		dwc3_pdata.u2exit_lfps_quirk = true;
> +		dwc3_pdata.u2ss_inp3_quirk = true;
> +		dwc3_pdata.req_p1p2p3_quirk = true;
> +		dwc3_pdata.del_p1p2p3_quirk = true;
> +		dwc3_pdata.del_phy_power_chg_quirk = true;
> +		dwc3_pdata.lfps_filter_quirk = true;
> +		dwc3_pdata.rx_detect_poll_quirk = true;
> +
> +		dwc3_pdata.tx_de_emphasis_quirk = true;
> +		dwc3_pdata.tx_de_emphasis = 1;
> +
> +		/* FIXME these quirks should move when AMD NL taps out */

do you mean ?

		/*
		 * FIXME these quirks should be removed when AMD NL
		 * tapes out
		 */

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

Re: [PATCH v4 16/20] usb: dwc3: add disable usb2 suspend phy quirk

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 1685 bytes --]

On Thu, Oct 30, 2014 at 06:08:41PM +0800, Huang Rui wrote:
> This patch adds disable usb2 suspend phy quirk, and some special platforms
> can configure that if it is needed.
> 
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> ---
>  Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
>  drivers/usb/dwc3/core.c                        | 7 +++++++
>  drivers/usb/dwc3/core.h                        | 2 ++
>  drivers/usb/dwc3/platform_data.h               | 1 +
>  4 files changed, 11 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
> index 3720fca..feaf2c8 100644
> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> @@ -33,6 +33,7 @@ Optional properties:
>   - snps,tx_de_emphasis: the value driven to the PHY is controlled by the
>  			LTSSM during USB3 Compliance mode.
>   - snps,dis_u3_susphy_quirk: when set core will disable USB3 suspend phy.
> + - snps,dis_u2_susphy_quirk: when set core will disable USB2 suspend phy.
>  
>  This is usually a subnode to DWC3 glue to which it is connected.
>  
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index fdc715a..a28ed1c 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -423,6 +423,10 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
>  	if (dwc->revision > DWC3_REVISION_194A)
>  		reg |= DWC3_GUSB2PHYCFG_SUSPHY;
>  
> +	/* FIXME will move FPGA flag when AMD NL taps out */

no need to mention AMD NL here. We still want to have is_fpga flag, just
dwc3-pci will be patches once AMD NL tapes out.

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

Re: [PATCH v4 14/20] usb: dwc3: add Tx de-emphasis quirk

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 926 bytes --]

On Thu, Oct 30, 2014 at 06:08:39PM +0800, Huang Rui wrote:
> This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is
> configurable according to PIPE3 specification.
> 
> Value		Description
> 0		-6dB de-emphasis
> 1		-3.5dB de-emphasis
> 2		No de-emphasis
> 3		Reserved
> 
> It can be configured on DT or platform data.
> 
> Signed-off-by: Huang Rui <ray.huang@amd.com>

doesn't apply:

checking file Documentation/devicetree/bindings/usb/dwc3.txt
checking file drivers/usb/dwc3/core.c
Hunk #2 succeeded at 718 (offset -2 lines).
Hunk #3 succeeded at 777 (offset -2 lines).
Hunk #4 succeeded at 807 (offset -2 lines).
Hunk #5 succeeded at 829 (offset -2 lines).
Hunk #6 succeeded at 840 (offset -2 lines).
checking file drivers/usb/dwc3/core.h
Hunk #2 FAILED at 697.
1 out of 3 hunks FAILED
checking file drivers/usb/dwc3/platform_data.h

please rebase on testing/next

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

Re: [PATCH v4 14/20] usb: dwc3: add Tx de-emphasis quirk

[Huang Rui]

On Thu, Oct 30, 2014 at 11:42:10AM -0500, Felipe Balbi wrote:
> On Thu, Oct 30, 2014 at 06:08:39PM +0800, Huang Rui wrote:
> > This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is
> > configurable according to PIPE3 specification.
> > 
> > Value		Description
> > 0		-6dB de-emphasis
> > 1		-3.5dB de-emphasis
> > 2		No de-emphasis
> > 3		Reserved
> > 
> > It can be configured on DT or platform data.
> > 
> > Signed-off-by: Huang Rui <ray.huang@amd.com>
> 
> doesn't apply:
> 
> checking file Documentation/devicetree/bindings/usb/dwc3.txt
> checking file drivers/usb/dwc3/core.c
> Hunk #2 succeeded at 718 (offset -2 lines).
> Hunk #3 succeeded at 777 (offset -2 lines).
> Hunk #4 succeeded at 807 (offset -2 lines).
> Hunk #5 succeeded at 829 (offset -2 lines).
> Hunk #6 succeeded at 840 (offset -2 lines).
> checking file drivers/usb/dwc3/core.h
> Hunk #2 FAILED at 697.
> 1 out of 3 hunks FAILED
> checking file drivers/usb/dwc3/platform_data.h
> 
> please rebase on testing/next
> 

That's because in patch 12 and other ones you applied, I changed
addreviations to uppercase such as "lfps" -> "LFPS", "fpga" -> "FPGA".

Previous 13 patches are already applied. Do you mean, I send the other
patches since "Tx de-emphasis" (patch 14) after rebased current
branch.

If yes, at patch 1, "Enabling this bit ... hibernation .. yet", should
it be updated in extra patch?

Thanks,
Rui

Re: [PATCH v4 16/20] usb: dwc3: add disable usb2 suspend phy quirk

[Huang Rui]

On Thu, Oct 30, 2014 at 11:39:43AM -0500, Felipe Balbi wrote:
> On Thu, Oct 30, 2014 at 06:08:41PM +0800, Huang Rui wrote:
> > This patch adds disable usb2 suspend phy quirk, and some special platforms
> > can configure that if it is needed.
> > 
> > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > ---
> >  Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
> >  drivers/usb/dwc3/core.c                        | 7 +++++++
> >  drivers/usb/dwc3/core.h                        | 2 ++
> >  drivers/usb/dwc3/platform_data.h               | 1 +
> >  4 files changed, 11 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
> > index 3720fca..feaf2c8 100644
> > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> > @@ -33,6 +33,7 @@ Optional properties:
> >   - snps,tx_de_emphasis: the value driven to the PHY is controlled by the
> >  			LTSSM during USB3 Compliance mode.
> >   - snps,dis_u3_susphy_quirk: when set core will disable USB3 suspend phy.
> > + - snps,dis_u2_susphy_quirk: when set core will disable USB2 suspend phy.
> >  
> >  This is usually a subnode to DWC3 glue to which it is connected.
> >  
> > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> > index fdc715a..a28ed1c 100644
> > --- a/drivers/usb/dwc3/core.c
> > +++ b/drivers/usb/dwc3/core.c
> > @@ -423,6 +423,10 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
> >  	if (dwc->revision > DWC3_REVISION_194A)
> >  		reg |= DWC3_GUSB2PHYCFG_SUSPHY;
> >  
> > +	/* FIXME will move FPGA flag when AMD NL taps out */
> 
> no need to mention AMD NL here. We still want to have is_fpga flag, just
> dwc3-pci will be patches once AMD NL tapes out.
> 

OK, will move it.

Thanks,
Rui

Re: [PATCH v4 19/20] usb: dwc3: add support for AMD Nolan platform

[Huang Rui]

On Thu, Oct 30, 2014 at 11:38:40AM -0500, Felipe Balbi wrote:
> On Thu, Oct 30, 2014 at 06:08:44PM +0800, Huang Rui wrote:
> > This patch adds support for AMD Nolan (NL) FPGA and SoC platform.
> > 
> > Cc: Jason Chang <jason.chang@amd.com>
> > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > ---
> >  drivers/usb/dwc3/dwc3-pci.c | 23 +++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> > 
> > diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
> > index ada975f..257fb3f9e 100644
> > --- a/drivers/usb/dwc3/dwc3-pci.c
> > +++ b/drivers/usb/dwc3/dwc3-pci.c
> > @@ -145,6 +145,28 @@ static int dwc3_pci_probe(struct pci_dev *pci,
> >  	res[1].name	= "dwc_usb3";
> >  	res[1].flags	= IORESOURCE_IRQ;
> >  
> > +	if (pci->vendor == PCI_VENDOR_ID_AMD &&
> > +			pci->device == PCI_DEVICE_ID_AMD_NL_USB) {
> > +		dwc3_pdata.has_lpm_erratum = true;
> > +		dwc3_pdata.lpm_nyet_threshold = 0xf;
> > +
> > +		dwc3_pdata.u2exit_lfps_quirk = true;
> > +		dwc3_pdata.u2ss_inp3_quirk = true;
> > +		dwc3_pdata.req_p1p2p3_quirk = true;
> > +		dwc3_pdata.del_p1p2p3_quirk = true;
> > +		dwc3_pdata.del_phy_power_chg_quirk = true;
> > +		dwc3_pdata.lfps_filter_quirk = true;
> > +		dwc3_pdata.rx_detect_poll_quirk = true;
> > +
> > +		dwc3_pdata.tx_de_emphasis_quirk = true;
> > +		dwc3_pdata.tx_de_emphasis = 1;
> > +
> > +		/* FIXME these quirks should move when AMD NL taps out */
> 
> do you mean ?
> 
> 		/*
> 		 * FIXME these quirks should be removed when AMD NL
> 		 * tapes out
> 		 */
> 

That's right, will update.

Thanks,
Rui

Re: [PATCH v4 14/20] usb: dwc3: add Tx de-emphasis quirk

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 1709 bytes --]

Hi,

On Fri, Oct 31, 2014 at 09:29:55AM +0800, Huang Rui wrote:
> On Thu, Oct 30, 2014 at 11:42:10AM -0500, Felipe Balbi wrote:
> > On Thu, Oct 30, 2014 at 06:08:39PM +0800, Huang Rui wrote:
> > > This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is
> > > configurable according to PIPE3 specification.
> > > 
> > > Value		Description
> > > 0		-6dB de-emphasis
> > > 1		-3.5dB de-emphasis
> > > 2		No de-emphasis
> > > 3		Reserved
> > > 
> > > It can be configured on DT or platform data.
> > > 
> > > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > 
> > doesn't apply:
> > 
> > checking file Documentation/devicetree/bindings/usb/dwc3.txt
> > checking file drivers/usb/dwc3/core.c
> > Hunk #2 succeeded at 718 (offset -2 lines).
> > Hunk #3 succeeded at 777 (offset -2 lines).
> > Hunk #4 succeeded at 807 (offset -2 lines).
> > Hunk #5 succeeded at 829 (offset -2 lines).
> > Hunk #6 succeeded at 840 (offset -2 lines).
> > checking file drivers/usb/dwc3/core.h
> > Hunk #2 FAILED at 697.
> > 1 out of 3 hunks FAILED
> > checking file drivers/usb/dwc3/platform_data.h
> > 
> > please rebase on testing/next
> > 
> 
> That's because in patch 12 and other ones you applied, I changed
> addreviations to uppercase such as "lfps" -> "LFPS", "fpga" -> "FPGA".

didn't notice that. I'll just reapply the entire series.

> Previous 13 patches are already applied. Do you mean, I send the other
> patches since "Tx de-emphasis" (patch 14) after rebased current
> branch.
> 
> If yes, at patch 1, "Enabling this bit ... hibernation .. yet", should
> it be updated in extra patch?

don't worry, I'll reapply the whole series, thanks :-)

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]