linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: <devicetree@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-pci@vger.kernel.org, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH v3 00/15] Bring suspend to RAM support to PCIe Aardvark driver
Date: Tue,  8 Jan 2019 17:24:25 +0100	[thread overview]
Message-ID: <20190108162441.5278-1-miquel.raynal@bootlin.com> (raw)

Hello,

As part of an effort to bring suspend to RAM support to Armada 3700
SoCs (main target: ESPRESSObin), this series handles the work around
the PCIe IP.

First, more configuration is done in the 'setup' helper as inspired
from the U-Boot driver. This is needed to entirely initialize the IP
during future resume operation (patch 1).

Then, reset GPIO, PHY and clock support are introduced (patch 2-4). As
current device trees do not provide the corresponding properties, not
finding one of these properties is not an error and just produces a
warning. However, if the property is present, an error during PHY
initialization will fail the probe of the driver.

Note: To be sure the clock will be resumed before this driver, a first
series adding links between clocks and consumers has been submitted,
see [1]. Anyway, having the clock series applied first is not needed.

Patch 5 adds suspend/resume hooks, re-using all the above.

Finally, bindings and device trees are updated to reflect the hardware
(patch 6-12). While the clock depends on the SoC, the reset GPIO and
the PHY depends on the board so the clock is added in the
armada-37xx.dtsi file while the two other properties are added in
armada-3720-espressobin.dts.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2019-January/623885.html

Thanks,
Miquèl


Changes since v2:
=================
* Minor patches reordering.
* Added pinctrl patches from Gregory Clement fixing the PCIe pins. His
  changes implied modifications in the DT/bindings patches adding PCIe
  reset pin support.
* Added a new patch that enlarges the PIO timeout of the driver
  (explanations in the commit log).
* With the timeout changed, removed the "experimental delay" that was
  needed at resume time before accessing any register.

Changes since v1:
=================
* Change the capitalization in commit titles to follow the PCI
  subsystem rules.
* Added Suggested-by tag to the patch adding PHY support and to the
  patch adding the PHY property in the DT.
* Added Rob's Reviewed-by tags on bindings.
* I am following the discussion about calling functions that might
  sleep in a NOIRQ context. As there is no real problem yet (as per my
  understanding), I did not change anything on this regard.


Miquel Raynal (15):
  PCI: aardvark: Enlarge PIO timeout
  PCI: aardvark: Configure more registers in the configuration helper
  PCI: aardvark: Add clock support
  PCI: aardvark: Add PHY support
  PCI: aardvark: Add PCIe warm reset support
  PCI: aardvark: Add external reset GPIO support
  PCI: aardvark: Add suspend to RAM support
  dt-bindings: PCI: aardvark: Describe the clocks property
  dt-bindings: PCI: aardvark: Describe the PHY property
  dt-bindings: PCI: aardvark: Describe the PCIe endpoint card reset pins
  dt-bindings: PCI: aardvark: Describe the reset-gpios property
  ARM64: dts: marvell: armada-37xx: declare PCIe clock
  ARM64: dts: marvell: armada-3720-espressobin: declare PCIe PHY
  ARM64: dts: marvell: armada-37xx: declare PCIe reset pin
  ARM64: dts: marvell: armada-3720-espressobin: declare PCIe warm reset
    pin

 .../devicetree/bindings/pci/aardvark-pci.txt  |  14 ++
 .../dts/marvell/armada-3720-espressobin.dts   |   3 +
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi  |  10 +
 drivers/pci/controller/pci-aardvark.c         | 217 +++++++++++++++++-
 4 files changed, 243 insertions(+), 1 deletion(-)

-- 
2.19.1


             reply	other threads:[~2019-01-08 16:24 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-08 16:24 Miquel Raynal [this message]
2019-01-08 16:24 ` [PATCH v3 01/15] PCI: aardvark: Enlarge PIO timeout Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 02/15] PCI: aardvark: Configure more registers in the configuration helper Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 03/15] PCI: aardvark: Add clock support Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 04/15] PCI: aardvark: Add PHY support Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 05/15] PCI: aardvark: Add PCIe warm reset support Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 06/15] PCI: aardvark: Add external reset GPIO support Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 07/15] PCI: aardvark: Add suspend to RAM support Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 08/15] dt-bindings: PCI: aardvark: Describe the clocks property Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 09/15] dt-bindings: PCI: aardvark: Describe the PHY property Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 10/15] dt-bindings: PCI: aardvark: Describe the PCIe endpoint card reset pins Miquel Raynal
2019-01-15 20:13   ` Rob Herring
2019-01-08 16:24 ` [PATCH v3 11/15] dt-bindings: PCI: aardvark: Describe the reset-gpios property Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 12/15] ARM64: dts: marvell: armada-37xx: declare PCIe clock Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 13/15] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe PHY Miquel Raynal
2019-02-06 14:17   ` Gregory CLEMENT
2019-01-08 16:24 ` [PATCH v3 14/15] ARM64: dts: marvell: armada-37xx: declare PCIe reset pin Miquel Raynal
2019-02-06 11:11   ` Gregory CLEMENT
2019-01-08 16:24 ` [PATCH v3 15/15] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe warm " Miquel Raynal
2019-02-06 11:12   ` Gregory CLEMENT
2019-01-18 16:51 ` [PATCH v3 00/15] Bring suspend to RAM support to PCIe Aardvark driver Gregory CLEMENT
2019-01-20 15:16   ` Miquel Raynal
2019-01-23 17:05 ` Lorenzo Pieralisi
2019-01-25 10:05   ` Miquel Raynal
2019-01-25 12:40     ` Lorenzo Pieralisi
2019-01-25 12:57       ` Miquel Raynal
2019-01-25 17:38         ` Lorenzo Pieralisi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190108162441.5278-1-miquel.raynal@bootlin.com \
    --to=miquel.raynal@bootlin.com \
    --cc=andrew@lunn.ch \
    --cc=antoine.tenart@bootlin.com \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gregory.clement@bootlin.com \
    --cc=jason@lakedaemon.net \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=maxime.chevallier@bootlin.com \
    --cc=nadavh@marvell.com \
    --cc=robh+dt@kernel.org \
    --cc=sebastian.hesselbarth@gmail.com \
    --cc=thomas.petazzoni@bootlin.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).