linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: <devicetree@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-pci@vger.kernel.org, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH v3 04/15] PCI: aardvark: Add PHY support
Date: Tue,  8 Jan 2019 17:24:29 +0100	[thread overview]
Message-ID: <20190108162441.5278-5-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com>

The IP needs its PHY to be properly configured to work. While the PHY
is usually already configured by the bootloader, we will need this
feature when adding S2RAM support. Take care of registering and
configuring the PHY from the driver itself.

Suggested-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/pci/controller/pci-aardvark.c | 62 +++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index b1b8897d2d28..27ec79defa57 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -17,6 +17,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/phy/phy.h>
 #include <linux/of_address.h>
 #include <linux/of_pci.h>
 
@@ -203,6 +204,7 @@ struct advk_pcie {
 	u16 msi_msg;
 	int root_bus_nr;
 	struct pci_bridge_emul bridge;
+	struct phy *phy;
 };
 
 static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg)
@@ -998,6 +1000,62 @@ static int advk_pcie_setup_clk(struct advk_pcie *pcie)
 	return ret;
 }
 
+static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie)
+{
+	phy_power_off(pcie->phy);
+	phy_exit(pcie->phy);
+}
+
+static int advk_pcie_enable_phy(struct advk_pcie *pcie)
+{
+	int ret;
+
+	if (!pcie->phy)
+		return 0;
+
+	ret = phy_init(pcie->phy);
+	if (ret)
+		return ret;
+
+	ret = phy_set_mode(pcie->phy, PHY_MODE_PCIE);
+	if (ret) {
+		phy_exit(pcie->phy);
+		return ret;
+	}
+
+	ret = phy_power_on(pcie->phy);
+	if (ret) {
+		phy_exit(pcie->phy);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int advk_pcie_setup_phy(struct advk_pcie *pcie)
+{
+	struct device *dev = &pcie->pdev->dev;
+	struct device_node *node = dev->of_node;
+	int ret = 0;
+
+	pcie->phy = devm_of_phy_get(dev, node, NULL);
+	if (IS_ERR(pcie->phy) && (PTR_ERR(pcie->phy) == -EPROBE_DEFER))
+		return PTR_ERR(pcie->phy);
+
+	/* Old bindings miss the PHY handle */
+	if (IS_ERR(pcie->phy)) {
+		dev_warn(dev, "PHY unavailable (%ld)\n", PTR_ERR(pcie->phy));
+		pcie->phy = NULL;
+		return 0;
+	}
+
+	ret = advk_pcie_enable_phy(pcie);
+	if (ret)
+		dev_err(dev, "Failed to initialize PHY (%d)\n", ret);
+
+	return ret;
+}
+
 static int advk_pcie_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -1037,6 +1095,10 @@ static int advk_pcie_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
+	ret = advk_pcie_setup_phy(pcie);
+	if (ret)
+		return ret;
+
 	advk_pcie_setup_hw(pcie);
 
 	advk_sw_pci_bridge_init(pcie);
-- 
2.19.1


  parent reply	other threads:[~2019-01-08 16:26 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-08 16:24 [PATCH v3 00/15] Bring suspend to RAM support to PCIe Aardvark driver Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 01/15] PCI: aardvark: Enlarge PIO timeout Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 02/15] PCI: aardvark: Configure more registers in the configuration helper Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 03/15] PCI: aardvark: Add clock support Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal [this message]
2019-01-08 16:24 ` [PATCH v3 05/15] PCI: aardvark: Add PCIe warm reset support Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 06/15] PCI: aardvark: Add external reset GPIO support Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 07/15] PCI: aardvark: Add suspend to RAM support Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 08/15] dt-bindings: PCI: aardvark: Describe the clocks property Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 09/15] dt-bindings: PCI: aardvark: Describe the PHY property Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 10/15] dt-bindings: PCI: aardvark: Describe the PCIe endpoint card reset pins Miquel Raynal
2019-01-15 20:13   ` Rob Herring
2019-01-08 16:24 ` [PATCH v3 11/15] dt-bindings: PCI: aardvark: Describe the reset-gpios property Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 12/15] ARM64: dts: marvell: armada-37xx: declare PCIe clock Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 13/15] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe PHY Miquel Raynal
2019-02-06 14:17   ` Gregory CLEMENT
2019-01-08 16:24 ` [PATCH v3 14/15] ARM64: dts: marvell: armada-37xx: declare PCIe reset pin Miquel Raynal
2019-02-06 11:11   ` Gregory CLEMENT
2019-01-08 16:24 ` [PATCH v3 15/15] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe warm " Miquel Raynal
2019-02-06 11:12   ` Gregory CLEMENT
2019-01-18 16:51 ` [PATCH v3 00/15] Bring suspend to RAM support to PCIe Aardvark driver Gregory CLEMENT
2019-01-20 15:16   ` Miquel Raynal
2019-01-23 17:05 ` Lorenzo Pieralisi
2019-01-25 10:05   ` Miquel Raynal
2019-01-25 12:40     ` Lorenzo Pieralisi
2019-01-25 12:57       ` Miquel Raynal
2019-01-25 17:38         ` Lorenzo Pieralisi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190108162441.5278-5-miquel.raynal@bootlin.com \
    --to=miquel.raynal@bootlin.com \
    --cc=andrew@lunn.ch \
    --cc=antoine.tenart@bootlin.com \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gregory.clement@bootlin.com \
    --cc=jason@lakedaemon.net \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=maxime.chevallier@bootlin.com \
    --cc=nadavh@marvell.com \
    --cc=robh+dt@kernel.org \
    --cc=sebastian.hesselbarth@gmail.com \
    --cc=thomas.petazzoni@bootlin.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).