linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Bjorn Helgaas <helgaas@kernel.org>
To: Dilip Kota <eswara.kota@linux.intel.com>
Cc: Andrew Murray <andrew.murray@arm.com>,
	jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
	lorenzo.pieralisi@arm.com, robh@kernel.org,
	martin.blumenstingl@googlemail.com, linux-pci@vger.kernel.org,
	hch@infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, andriy.shevchenko@intel.com,
	cheol.yong.kim@intel.com, chuanhua.lei@linux.intel.com,
	qi-ming.wu@intel.com, "Rafael J. Wysocki" <rjw@rjwysocki.net>,
	linux-pm@vger.kernel.org
Subject: Re: [PATCH v4 3/3] pci: intel: Add sysfs attributes to configure pcie link
Date: Tue, 22 Oct 2019 07:59:50 -0500	[thread overview]
Message-ID: <20191022125950.GA133170@google.com> (raw)
In-Reply-To: <187a1a7d-80bd-a0e9-a0d9-7fc53bff8907@linux.intel.com>

[+cc Rafael, linux-pm, beginning of discussion at
https://lore.kernel.org/r/d8574605f8e70f41ce1e88ccfb56b63c8f85e4df.1571638827.git.eswara.kota@linux.intel.com]

On Tue, Oct 22, 2019 at 05:27:38PM +0800, Dilip Kota wrote:
> On 10/22/2019 1:18 AM, Bjorn Helgaas wrote:
> > On Mon, Oct 21, 2019 at 02:38:50PM +0100, Andrew Murray wrote:
> > > On Mon, Oct 21, 2019 at 02:39:20PM +0800, Dilip Kota wrote:
> > > > PCIe RC driver on Intel Gateway SoCs have a requirement
> > > > of changing link width and speed on the fly.
> > Please add more details about why this is needed.  Since you're adding
> > sysfs files, it sounds like it's not actually the *driver* that needs
> > this; it's something in userspace?

> We have use cases to change the link speed and width on the fly.
> One is EMI check and other is power saving.  Some battery backed
> applications have to switch PCIe link from higher GEN to GEN1 and
> width to x1. During the cases like external power supply got
> disconnected or broken. Once external power supply is connected then
> switch PCIe link to higher GEN and width.

That sounds plausible, but of course nothing there is specific to the
Intel Gateway, so we should implement this generically so it would
work on all hardware.

I'm not sure what the interface should look like -- should it be a
low-level interface as you propose where userspace would have to
identify each link of interest, or is there some system-wide
power/performance knob that could tune all links?  Cc'd Rafael and
linux-pm in case they have ideas.

Bjorn

  reply	other threads:[~2019-10-22 12:59 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-21  6:39 [PATCH v4 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file Dilip Kota
2019-10-21  6:39 ` [PATCH v4 1/3] dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller Dilip Kota
2019-10-21 11:19   ` Andrew Murray
2019-10-22 10:15     ` Dilip Kota
2019-10-24 20:31   ` Martin Blumenstingl
2019-10-29  7:53     ` Dilip Kota
2019-10-25 16:53   ` Rob Herring
2019-10-29  8:34     ` Dilip Kota
2019-10-31 10:51       ` Dilip Kota
2019-10-31 18:35         ` Rob Herring
2019-10-21  6:39 ` [PATCH v4 2/3] dwc: PCI: intel: PCIe RC controller driver Dilip Kota
2019-10-21  8:29   ` Gustavo Pimentel
2019-10-21 10:44     ` Dilip Kota
2019-10-22 10:18       ` Dilip Kota
2019-10-22 11:44         ` andriy.shevchenko
2019-10-25  9:01           ` Andrew Murray
2019-10-29  6:14           ` Dilip Kota
2019-10-21 13:03   ` Andrew Murray
2019-10-22  9:04     ` Dilip Kota
2019-10-25  9:09       ` Andrew Murray
2019-10-29  8:59         ` Dilip Kota
2019-11-01 10:59           ` Andrew Murray
2019-11-04  9:34             ` Dilip Kota
2019-11-04 10:47               ` Andrew Murray
2019-10-21 17:17   ` Bjorn Helgaas
2019-10-22  9:07     ` Dilip Kota
2019-10-22 13:09       ` Bjorn Helgaas
2019-10-29  7:45         ` Dilip Kota
2019-10-25 13:11   ` kbuild test robot
2019-10-25 13:11   ` [RFC PATCH] dwc: PCI: intel: intel_pcie_msi_init() can be static kbuild test robot
2019-10-21  6:39 ` [PATCH v4 3/3] pci: intel: Add sysfs attributes to configure pcie link Dilip Kota
2019-10-21  8:40   ` Gustavo Pimentel
2019-10-21 10:34     ` Dilip Kota
2019-10-21 13:38   ` Andrew Murray
2019-10-21 17:18     ` Bjorn Helgaas
2019-10-22  9:27       ` Dilip Kota
2019-10-22 12:59         ` Bjorn Helgaas [this message]
2019-10-29  9:31           ` Dilip Kota
2019-10-30 22:14             ` Bjorn Helgaas
2019-10-30 23:31               ` Rafael J. Wysocki
2019-10-31  2:56                 ` Bjorn Helgaas
2019-10-31  9:13                   ` Rafael J. Wysocki
2019-10-31 13:01                     ` Bjorn Helgaas
2019-10-31 10:47               ` Dilip Kota
2019-10-31 13:22                 ` Bjorn Helgaas
2019-11-01  5:47                   ` Dilip Kota
2019-11-01 11:30                     ` Andrew Murray
2019-10-29 10:42           ` Rafael J. Wysocki
2019-10-29 12:36             ` Bjorn Helgaas
2019-10-22  9:20     ` Dilip Kota
2019-10-25  9:34       ` Andrew Murray
2019-10-29  9:51         ` Dilip Kota
2019-10-21  8:08 ` [PATCH v4 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file Gustavo Pimentel
2019-10-21  8:31   ` Dilip Kota

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191022125950.GA133170@google.com \
    --to=helgaas@kernel.org \
    --cc=andrew.murray@arm.com \
    --cc=andriy.shevchenko@intel.com \
    --cc=cheol.yong.kim@intel.com \
    --cc=chuanhua.lei@linux.intel.com \
    --cc=devicetree@vger.kernel.org \
    --cc=eswara.kota@linux.intel.com \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=hch@infradead.org \
    --cc=jingoohan1@gmail.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=martin.blumenstingl@googlemail.com \
    --cc=qi-ming.wu@intel.com \
    --cc=rjw@rjwysocki.net \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).