linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Gustavo Pimentel <Gustavo.Pimentel@synopsys.com>
To: Dilip Kota <eswara.kota@linux.intel.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"gustavo.pimentel@synopsys.com" <Gustavo.Pimentel@synopsys.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"andrew.murray@arm.com" <andrew.murray@arm.com>,
	"robh@kernel.org" <robh@kernel.org>,
	"martin.blumenstingl@googlemail.com" 
	<martin.blumenstingl@googlemail.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"hch@infradead.org" <hch@infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"andriy.shevchenko@intel.com" <andriy.shevchenko@intel.com>,
	"cheol.yong.kim@intel.com" <cheol.yong.kim@intel.com>,
	"chuanhua.lei@linux.intel.com" <chuanhua.lei@linux.intel.com>,
	"qi-ming.wu@intel.com" <qi-ming.wu@intel.com>
Subject: RE: [PATCH v4 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file
Date: Mon, 21 Oct 2019 08:08:48 +0000	[thread overview]
Message-ID: <CH2PR12MB4007759DFE5F7F105A7D3363DA690@CH2PR12MB4007.namprd12.prod.outlook.com> (raw)
In-Reply-To: <cover.1571638827.git.eswara.kota@linux.intel.com>

Hi,


On Mon, Oct 21, 2019 at 7:39:17, Dilip Kota <eswara.kota@linux.intel.com> 
wrote:

> Intel PCIe is synopsys based controller utilizes the Designware

Please do this general replacement in all your patches.

s/synopsys/Synopsys

and

s/Designware/DesignWare

> framework for host initialization and intel application
> specific register configurations.
> 
> Changes on v4:
> 	Add lane resizing API in PCIe DesignWare driver.
> 	Intel PCIe driver uses it for lane resizing which
> 	 is being exposed through sysfs attributes.
> 	Add Intel PCIe sysfs attributes is in separate patch.
> 	Address review comments given on v3.
> 
> Changes on v3:
> 	Compared to v2, map_irq() patch is removed as it is no longer
> 	  required for Intel PCIe driver. Intel PCIe driver does platform
> 	  specific interrupt configuration during core initialization. So
> 	  changed the subject line too.
> 	Address v2 review comments for DT binding and PCIe driver
> 
> Dilip Kota (3):
>   dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller
>   dwc: PCI: intel: PCIe RC controller driver
>   pci: intel: Add sysfs attributes to configure pcie link
> 
>  .../devicetree/bindings/pci/intel-gw-pcie.yaml     | 135 ++++
>  drivers/pci/controller/dwc/Kconfig                 |  10 +
>  drivers/pci/controller/dwc/Makefile                |   1 +
>  drivers/pci/controller/dwc/pcie-designware.c       |  43 ++
>  drivers/pci/controller/dwc/pcie-designware.h       |  15 +
>  drivers/pci/controller/dwc/pcie-intel-gw.c         | 700 +++++++++++++++
>  include/uapi/linux/pci_regs.h                      |   1 +
>  7 files changed, 905 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
>  create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c
> 
> -- 
> 2.11.0



  parent reply	other threads:[~2019-10-21  8:09 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-21  6:39 [PATCH v4 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file Dilip Kota
2019-10-21  6:39 ` [PATCH v4 1/3] dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller Dilip Kota
2019-10-21 11:19   ` Andrew Murray
2019-10-22 10:15     ` Dilip Kota
2019-10-24 20:31   ` Martin Blumenstingl
2019-10-29  7:53     ` Dilip Kota
2019-10-25 16:53   ` Rob Herring
2019-10-29  8:34     ` Dilip Kota
2019-10-31 10:51       ` Dilip Kota
2019-10-31 18:35         ` Rob Herring
2019-10-21  6:39 ` [PATCH v4 2/3] dwc: PCI: intel: PCIe RC controller driver Dilip Kota
2019-10-21  8:29   ` Gustavo Pimentel
2019-10-21 10:44     ` Dilip Kota
2019-10-22 10:18       ` Dilip Kota
2019-10-22 11:44         ` andriy.shevchenko
2019-10-25  9:01           ` Andrew Murray
2019-10-29  6:14           ` Dilip Kota
2019-10-21 13:03   ` Andrew Murray
2019-10-22  9:04     ` Dilip Kota
2019-10-25  9:09       ` Andrew Murray
2019-10-29  8:59         ` Dilip Kota
2019-11-01 10:59           ` Andrew Murray
2019-11-04  9:34             ` Dilip Kota
2019-11-04 10:47               ` Andrew Murray
2019-10-21 17:17   ` Bjorn Helgaas
2019-10-22  9:07     ` Dilip Kota
2019-10-22 13:09       ` Bjorn Helgaas
2019-10-29  7:45         ` Dilip Kota
2019-10-25 13:11   ` kbuild test robot
2019-10-25 13:11   ` [RFC PATCH] dwc: PCI: intel: intel_pcie_msi_init() can be static kbuild test robot
2019-10-21  6:39 ` [PATCH v4 3/3] pci: intel: Add sysfs attributes to configure pcie link Dilip Kota
2019-10-21  8:40   ` Gustavo Pimentel
2019-10-21 10:34     ` Dilip Kota
2019-10-21 13:38   ` Andrew Murray
2019-10-21 17:18     ` Bjorn Helgaas
2019-10-22  9:27       ` Dilip Kota
2019-10-22 12:59         ` Bjorn Helgaas
2019-10-29  9:31           ` Dilip Kota
2019-10-30 22:14             ` Bjorn Helgaas
2019-10-30 23:31               ` Rafael J. Wysocki
2019-10-31  2:56                 ` Bjorn Helgaas
2019-10-31  9:13                   ` Rafael J. Wysocki
2019-10-31 13:01                     ` Bjorn Helgaas
2019-10-31 10:47               ` Dilip Kota
2019-10-31 13:22                 ` Bjorn Helgaas
2019-11-01  5:47                   ` Dilip Kota
2019-11-01 11:30                     ` Andrew Murray
2019-10-29 10:42           ` Rafael J. Wysocki
2019-10-29 12:36             ` Bjorn Helgaas
2019-10-22  9:20     ` Dilip Kota
2019-10-25  9:34       ` Andrew Murray
2019-10-29  9:51         ` Dilip Kota
2019-10-21  8:08 ` Gustavo Pimentel [this message]
2019-10-21  8:31   ` [PATCH v4 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file Dilip Kota

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CH2PR12MB4007759DFE5F7F105A7D3363DA690@CH2PR12MB4007.namprd12.prod.outlook.com \
    --to=gustavo.pimentel@synopsys.com \
    --cc=andrew.murray@arm.com \
    --cc=andriy.shevchenko@intel.com \
    --cc=cheol.yong.kim@intel.com \
    --cc=chuanhua.lei@linux.intel.com \
    --cc=devicetree@vger.kernel.org \
    --cc=eswara.kota@linux.intel.com \
    --cc=hch@infradead.org \
    --cc=jingoohan1@gmail.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=martin.blumenstingl@googlemail.com \
    --cc=qi-ming.wu@intel.com \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).