From: "David E. Box" <david.e.box@linux.intel.com>
To: lee.jones@linaro.org, hdegoede@redhat.com,
mgross@linux.intel.com, bhelgaas@google.com,
gregkh@linuxfoundation.org, andriy.shevchenko@linux.intel.com,
srinivas.pandruvada@intel.com
Cc: "David E. Box" <david.e.box@linux.intel.com>,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org
Subject: [PATCH 4/5] Documentation: Update ioctl-number.rst for Intel Software Defined Silicon interface
Date: Thu, 30 Sep 2021 18:28:14 -0700 [thread overview]
Message-ID: <20211001012815.1999501-5-david.e.box@linux.intel.com> (raw)
In-Reply-To: <20211001012815.1999501-1-david.e.box@linux.intel.com>
Reserve ioctl number and range for the Intel Software Defined Silicon
driver.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
---
V1: No change from previous submission
Documentation/userspace-api/ioctl/ioctl-number.rst | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst
index 2e8134059c87..2a6e92639cdb 100644
--- a/Documentation/userspace-api/ioctl/ioctl-number.rst
+++ b/Documentation/userspace-api/ioctl/ioctl-number.rst
@@ -363,6 +363,7 @@ Code Seq# Include File Comments
0xDB 00-0F drivers/char/mwave/mwavepub.h
0xDD 00-3F ZFCP device driver see drivers/s390/scsi/
<mailto:aherrman@de.ibm.com>
+0xDF all linux/isdsi_if.h
0xE5 00-3F linux/fuse.h
0xEC 00-01 drivers/platform/chrome/cros_ec_dev.h ChromeOS EC driver
0xF3 00-3F drivers/usb/misc/sisusbvga/sisusb.h sisfb (in development)
--
2.25.1
next prev parent reply other threads:[~2021-10-01 1:28 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-01 1:28 [PATCH 0/5] Move intel_pm from MFD to Auxiliary bus David E. Box
2021-10-01 1:28 ` [PATCH 1/5] PCI: Add #defines for accessing PCIe DVSEC fields David E. Box
2021-10-01 1:28 ` [PATCH 2/5] platform/x86/intel: Move intel_pmt from MFD to Auxiliary Bus David E. Box
2021-10-06 8:58 ` Leon Romanovsky
2021-10-06 20:58 ` David E. Box
2021-10-10 6:59 ` Leon Romanovsky
2021-10-01 1:28 ` [PATCH 3/5] platform/x86/intel: extended_caps: Add support for PCIe VSEC structures David E. Box
2021-10-01 1:28 ` David E. Box [this message]
2021-10-01 1:28 ` [PATCH 5/5] platform/x86: Add Intel Software Defined Silicon driver David E. Box
2021-10-01 7:14 ` Greg KH
2021-10-01 10:38 ` David E. Box
2021-10-01 11:29 ` Greg KH
2021-10-01 7:15 ` Greg KH
2021-10-01 7:16 ` Greg KH
2021-10-01 10:47 ` David E. Box
2021-10-01 11:27 ` Greg KH
2021-10-01 7:29 ` Greg KH
2021-10-01 11:13 ` David E. Box
2021-10-01 11:26 ` Greg KH
2021-10-01 20:43 ` David E. Box
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