From: Leon Romanovsky <leon@kernel.org>
To: "David E. Box" <david.e.box@linux.intel.com>
Cc: lee.jones@linaro.org, hdegoede@redhat.com,
mgross@linux.intel.com, bhelgaas@google.com,
gregkh@linuxfoundation.org, andriy.shevchenko@linux.intel.com,
srinivas.pandruvada@intel.com, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, platform-driver-x86@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH 2/5] platform/x86/intel: Move intel_pmt from MFD to Auxiliary Bus
Date: Sun, 10 Oct 2021 09:59:56 +0300 [thread overview]
Message-ID: <YWKPbEu0k5RiwWYi@unreal> (raw)
In-Reply-To: <668f263e1d2606ad7485c40ce41933300ec4b8a3.camel@linux.intel.com>
On Wed, Oct 06, 2021 at 01:58:22PM -0700, David E. Box wrote:
> On Wed, 2021-10-06 at 11:58 +0300, Leon Romanovsky wrote:
> > On Thu, Sep 30, 2021 at 06:28:12PM -0700, David E. Box wrote:
> > > Intel Platform Monitoring Technology (PMT) support is indicated by presence
> > > of an Intel defined PCIe DVSEC structure with a PMT ID. However DVSEC
> > > structures may also be used by Intel to indicate support for other
> > > capabilities unrelated to PMT. The Out Of Band Management Services Module
> > > (OOBMSM) is an example of a device that can have both PMT and non-PMT
> > > capabilities. In order to support these capabilities it is necessary to
> > > modify the intel_pmt driver to handle the creation of platform devices more
> > > generically. To that end the following changes are made.
> > >
> > > Convert the driver and child drivers from MFD to the Auxiliary Bus. This
> > > architecture is more suitable anyway since the driver partitions a
> > > multifunctional PCIe device. This also moves the driver out of the MFD
> > > subsystem and into platform/x86/intel.
> > >
> > > Before, devices were named by their capability (e.g. pmt_telemetry).
> > > Instead, generically name them by their capability ID (e.g.
> > > intel_extended_cap.2). This allows the IDs to be created automatically,
> > > minimizing the code needed to support future capabilities. However, to
> > > ensure that unsupported devices aren't created, use an allow list to
> > > specify supported capabilities. Along these lines, rename the driver from
> > > intel_pmt to intel_extended_caps to better reflect the purpose.
> > >
> > > Signed-off-by: David E. Box <david.e.box@linux.intel.com>
> > > ---
> > >
> > > V1: New patch. However incorporates some elements of [1] which was
> > > dropped. Namely enumerating features generically and creating an
> > > allow list. Also cleans up probe by moving some code to functions
> > > and using a bool instead of an int to track whether a device was
> > > added.
> > >
> > > [1] https://lore.kernel.org/all/20210922213007.2738388-3-david.e.box@linux.intel.com/
> >
> > <...>
> >
> > > +static int extended_caps_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> > > +{
> > > + struct extended_caps_platform_info *info;
> > > + bool have_devices = false;
> > > + unsigned long quirks = 0;
> > > + int ret;
> > > +
> > > + ret = pcim_enable_device(pdev);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + info = (struct extended_caps_platform_info *)id->driver_data;
> >
> > pci_get_drvdata() in all places and no need to cast void *.
>
> This is coming from the id not the pdev. The data here is type kernel_ulong_t.
Ohh, this is very unusual.
Thanks
next prev parent reply other threads:[~2021-10-10 7:00 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-01 1:28 [PATCH 0/5] Move intel_pm from MFD to Auxiliary bus David E. Box
2021-10-01 1:28 ` [PATCH 1/5] PCI: Add #defines for accessing PCIe DVSEC fields David E. Box
2021-10-01 1:28 ` [PATCH 2/5] platform/x86/intel: Move intel_pmt from MFD to Auxiliary Bus David E. Box
2021-10-06 8:58 ` Leon Romanovsky
2021-10-06 20:58 ` David E. Box
2021-10-10 6:59 ` Leon Romanovsky [this message]
2021-10-01 1:28 ` [PATCH 3/5] platform/x86/intel: extended_caps: Add support for PCIe VSEC structures David E. Box
2021-10-01 1:28 ` [PATCH 4/5] Documentation: Update ioctl-number.rst for Intel Software Defined Silicon interface David E. Box
2021-10-01 1:28 ` [PATCH 5/5] platform/x86: Add Intel Software Defined Silicon driver David E. Box
2021-10-01 7:14 ` Greg KH
2021-10-01 10:38 ` David E. Box
2021-10-01 11:29 ` Greg KH
2021-10-01 7:15 ` Greg KH
2021-10-01 7:16 ` Greg KH
2021-10-01 10:47 ` David E. Box
2021-10-01 11:27 ` Greg KH
2021-10-01 7:29 ` Greg KH
2021-10-01 11:13 ` David E. Box
2021-10-01 11:26 ` Greg KH
2021-10-01 20:43 ` David E. Box
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