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From: Bjorn Helgaas <helgaas@kernel.org>
To: Serge Semin <fancer.lancer@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
	"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"kw@linux.com" <kw@linux.com>,
	"manivannan.sadhasivam@linaro.org"
	<manivannan.sadhasivam@linaro.org>,
	"kishon@kernel.org" <kishon@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org" 
	<krzysztof.kozlowski+dt@linaro.org>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"marek.vasut+renesas@gmail.com" <marek.vasut+renesas@gmail.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>,
	Manivannan Sadhasivam <mani@kernel.org>
Subject: Re: [PATCH v18 08/20] PCI: dwc: Add dw_pcie_link_set_max_link_width()
Date: Tue, 8 Aug 2023 10:08:54 -0500	[thread overview]
Message-ID: <20230808150854.GA304435@bhelgaas> (raw)
In-Reply-To: <rt2vwgmdsxvkb2jh4v6mpnjpfvql44o72nxf663wbnkcvkmift@o2dl5oa435k3>

On Tue, Aug 08, 2023 at 03:15:33AM +0300, Serge Semin wrote:
> On Mon, Aug 07, 2023 at 06:40:34PM -0500, Bjorn Helgaas wrote:
> > On Tue, Aug 08, 2023 at 01:53:11AM +0300, Serge Semin wrote:
> > > On Tue, Aug 01, 2023 at 01:50:59AM +0000, Yoshihiro Shimoda wrote:
> > > > > From: Serge Semin, Sent: Tuesday, August 1, 2023 8:54 AM
> > > > > On Fri, Jul 21, 2023 at 04:44:40PM +0900, Yoshihiro Shimoda wrote:
> > > > > > To improve code readability, add dw_pcie_link_set_max_link_width().
> > > > > > ...
> > 
> > > > > > @@ -1009,49 +1049,5 @@ void dw_pcie_setup(struct dw_pcie *pci)
> > > > > >  	val |= PORT_LINK_DLL_LINK_EN;
> > > > > >  	dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, val);
> > > > > >
> > > > > > -	if (!pci->num_lanes) {
> > > > > > -		dev_dbg(pci->dev, "Using h/w default number of lanes\n");
> > > > > > -		return;
> > > > > > -	}
> > > > > > -
> > > > > > -	/* Set the number of lanes */
> > > > > 
> > > > > > -	val &= ~PORT_LINK_FAST_LINK_MODE;
> > > > > 
> > > > > My series contains the patch which drops this line:
> > > > <snip URL>
> > > > > So either pick my patch up and add it to your series or still pick it up
> > > > > but with changing the authorship and adding me under the Suggested-by
> > > > > tag with the email-address I am using to review your series. Bjorn,
> > > > > what approach would you prefer? Perhaps alternative?
> 
> > I don't really see the argument here.  AFAICT, Yoshihiro's patch
> > (https://lore.kernel.org/r/20230721074452.65545-9-yoshihiro.shimoda.uh@renesas.com)
> > is a trivial refactoring to make dw_pcie_link_set_max_link_width(),
> > which might be reused elsewhere later, which seems perfectly fine.
> > 
> > It'd be fine with me to add a little detail in the commit log to
> > reference the Synopsys manual, which I don't have.  But doesn't seem
> > like a big deal to me.
> 
> More details are in one of my earlier comments to this patch which
> Yoshihiro promised to add to the patch log on the next patchset
> revision. You can read it here:
> https://lore.kernel.org/linux-pci/20230721074452.65545-1-yoshihiro.shimoda.uh@renesas.com/T/#m8ac364249f40c726da88316b67f11a6d55068ef0
> 
> > Dropping the PORT_LINK_FAST_LINK_MODE mask seems like a separate
> > question that should be in a separate patch.
> > https://lore.kernel.org/linux-pci/20230611192005.25636-6-Sergey.Semin@baikalelectronics.ru/
> > says it's redundant, so it sounds more like a cleanup than a fix.
> 
> That's the point of my comment. There is no need in copying that mask
> to the dw_pcie_link_set_max_link_width() method because first it's
> unrelated to the link-width setting, second it's redundant. There is
> my patch dropping the mask with the proper justification:
> https://lore.kernel.org/linux-pci/20230611192005.25636-6-Sergey.Semin@baikalelectronics.ru/
> It would be good to either merge it in before the Yoshihiro' series or
> add my patch to the Yoshihiro' patchset. But it's in the patchwork
> limbo now, neither you nor Lorenzo or Krzysztof were willing to merge
> it in. That's why I suggested to move the patch here with the denoted
> alterations. Could you give your resolution whether the suggested
> movement is ok or perhaps you or Lorenzo or Krzysztof consider merge
> it in as is?

If I understand Yoshihiro's patch, it pulls code out into
dw_pcie_link_set_max_link_width() without changing that code.  That
seems like the best approach to me because it's very easy to review.

If we want to remove a little redundant code later in a separate
patch, that's fine too but doesn't seem urgent.  I don't think they
need to be tied together.

Bjorn

  reply	other threads:[~2023-08-08 16:07 UTC|newest]

Thread overview: 90+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-21  7:44 [PATCH v18 00/20] PCI: rcar-gen4: Add R-Car Gen4 PCIe support Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 01/20] PCI: Add INTx Mechanism Messages macros Yoshihiro Shimoda
2023-07-24  7:25   ` Manivannan Sadhasivam
2023-07-21  7:44 ` [PATCH v18 02/20] PCI: Rename PCI_EPC_IRQ_LEGACY to PCI_EPC_IRQ_INTX Yoshihiro Shimoda
2023-07-21  8:10   ` Damien Le Moal
2023-07-24  7:32     ` Manivannan Sadhasivam
2023-07-29  1:35       ` Serge Semin
2023-07-29  1:55         ` Damien Le Moal
2023-07-29  1:58           ` Damien Le Moal
2023-07-29  2:02             ` Serge Semin
2023-07-29 15:32             ` Bjorn Helgaas
2023-07-30  4:58               ` Manivannan Sadhasivam
2023-07-21  7:44 ` [PATCH v18 03/20] PCI: dwc: Rename "legacy_irq" to "INTx_irq" Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 04/20] PCI: dwc: Change arguments of dw_pcie_prog_outbound_atu() Yoshihiro Shimoda
2023-07-24  7:45   ` Manivannan Sadhasivam
2023-07-26  5:02     ` Serge Semin
2023-07-26 13:00       ` Manivannan Sadhasivam
2023-07-26 23:38         ` Serge Semin
2023-07-27  1:06           ` Yoshihiro Shimoda
2023-07-27 11:03           ` Manivannan Sadhasivam
2023-07-27 12:21             ` Serge Semin
2023-07-29  2:06   ` Serge Semin
2023-07-31  1:24     ` Yoshihiro Shimoda
2023-07-31 21:33       ` Serge Semin
2023-08-01  1:29         ` Yoshihiro Shimoda
2023-08-01  1:44           ` Serge Semin
2023-08-01  7:02             ` Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 05/20] PCI: dwc: Add outbound MSG TLPs support Yoshihiro Shimoda
2023-07-24  8:12   ` Manivannan Sadhasivam
2023-07-29  1:40     ` Serge Semin
2023-07-31  1:18       ` Yoshihiro Shimoda
2023-07-31 22:11         ` Serge Semin
2023-08-01  1:31           ` Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 06/20] PCI: designware-ep: Add INTx IRQs support Yoshihiro Shimoda
2023-07-24  8:34   ` Manivannan Sadhasivam
2023-07-26  3:03     ` Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 07/20] PCI: dwc: endpoint: Add multiple PFs support for dbi2 Yoshihiro Shimoda
2023-07-24  9:24   ` Manivannan Sadhasivam
2023-07-25 11:57     ` Yoshihiro Shimoda
2023-07-28  2:34       ` Manivannan Sadhasivam
2023-07-28  4:18         ` Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 08/20] PCI: dwc: Add dw_pcie_link_set_max_link_width() Yoshihiro Shimoda
2023-07-31 23:53   ` Serge Semin
2023-08-01  1:50     ` Yoshihiro Shimoda
2023-08-07 22:53       ` Serge Semin
2023-08-07 23:40         ` Bjorn Helgaas
2023-08-08  0:15           ` Serge Semin
2023-08-08 15:08             ` Bjorn Helgaas [this message]
2023-08-08 21:16               ` Serge Semin
2023-07-21  7:44 ` [PATCH v18 09/20] PCI: dwc: Add PCI_EXP_LNKCAP_MLW handling Yoshihiro Shimoda
2023-07-24 11:03   ` Manivannan Sadhasivam
2023-07-26  2:12     ` Yoshihiro Shimoda
2023-07-28  2:51       ` Manivannan Sadhasivam
2023-07-28  4:19         ` Yoshihiro Shimoda
2023-07-28 16:07           ` Serge Semin
2023-07-31  1:15             ` Yoshihiro Shimoda
2023-08-01  0:00               ` Serge Semin
2023-08-01  6:26                 ` Yoshihiro Shimoda
2023-08-02 10:46             ` Manivannan Sadhasivam
2023-07-21  7:44 ` [PATCH v18 10/20] PCI: tegra194: Drop PCI_EXP_LNKSTA_NLW setting Yoshihiro Shimoda
2023-07-24 11:29   ` Manivannan Sadhasivam
2023-07-26  2:26     ` Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 11/20] PCI: dwc: Add EDMA_UNROLL capability flag Yoshihiro Shimoda
2023-07-24 11:35   ` Manivannan Sadhasivam
2023-07-26  2:58     ` Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 12/20] PCI: dwc: Expose dw_pcie_ep_exit() to module Yoshihiro Shimoda
2023-07-24 11:36   ` Manivannan Sadhasivam
2023-07-21  7:44 ` [PATCH v18 13/20] PCI: dwc: Introduce .ep_pre_init() and .ep_deinit() Yoshihiro Shimoda
2023-07-21  9:23   ` Sergei Shtylyov
2023-07-24 11:40   ` Manivannan Sadhasivam
2023-07-26  3:02     ` Yoshihiro Shimoda
2023-08-01  0:15       ` Serge Semin
2023-08-02 10:40         ` Manivannan Sadhasivam
2023-08-01  0:22   ` Serge Semin
2023-08-01  6:27     ` Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 14/20] dt-bindings: PCI: dwc: Update maxItems of reg and reg-names Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 15/20] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 16/20] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Endpoint Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 17/20] PCI: rcar-gen4: Add R-Car Gen4 PCIe Host support Yoshihiro Shimoda
2023-07-24 12:28   ` Manivannan Sadhasivam
2023-08-01  1:06     ` Serge Semin
2023-08-01  6:46       ` Yoshihiro Shimoda
2023-08-01 18:28         ` Serge Semin
2023-08-02 10:36       ` Manivannan Sadhasivam
2023-07-21  7:44 ` [PATCH v18 18/20] PCI: rcar-gen4-ep: Add R-Car Gen4 PCIe Endpoint support Yoshihiro Shimoda
2023-08-01  1:36   ` Serge Semin
2023-08-01  6:59     ` Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 19/20] MAINTAINERS: Update PCI DRIVER FOR RENESAS R-CAR for R-Car Gen4 Yoshihiro Shimoda
2023-07-21  7:44 ` [PATCH v18 20/20] misc: pci_endpoint_test: Add Device ID for R-Car S4-8 PCIe controller Yoshihiro Shimoda
2023-07-24 10:53 ` [PATCH v18 00/20] PCI: rcar-gen4: Add R-Car Gen4 PCIe support Serge Semin

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