From: Kishon Vijay Abraham I <kishon@ti.com>
To: Arnd Bergmann <arnd@arndb.de>, <linux-arm-kernel@lists.infradead.org>
Cc: Marek Vasut <marex@denx.de>, <devicetree@vger.kernel.org>,
<balajitk@ti.com>, <linux-doc@vger.kernel.org>,
<linux-pci@vger.kernel.org>, Jingoo Han <jg1.han@samsung.com>,
<linux-kernel@vger.kernel.org>, Mohit Kumar <mohit.kumar@st.com>,
Bjorn Helgaas <bhelgaas@google.com>, <linux-omap@vger.kernel.org>,
<rogerq@ti.com>
Subject: Re: [PATCH 05/17] pci: host: pcie-dra7xx: add support for pcie-dra7xx controller
Date: Fri, 9 May 2014 16:59:04 +0530 [thread overview]
Message-ID: <536CBC00.6000709@ti.com> (raw)
In-Reply-To: <6485683.q96o7U6vf8@wuerfel>
Hi Arnd,
On Wednesday 07 May 2014 03:00 PM, Arnd Bergmann wrote:
> On Wednesday 07 May 2014 14:14:55 Kishon Vijay Abraham I wrote:
>>>> +static void dra7xx_pcie_enable_interrupts(struct pcie_port *pp)
>>>> +{
>>>> + struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
>>>> +
>>>> + dra7xx_pcie_writel(dra7xx->base, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN,
>>>> + ~INTERRUPTS);
>>>> + dra7xx_pcie_writel(dra7xx->base,
>>>> + PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MAIN, INTERRUPTS);
>>>> + dra7xx_pcie_writel(dra7xx->base, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI,
>>>> + ~LEG_EP_INTERRUPTS & ~MSI);
>>>> +
>>>> + if (IS_ENABLED(CONFIG_PCI_MSI))
>>>> + dra7xx_pcie_writel(dra7xx->base,
>>>> + PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MSI, MSI);
>>>> + else
>>>> + dra7xx_pcie_writel(dra7xx->base,
>>>> + PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MSI,
>>>> + LEG_EP_INTERRUPTS);
>>>
>>> Doesn't this just enable one or the other? In general I'd assume you need
>>> both INTx and MSI, at least if MSI is available.
>>
>> Not sure since the programming sequence in the TRM explicitly states either
>> legacy interrupts or MSI interrupts should be enabled but not both.
>
> Hmm, I think that means you can't have MSI at all. You have to support
> legacy PCI devices that can't do MSI.
>
> Do you know if you have a modern GIC implementation with MSI support
> in these SoCs? It would be better anyway to use the GIC for doing
In DRA7 it is not there. I'm not sure in other platforms.
> MSI, so you can just ignore the internal MSI controller here.
>
>>>> +static int add_pcie_port(struct dra7xx_pcie *dra7xx,
>>>> + struct platform_device *pdev)
>>>> +{
>>>> + int ret;
>>>> + struct pcie_port *pp;
>>>> + struct resource *res;
>>>> + struct device *dev = &pdev->dev;
>>>> +
>>>> + pp = &dra7xx->pp;
>>>> + pp->dev = dev;
>>>> + pp->ops = &dra7xx_pcie_host_ops;
>>>> +
>>>> + spin_lock_init(&pp->conf_lock);
>>>> +
>>>> + pp->irq = platform_get_irq(pdev, 1);
>>>> + if (pp->irq < 0) {
>>>> + dev_err(dev, "missing IRQ resource\n");
>>>> + return -EINVAL;
>>>> + }
>>>>
>>>
>>> The binding does not list a mandatory "interrupts" property, so
>>> this should not be treated as an error.
>>
>> actually the 'interrupts' property is documented in pci/designware-pcie.txt.
>
> Hmm, but you don't seem to use it the same way as documented there.
> I'm not sure what 'level interrupt, pulse interrupt, special interrupt'
> in the parent binding are, but they don't seem to be the ones you use
> here.
Yeah. I'll update my Documentation. Thanks for pointing this out.
Thanks
Kishon
next prev parent reply other threads:[~2014-05-09 11:29 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-06 13:33 [PATCH 00/17] PCIe support for DRA7xx Kishon Vijay Abraham I
2014-05-06 13:33 ` [PATCH 01/17] phy: phy-omap-pipe3: Add support for PCIe PHY Kishon Vijay Abraham I
2014-05-14 12:57 ` Roger Quadros
2014-05-06 13:33 ` [PATCH 03/17] phy: ti-pipe3: add external clock " Kishon Vijay Abraham I
2014-05-14 13:16 ` Roger Quadros
2014-05-14 15:19 ` Kishon Vijay Abraham I
2014-05-14 15:34 ` Nishanth Menon
2014-05-15 9:15 ` Kishon Vijay Abraham I
2014-05-15 9:25 ` Roger Quadros
2014-05-15 11:46 ` Nishanth Menon
2014-05-15 11:59 ` Kishon Vijay Abraham I
2014-05-15 12:12 ` Nishanth Menon
2014-05-15 12:18 ` Kishon Vijay Abraham I
2014-05-15 12:33 ` Nishanth Menon
2014-05-15 12:42 ` Kishon Vijay Abraham I
2014-05-27 6:11 ` Kishon Vijay Abraham I
2014-05-28 1:54 ` Mike Turquette
2014-05-28 15:52 ` Nishanth Menon
2014-05-06 13:33 ` [PATCH 05/17] pci: host: pcie-dra7xx: add support for pcie-dra7xx controller Kishon Vijay Abraham I
2014-05-06 13:44 ` Marek Vasut
2014-05-07 8:21 ` Kishon Vijay Abraham I
2014-05-09 9:43 ` Pavel Machek
2014-05-06 13:54 ` Arnd Bergmann
2014-05-07 8:44 ` Kishon Vijay Abraham I
2014-05-07 9:30 ` Arnd Bergmann
2014-05-09 11:29 ` Kishon Vijay Abraham I [this message]
2014-05-06 16:35 ` Jason Gunthorpe
2014-05-07 9:22 ` Kishon Vijay Abraham I
2014-05-07 9:25 ` Arnd Bergmann
2014-05-08 8:56 ` Jingoo Han
2014-05-08 9:16 ` Arnd Bergmann
2014-05-06 13:33 ` [PATCH 06/17] pci: host: pcie-designware: Use *base-mask* for configuring the iATU Kishon Vijay Abraham I
2014-05-06 13:59 ` Arnd Bergmann
2014-05-08 9:05 ` Jingoo Han
2014-05-08 9:18 ` Arnd Bergmann
2014-05-09 11:50 ` Kishon Vijay Abraham I
2014-05-12 1:44 ` Jingoo Han
2014-05-13 12:31 ` Kishon Vijay Abraham I
2014-05-13 12:47 ` Arnd Bergmann
2014-05-13 13:26 ` Kishon Vijay Abraham I
2014-05-13 13:27 ` Arnd Bergmann
2014-05-13 13:34 ` Arnd Bergmann
2014-05-14 5:44 ` Kishon Vijay Abraham I
2014-05-14 12:45 ` Arnd Bergmann
2014-05-14 15:04 ` Kishon Vijay Abraham I
2014-05-16 9:00 ` Kishon Vijay Abraham I
2014-05-19 12:45 ` Arnd Bergmann
2014-05-06 13:33 ` [PATCH 07/17] ARM: dts: DRA7: Add divider table to optfclk_pciephy_div clock Kishon Vijay Abraham I
2014-05-06 13:33 ` [PATCH 08/17] ARM: dts: DRA7: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck Kishon Vijay Abraham I
2014-05-06 13:33 ` [PATCH 09/17] arm: dra7xx: Add hwmod data for pcie1 phy and pcie2 phy Kishon Vijay Abraham I
2014-05-06 13:33 ` [PATCH 10/17] arm: dra7xx: Add hwmod data for pcie1 and pcie2 subsystems Kishon Vijay Abraham I
2014-05-06 13:33 ` [PATCH 11/17] ARM: dts: dra7xx-clocks: Add missing 32khz clocks used for PHY Kishon Vijay Abraham I
2014-05-14 13:23 ` Roger Quadros
2014-05-14 15:19 ` Kishon Vijay Abraham I
2014-05-06 13:33 ` [PATCH 12/17] ARM: dts: dra7: Add dt data for PCIe PHY control module Kishon Vijay Abraham I
2014-05-06 13:33 ` [PATCH 13/17] ARM: dts: dra7: Add dt data for PCIe PHY Kishon Vijay Abraham I
2014-05-06 13:34 ` [PATCH 14/17] ARM: dts: dra7: Add dt data for PCIe controller Kishon Vijay Abraham I
2014-05-06 13:34 ` [PATCH 15/17] ARM: OMAP: Enable PCI for DRA7 Kishon Vijay Abraham I
2014-05-06 13:34 ` [TEMP PATCH 16/17] pci: host: pcie-dra7xx: use reset framework APIs to reset PCIe Kishon Vijay Abraham I
2014-05-06 13:41 ` Dan Murphy
2014-05-06 13:34 ` [TEMP PATCH 17/17] ARM: dts: dra7: Add *resets* property for PCIe dt node Kishon Vijay Abraham I
2014-05-06 13:40 ` Dan Murphy
[not found] ` <1399383244-14556-3-git-send-email-kishon@ti.com>
2014-05-14 13:02 ` [PATCH 02/17] phy: omap-control: add external clock support for PCIe PHY Roger Quadros
[not found] ` <1399383244-14556-5-git-send-email-kishon@ti.com>
2014-05-14 13:20 ` [PATCH 04/17] phy: pipe3: insert delay to enumerate in GEN2 mode Roger Quadros
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