From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: Serge Semin <fancer.lancer@gmail.com>
Cc: "jingoohan1@gmail.com" <jingoohan1@gmail.com>,
"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"kw@linux.com" <kw@linux.com>,
"manivannan.sadhasivam@linaro.org"
<manivannan.sadhasivam@linaro.org>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"kishon@kernel.org" <kishon@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"marek.vasut+renesas@gmail.com" <marek.vasut+renesas@gmail.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>
Subject: RE: [PATCH v19 01/19] PCI: Add INTx Mechanism Messages macros
Date: Thu, 24 Aug 2023 02:57:02 +0000 [thread overview]
Message-ID: <OSYPR01MB53348B98013A3F446C69609DD81DA@OSYPR01MB5334.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <iutmgdc4ux7bnbfvl6bqtyifxw6kytx2pge66pvsbhe2tzisrm@wjsp5aahbymc>
Hello Serge,
> From: Serge Semin, Sent: Wednesday, August 23, 2023 7:18 PM
>
> On Wed, Aug 23, 2023 at 06:11:35PM +0900, Yoshihiro Shimoda wrote:
> > Add "Message Routing" and "INTx Mechanism Messages" macros to enable
> > a PCIe driver to send messages for INTx Interrupt Signaling.
> >
> > The "Message Routing" is from Table 2-17, and the "INTx Mechanism
> > Messages" is from Table 2-18 on the PCI Express Base Specification,
> > Rev. 4.0 Version 1.0.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
> > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > ---
> > drivers/pci/pci.h | 18 ++++++++++++++++++
> > 1 file changed, 18 insertions(+)
> >
> > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> > index a4c397434057..0b6df6c2c918 100644
> > --- a/drivers/pci/pci.h
> > +++ b/drivers/pci/pci.h
> > @@ -13,6 +13,24 @@
> >
> > #define PCIE_LINK_RETRAIN_TIMEOUT_MS 1000
> >
> > +/* Message Routing (r[2:0]) */
>
> > +#define PCI_MSG_TYPE_R_ROUTING_RC 0
> > +#define PCI_MSG_TYPE_R_ROUTING_ADDR 1
> > +#define PCI_MSG_TYPE_R_ROUTING_ID 2
> > +#define PCI_MSG_TYPE_R_ROUTING_BC 3
> > +#define PCI_MSG_TYPE_R_ROUTING_LOCAL 4
> > +#define PCI_MSG_TYPE_R_ROUTING_GATHER 5
>
> I've just noticed. Using "R" and "Routing" simultaneously is
> redundant since "R" means routing. Just "R" would be enough.
> Thus PCI_MSG_TYPE_R_* would mean the R[2:0] subfield of the Message
> (Msg/MsgD) TLPs and we would shorten out the name length.
I'll remove "_ROUTING" from these names on v20.
Best regards,
Yoshihiro Shimoda
> -Serge(y)
>
> > +
> > +/* INTx Mechanism Messages */
> > +#define PCI_MSG_CODE_ASSERT_INTA 0x20
> > +#define PCI_MSG_CODE_ASSERT_INTB 0x21
> > +#define PCI_MSG_CODE_ASSERT_INTC 0x22
> > +#define PCI_MSG_CODE_ASSERT_INTD 0x23
> > +#define PCI_MSG_CODE_DEASSERT_INTA 0x24
> > +#define PCI_MSG_CODE_DEASSERT_INTB 0x25
> > +#define PCI_MSG_CODE_DEASSERT_INTC 0x26
> > +#define PCI_MSG_CODE_DEASSERT_INTD 0x27
> > +
> > extern const unsigned char pcie_link_speed[];
> > extern bool pci_early_dump;
> >
> > --
> > 2.25.1
> >
next prev parent reply other threads:[~2023-08-24 2:57 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-23 9:11 [PATCH v19 00/19] PCI: rcar-gen4: Add R-Car Gen4 PCIe support Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 01/19] PCI: Add INTx Mechanism Messages macros Yoshihiro Shimoda
2023-08-23 10:18 ` Serge Semin
2023-08-24 2:57 ` Yoshihiro Shimoda [this message]
2023-08-23 9:11 ` [PATCH v19 02/19] PCI: dwc: Change arguments of dw_pcie_prog_outbound_atu() Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 03/19] PCI: dwc: Add outbound MSG TLPs support Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 04/19] PCI: designware-ep: Add INTx IRQs support Yoshihiro Shimoda
2023-08-23 10:32 ` Serge Semin
2023-08-24 1:58 ` Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 05/19] PCI: dwc: endpoint: Add multiple PFs support for dbi2 Yoshihiro Shimoda
2023-08-23 10:46 ` Serge Semin
2023-08-24 3:13 ` Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 06/19] PCI: dwc: Add dw_pcie_link_set_max_link_width() Yoshihiro Shimoda
2023-08-23 10:51 ` Serge Semin
2023-08-23 9:11 ` [PATCH v19 07/19] PCI: dwc: Add missing PCI_EXP_LNKCAP_MLW handling Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 08/19] PCI: tegra194: Drop PCI_EXP_LNKSTA_NLW setting Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 09/19] PCI: dwc: Add EDMA_UNROLL capability flag Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 10/19] PCI: dwc: Expose dw_pcie_ep_exit() to module Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 11/19] PCI: dwc: Expose dw_pcie_write_dbi2() " Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 12/19] PCI: dwc: endpoint: Introduce .pre_init() and .deinit() Yoshihiro Shimoda
2023-08-23 11:14 ` Serge Semin
2023-08-23 9:11 ` [PATCH v19 13/19] dt-bindings: PCI: dwc: Update maxItems of reg and reg-names Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 14/19] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 15/19] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Endpoint Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 16/19] PCI: rcar-gen4: Add R-Car Gen4 PCIe Host support Yoshihiro Shimoda
2023-08-23 11:55 ` Serge Semin
2023-08-24 9:58 ` Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 17/19] PCI: rcar-gen4-ep: Add R-Car Gen4 PCIe Endpoint support Yoshihiro Shimoda
2023-08-23 12:02 ` Serge Semin
2023-08-24 9:59 ` Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 18/19] MAINTAINERS: Update PCI DRIVER FOR RENESAS R-CAR for R-Car Gen4 Yoshihiro Shimoda
2023-08-23 12:04 ` Serge Semin
2023-08-23 9:11 ` [PATCH v19 19/19] misc: pci_endpoint_test: Add Device ID for R-Car S4-8 PCIe controller Yoshihiro Shimoda
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