From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: Serge Semin <fancer.lancer@gmail.com>
Cc: "jingoohan1@gmail.com" <jingoohan1@gmail.com>,
"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"kw@linux.com" <kw@linux.com>,
"manivannan.sadhasivam@linaro.org"
<manivannan.sadhasivam@linaro.org>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"kishon@kernel.org" <kishon@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"marek.vasut+renesas@gmail.com" <marek.vasut+renesas@gmail.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>
Subject: RE: [PATCH v19 17/19] PCI: rcar-gen4-ep: Add R-Car Gen4 PCIe Endpoint support
Date: Thu, 24 Aug 2023 09:59:30 +0000 [thread overview]
Message-ID: <TYBPR01MB5341C69DA05F0341A0D4B78DD81DA@TYBPR01MB5341.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <agtnd477is7pphizfdoyltbak5pdjpvcx34lwvtnch5zbi7rfd@75ndc53djrgv>
Hello Serge,
> From: Serge Semin, Sent: Wednesday, August 23, 2023 9:03 PM
>
> On Wed, Aug 23, 2023 at 06:11:51PM +0900, Yoshihiro Shimoda wrote:
> > Add R-Car Gen4 PCIe Endpoint support. This controller is based on
> > Synopsys DesignWare PCIe.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > ---
> > drivers/pci/controller/dwc/Kconfig | 10 +
> > drivers/pci/controller/dwc/Makefile | 2 +
> > .../controller/dwc/pcie-rcar-gen4-ep-drv.c | 178 ++++++++++++++++++
> > 3 files changed, 190 insertions(+)
> > create mode 100644 drivers/pci/controller/dwc/pcie-rcar-gen4-ep-drv.c
> >
> > diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> > index 3884a67e4d56..65a7c56e64bd 100644
> > --- a/drivers/pci/controller/dwc/Kconfig
> > +++ b/drivers/pci/controller/dwc/Kconfig
> > @@ -425,4 +425,14 @@ config PCIE_RCAR_GEN4
> > To compile this driver as a module, choose M here: the module will be
> > called pcie-rcar-gen4-host.ko. This uses the DesignWare core.
> >
> > +config PCIE_RCAR_GEN4_EP
> > + tristate "Renesas R-Car Gen4 PCIe Endpoint controller"
> > + depends on ARCH_RENESAS || COMPILE_TEST
> > + depends on PCI_ENDPOINT
> > + select PCIE_DW_EP
> > + help
> > + Say Y here if you want PCIe endpoint controller support on R-Car Gen4
> > + SoCs. To compile this driver as a module, choose M here: the module
> > + will be called pcie-rcar-gen4-ep.ko. This uses the DesignWare core.
> > +
> > endmenu
> > diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile
> > index ab2c6bc16216..4d53d660e4fe 100644
> > --- a/drivers/pci/controller/dwc/Makefile
> > +++ b/drivers/pci/controller/dwc/Makefile
> > @@ -28,6 +28,8 @@ obj-$(CONFIG_PCIE_UNIPHIER_EP) += pcie-uniphier-ep.o
> > obj-$(CONFIG_PCIE_VISCONTI_HOST) += pcie-visconti.o
> > pcie-rcar-gen4-host-objs := pcie-rcar-gen4.o pcie-rcar-gen4-host-drv.o
> > obj-$(CONFIG_PCIE_RCAR_GEN4) += pcie-rcar-gen4-host.o
> > +pcie-rcar-gen4-ep-objs := pcie-rcar-gen4.o pcie-rcar-gen4-ep-drv.o
> > +obj-$(CONFIG_PCIE_RCAR_GEN4_EP) += pcie-rcar-gen4-ep.o
> >
> > # The following drivers are for devices that use the generic ACPI
> > # pci_root.c driver but don't support standard ECAM config access.
> > diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4-ep-drv.c b/drivers/pci/controller/dwc/pcie-rcar-gen4-ep-drv.c
> > new file mode 100644
> > index 000000000000..71f496ba0eeb
> > --- /dev/null
> > +++ b/drivers/pci/controller/dwc/pcie-rcar-gen4-ep-drv.c
> > @@ -0,0 +1,178 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * PCIe Endpoint driver for Renesas R-Car Gen4 Series SoCs
> > + * Copyright (C) 2022-2023 Renesas Electronics Corporation
> > + */
> > +
> > +#include <linux/interrupt.h>
> > +#include <linux/module.h>
> > +#include <linux/of_device.h>
> > +#include <linux/pci.h>
> > +#include <linux/platform_device.h>
> > +
> > +#include "pcie-rcar-gen4.h"
> > +#include "pcie-designware.h"
> > +
> > +#define RCAR_GEN4_PCIE_EP_FUNC_DBI_OFFSET 0x1000
> > +#define RCAR_GEN4_PCIE_EP_FUNC_DBI2_OFFSET 0x800
> > +
> > +static void rcar_gen4_pcie_ep_pre_init(struct dw_pcie_ep *ep)
> > +{
> > + struct dw_pcie *dw = to_dw_pcie_from_ep(ep);
> > + struct rcar_gen4_pcie *rcar = to_rcar_gen4_pcie(dw);
> > + int ret;
> > +
>
> > + ret = clk_bulk_prepare_enable(DW_PCIE_NUM_CORE_CLKS, dw->core_clks);
> > + if (ret) {
> > + dev_err(dw->dev, "Failed to enable ref clocks\n");
> > + return;
> > + }
> > +
> > + rcar_gen4_pcie_common_init(rcar);
>
> The same note as to the previous patch. The clk_bulk_prepare_enable()
> method invocation can be moved to rcar_gen4_pcie_common_init().
I got it.
> > +
> > + writel(PCIEDMAINTSTSEN_INIT, rcar->base + PCIEDMAINTSTSEN);
> > +}
> > +
> > +static void rcar_gen4_pcie_ep_init(struct dw_pcie_ep *ep)
> > +{
> > + struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> > + enum pci_barno bar;
> > +
> > + for (bar = 0; bar < PCI_STD_NUM_BARS; bar++)
> > + dw_pcie_ep_reset_bar(pci, bar);
> > +}
> > +
> > +static void rcar_gen4_pcie_ep_deinit(struct dw_pcie_ep *ep)
> > +{
> > + struct dw_pcie *dw = to_dw_pcie_from_ep(ep);
> > + struct rcar_gen4_pcie *rcar = to_rcar_gen4_pcie(dw);
> > +
> > + writel(0, rcar->base + PCIEDMAINTSTSEN);
>
> > + rcar_gen4_pcie_common_deinit(rcar);
> > + clk_bulk_disable_unprepare(DW_PCIE_NUM_CORE_CLKS, dw->core_clks);
>
> and clk_bulk_disable_unprepare() - to rcar_gen4_pcie_common_deinit().
>
> With the above notes fixed feel free to add:
>
> Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Thank you very much for your review!
Best regards,
Yoshihiro Shimoda
> -Serge(y)
>
> > +}
> > +
> > +static int rcar_gen4_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
> > + unsigned int type, u16 interrupt_num)
> > +{
> > + struct dw_pcie *dw = to_dw_pcie_from_ep(ep);
> > +
> > + switch (type) {
> > + case PCI_IRQ_LEGACY:
> > + return dw_pcie_ep_raise_legacy_irq(ep, func_no);
> > + case PCI_IRQ_MSI:
> > + return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num);
> > + default:
> > + dev_err(dw->dev, "Unknown IRQ type\n");
> > + return -EINVAL;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static const struct pci_epc_features rcar_gen4_pcie_epc_features = {
> > + .linkup_notifier = false,
> > + .msi_capable = true,
> > + .msix_capable = false,
> > + .reserved_bar = 1 << BAR_1 | 1 << BAR_3 | 1 << BAR_5,
> > + .align = SZ_1M,
> > +};
> > +
> > +static const struct pci_epc_features*
> > +rcar_gen4_pcie_ep_get_features(struct dw_pcie_ep *ep)
> > +{
> > + return &rcar_gen4_pcie_epc_features;
> > +}
> > +
> > +static unsigned int rcar_gen4_pcie_ep_func_conf_select(struct dw_pcie_ep *ep,
> > + u8 func_no)
> > +{
> > + return func_no * RCAR_GEN4_PCIE_EP_FUNC_DBI_OFFSET;
> > +}
> > +
> > +static unsigned int rcar_gen4_pcie_ep_get_dbi2_offset(struct dw_pcie_ep *ep,
> > + u8 func_no)
> > +{
> > + return func_no * RCAR_GEN4_PCIE_EP_FUNC_DBI2_OFFSET;
> > +}
> > +
> > +static const struct dw_pcie_ep_ops pcie_ep_ops = {
> > + .pre_init = rcar_gen4_pcie_ep_pre_init,
> > + .ep_init = rcar_gen4_pcie_ep_init,
> > + .deinit = rcar_gen4_pcie_ep_deinit,
> > + .raise_irq = rcar_gen4_pcie_ep_raise_irq,
> > + .get_features = rcar_gen4_pcie_ep_get_features,
> > + .func_conf_select = rcar_gen4_pcie_ep_func_conf_select,
> > + .get_dbi2_offset = rcar_gen4_pcie_ep_get_dbi2_offset,
> > +};
> > +
> > +static int rcar_gen4_add_pcie_ep(struct rcar_gen4_pcie *rcar)
> > +{
> > + struct dw_pcie_ep *ep = &rcar->dw.ep;
> > +
> > + rcar->mode = DW_PCIE_EP_TYPE;
> > + ep->ops = &pcie_ep_ops;
> > +
> > + return dw_pcie_ep_init(ep);
> > +}
> > +
> > +static void rcar_gen4_remove_pcie_ep(struct rcar_gen4_pcie *rcar)
> > +{
> > + dw_pcie_ep_exit(&rcar->dw.ep);
> > +}
> > +
> > +static int rcar_gen4_pcie_ep_probe(struct platform_device *pdev)
> > +{
> > + struct rcar_gen4_pcie *rcar;
> > + int err;
> > +
> > + rcar = rcar_gen4_pcie_devm_alloc(pdev);
> > + if (IS_ERR(rcar))
> > + return PTR_ERR(rcar);
> > +
> > + err = rcar_gen4_pcie_get_resources(rcar);
> > + if (err)
> > + return err;
> > +
> > + err = rcar_gen4_pcie_prepare(rcar);
> > + if (err)
> > + return err;
> > +
> > + err = rcar_gen4_add_pcie_ep(rcar);
> > + if (err)
> > + goto err_unprepare;
> > +
> > + return 0;
> > +
> > +err_unprepare:
> > + rcar_gen4_pcie_unprepare(rcar);
> > +
> > + return err;
> > +}
> > +
> > +static void rcar_gen4_pcie_ep_remove(struct platform_device *pdev)
> > +{
> > + struct rcar_gen4_pcie *rcar = platform_get_drvdata(pdev);
> > +
> > + rcar_gen4_remove_pcie_ep(rcar);
> > + rcar_gen4_pcie_unprepare(rcar);
> > +}
> > +
> > +static const struct of_device_id rcar_gen4_pcie_of_match[] = {
> > + { .compatible = "renesas,rcar-gen4-pcie-ep", },
> > + {},
> > +};
> > +MODULE_DEVICE_TABLE(of, rcar_gen4_pcie_of_match);
> > +
> > +static struct platform_driver rcar_gen4_pcie_ep_driver = {
> > + .driver = {
> > + .name = "pcie-rcar-gen4-ep",
> > + .of_match_table = rcar_gen4_pcie_of_match,
> > + },
> > + .probe = rcar_gen4_pcie_ep_probe,
> > + .remove_new = rcar_gen4_pcie_ep_remove,
> > +};
> > +module_platform_driver(rcar_gen4_pcie_ep_driver);
> > +
> > +MODULE_DESCRIPTION("Renesas R-Car Gen4 PCIe endpoint controller driver");
> > +MODULE_LICENSE("GPL");
> > --
> > 2.25.1
> >
next prev parent reply other threads:[~2023-08-24 10:00 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-23 9:11 [PATCH v19 00/19] PCI: rcar-gen4: Add R-Car Gen4 PCIe support Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 01/19] PCI: Add INTx Mechanism Messages macros Yoshihiro Shimoda
2023-08-23 10:18 ` Serge Semin
2023-08-24 2:57 ` Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 02/19] PCI: dwc: Change arguments of dw_pcie_prog_outbound_atu() Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 03/19] PCI: dwc: Add outbound MSG TLPs support Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 04/19] PCI: designware-ep: Add INTx IRQs support Yoshihiro Shimoda
2023-08-23 10:32 ` Serge Semin
2023-08-24 1:58 ` Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 05/19] PCI: dwc: endpoint: Add multiple PFs support for dbi2 Yoshihiro Shimoda
2023-08-23 10:46 ` Serge Semin
2023-08-24 3:13 ` Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 06/19] PCI: dwc: Add dw_pcie_link_set_max_link_width() Yoshihiro Shimoda
2023-08-23 10:51 ` Serge Semin
2023-08-23 9:11 ` [PATCH v19 07/19] PCI: dwc: Add missing PCI_EXP_LNKCAP_MLW handling Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 08/19] PCI: tegra194: Drop PCI_EXP_LNKSTA_NLW setting Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 09/19] PCI: dwc: Add EDMA_UNROLL capability flag Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 10/19] PCI: dwc: Expose dw_pcie_ep_exit() to module Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 11/19] PCI: dwc: Expose dw_pcie_write_dbi2() " Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 12/19] PCI: dwc: endpoint: Introduce .pre_init() and .deinit() Yoshihiro Shimoda
2023-08-23 11:14 ` Serge Semin
2023-08-23 9:11 ` [PATCH v19 13/19] dt-bindings: PCI: dwc: Update maxItems of reg and reg-names Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 14/19] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 15/19] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Endpoint Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 16/19] PCI: rcar-gen4: Add R-Car Gen4 PCIe Host support Yoshihiro Shimoda
2023-08-23 11:55 ` Serge Semin
2023-08-24 9:58 ` Yoshihiro Shimoda
2023-08-23 9:11 ` [PATCH v19 17/19] PCI: rcar-gen4-ep: Add R-Car Gen4 PCIe Endpoint support Yoshihiro Shimoda
2023-08-23 12:02 ` Serge Semin
2023-08-24 9:59 ` Yoshihiro Shimoda [this message]
2023-08-23 9:11 ` [PATCH v19 18/19] MAINTAINERS: Update PCI DRIVER FOR RENESAS R-CAR for R-Car Gen4 Yoshihiro Shimoda
2023-08-23 12:04 ` Serge Semin
2023-08-23 9:11 ` [PATCH v19 19/19] misc: pci_endpoint_test: Add Device ID for R-Car S4-8 PCIe controller Yoshihiro Shimoda
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=TYBPR01MB5341C69DA05F0341A0D4B78DD81DA@TYBPR01MB5341.jpnprd01.prod.outlook.com \
--to=yoshihiro.shimoda.uh@renesas.com \
--cc=bhelgaas@google.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=fancer.lancer@gmail.com \
--cc=gustavo.pimentel@synopsys.com \
--cc=jingoohan1@gmail.com \
--cc=kishon@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=marek.vasut+renesas@gmail.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).