* [PATCH 2/4] dt-bindings: thermal: Add the idle cooling device
2020-03-29 22:03 [PATCH V2 1/4] powercap/drivers/idle_inject: Specify idle state max latency Daniel Lezcano
@ 2020-03-29 22:03 ` Daniel Lezcano
2020-04-07 13:36 ` Daniel Lezcano
` (2 more replies)
2020-03-29 22:03 ` [PATCH 3/4] thermal/drivers/cpuidle_cooling: Change the registration function Daniel Lezcano
` (2 subsequent siblings)
3 siblings, 3 replies; 11+ messages in thread
From: Daniel Lezcano @ 2020-03-29 22:03 UTC (permalink / raw)
To: rafael, robh
Cc: daniel.lezcano, Zhang Rui, Amit Kucheria, Rob Herring,
Mark Rutland, open list:THERMAL,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
Some devices are not able to cool down by reducing their voltage /
frequency because it could be not available or the system does not
allow voltage scaling. In this configuration, it is not possible to
use this strategy and the idle injection cooling device can be used
instead.
One idle cooling device is now present for the CPU as implemented by
the combination of the idle injection framework belonging to the power
capping framework and the thermal cooling device. The missing part is
the DT binding providing a way to describe how the cooling device will
work on the system.
A first iteration was done by making the cooling device to point to
the idle state. Unfortunately it does not make sense because it would
need to duplicate the idle state description for each CPU in order to
have a different phandle and make the thermal internal framework
happy.
It was proposed to add an cooling-cells to <3>, unfortunately the
thermal framework is expecting a value of <2> as stated by the
documentation and it is not possible from the cooling device generic
code to loop this third value to the back end cooling device.
Another proposal was to add a child 'thermal-idle' node as the SCMI
does. This approach allows to have a self-contained configuration for
the idle cooling device without colliding with the cpufreq cooling
device which is based on the CPU node. In addition, it allows to have
the cpufreq cooling device and the idle cooling device to co-exist
together as showed in the example.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
.../bindings/thermal/thermal-idle.yaml | 145 ++++++++++++++++++
1 file changed, 145 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/thermal-idle.yaml
diff --git a/Documentation/devicetree/bindings/thermal/thermal-idle.yaml b/Documentation/devicetree/bindings/thermal/thermal-idle.yaml
new file mode 100644
index 000000000000..f9f59cfa3c36
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/thermal-idle.yaml
@@ -0,0 +1,145 @@
+# SPDX-License-Identifier: (GPL-2.0)
+# Copyright 2020 Linaro Ltd.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Thermal idle cooling device binding
+
+maintainers:
+ - Daniel Lezcano <daniel.lezcano@linaro.org>
+
+description: |
+ The thermal idle cooling device allows the system to passively
+ mitigate the temperature on the device by injecting idle cycles,
+ forcing it to cool down.
+
+ This binding describes the thermal idle node.
+
+properties:
+ $nodename:
+ const: thermal-idle
+ description: |
+ A /thermal-idle node describes the idle cooling device properties to
+ cool down efficiently the attached thermal zone.
+
+ '#cooling-cells':
+ const: 2
+ description: |
+ Must be 2, in order to specify minimum and maximum cooling state used in
+ the cooling-maps reference. The first cell is the minimum cooling state
+ and the second cell is the maximum cooling state requested.
+
+ duration:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ The idle duration in microsecond the device begins to cool down.
+
+ latency:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ The exit latency constraint in microsecond for the injected
+ idle state for the device.
+
+required:
+ - '#cooling-cells'
+
+examples:
+ - |
+ #include <dt-bindings/thermal/thermal.h>
+
+ // Example: Combining idle cooling device on big CPUs with cpufreq cooling device
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ /* ... */
+
+ cpu_b0: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x0 0x100>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <436>;
+ #cooling-cells = <2>; /* min followed by max */
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ idle-thermal {
+ #cooling-cells = <2>;
+ duration = <10000>;
+ latency = <500>;
+ };
+ };
+
+ cpu_b1: cpu@101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x0 0x101>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <436>;
+ #cooling-cells = <2>; /* min followed by max */
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ idle-thermal {
+ #cooling-cells = <2>;
+ duration = <10000>;
+ latency = <500>;
+ };
+ };
+
+ /* ... */
+
+ };
+
+ /* ... */
+
+ thermal_zones {
+ cpu_thermal: cpu {
+ polling-delay-passive = <100>;
+ polling-delay = <1000>;
+
+ /* ... */
+
+ trips {
+ cpu_alert0: cpu_alert0 {
+ temperature = <65000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_alert1: cpu_alert1 {
+ temperature = <70000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_alert2: cpu_alert2 {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit: cpu_crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert1>;
+ cooling-device = <&{/cpus/cpu@100/idle-thermal} 0 15 >,
+ <&{/cpus/cpu@101/idle-thermal} 0 15>;
+ };
+
+ map1 {
+ trip = <&cpu_alert2>;
+ cooling-device =
+ <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 2/4] dt-bindings: thermal: Add the idle cooling device
2020-03-29 22:03 ` [PATCH 2/4] dt-bindings: thermal: Add the idle cooling device Daniel Lezcano
@ 2020-04-07 13:36 ` Daniel Lezcano
2020-04-07 14:09 ` Amit Kucheria
2020-04-10 16:59 ` Rob Herring
2 siblings, 0 replies; 11+ messages in thread
From: Daniel Lezcano @ 2020-04-07 13:36 UTC (permalink / raw)
To: rafael, robh
Cc: Zhang Rui, Amit Kucheria, Rob Herring, Mark Rutland,
open list:THERMAL,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
Hi Rob,
On 30/03/2020 00:03, Daniel Lezcano wrote:
> Some devices are not able to cool down by reducing their voltage /
> frequency because it could be not available or the system does not
> allow voltage scaling. In this configuration, it is not possible to
> use this strategy and the idle injection cooling device can be used
> instead.
>
> One idle cooling device is now present for the CPU as implemented by
> the combination of the idle injection framework belonging to the power
> capping framework and the thermal cooling device. The missing part is
> the DT binding providing a way to describe how the cooling device will
> work on the system.
>
> A first iteration was done by making the cooling device to point to
> the idle state. Unfortunately it does not make sense because it would
> need to duplicate the idle state description for each CPU in order to
> have a different phandle and make the thermal internal framework
> happy.
>
> It was proposed to add an cooling-cells to <3>, unfortunately the
> thermal framework is expecting a value of <2> as stated by the
> documentation and it is not possible from the cooling device generic
> code to loop this third value to the back end cooling device.
>
> Another proposal was to add a child 'thermal-idle' node as the SCMI
> does. This approach allows to have a self-contained configuration for
> the idle cooling device without colliding with the cpufreq cooling
> device which is based on the CPU node. In addition, it allows to have
> the cpufreq cooling device and the idle cooling device to co-exist
> together as showed in the example.
The other patches of the series are acked-by.
Do you think this patch is fine? I would like to apply the series.
Thanks
-- Daniel
[ ... ]
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/4] dt-bindings: thermal: Add the idle cooling device
2020-03-29 22:03 ` [PATCH 2/4] dt-bindings: thermal: Add the idle cooling device Daniel Lezcano
2020-04-07 13:36 ` Daniel Lezcano
@ 2020-04-07 14:09 ` Amit Kucheria
2020-04-10 16:59 ` Rob Herring
2 siblings, 0 replies; 11+ messages in thread
From: Amit Kucheria @ 2020-04-07 14:09 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Rafael J. Wysocki, Rob Herring, Zhang Rui, Rob Herring,
Mark Rutland, open list:THERMAL,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
On Mon, Mar 30, 2020 at 3:37 AM Daniel Lezcano
<daniel.lezcano@linaro.org> wrote:
>
> Some devices are not able to cool down by reducing their voltage /
> frequency because it could be not available or the system does not
> allow voltage scaling. In this configuration, it is not possible to
> use this strategy and the idle injection cooling device can be used
> instead.
>
> One idle cooling device is now present for the CPU as implemented by
> the combination of the idle injection framework belonging to the power
> capping framework and the thermal cooling device. The missing part is
> the DT binding providing a way to describe how the cooling device will
> work on the system.
>
> A first iteration was done by making the cooling device to point to
> the idle state. Unfortunately it does not make sense because it would
> need to duplicate the idle state description for each CPU in order to
> have a different phandle and make the thermal internal framework
> happy.
>
> It was proposed to add an cooling-cells to <3>, unfortunately the
> thermal framework is expecting a value of <2> as stated by the
> documentation and it is not possible from the cooling device generic
> code to loop this third value to the back end cooling device.
>
> Another proposal was to add a child 'thermal-idle' node as the SCMI
> does. This approach allows to have a self-contained configuration for
> the idle cooling device without colliding with the cpufreq cooling
> device which is based on the CPU node. In addition, it allows to have
> the cpufreq cooling device and the idle cooling device to co-exist
> together as showed in the example.
typo: shown
>
> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> ---
> .../bindings/thermal/thermal-idle.yaml | 145 ++++++++++++++++++
> 1 file changed, 145 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/thermal-idle.yaml
>
> diff --git a/Documentation/devicetree/bindings/thermal/thermal-idle.yaml b/Documentation/devicetree/bindings/thermal/thermal-idle.yaml
> new file mode 100644
> index 000000000000..f9f59cfa3c36
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/thermal-idle.yaml
> @@ -0,0 +1,145 @@
> +# SPDX-License-Identifier: (GPL-2.0)
> +# Copyright 2020 Linaro Ltd.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Thermal idle cooling device binding
> +
> +maintainers:
> + - Daniel Lezcano <daniel.lezcano@linaro.org>
> +
> +description: |
> + The thermal idle cooling device allows the system to passively
> + mitigate the temperature on the device by injecting idle cycles,
> + forcing it to cool down.
> +
> + This binding describes the thermal idle node.
> +
> +properties:
> + $nodename:
> + const: thermal-idle
> + description: |
> + A /thermal-idle node describes the idle cooling device properties to
> + cool down efficiently the attached thermal zone.
> +
> + '#cooling-cells':
> + const: 2
> + description: |
> + Must be 2, in order to specify minimum and maximum cooling state used in
> + the cooling-maps reference. The first cell is the minimum cooling state
> + and the second cell is the maximum cooling state requested.
> +
> + duration:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + The idle duration in microsecond the device begins to cool down.
s/begins to /should/?
> +
> + latency:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + The exit latency constraint in microsecond for the injected
> + idle state for the device.
I haven't yet checked this entire series, but what does this property
mean? Is it the latency constraint to apply when selecting an idle
state from among all the states described to cpuidle?
Shouldn't we just name the property exit-latency?
> +
> +required:
> + - '#cooling-cells'
> +
> +examples:
> + - |
> + #include <dt-bindings/thermal/thermal.h>
> +
> + // Example: Combining idle cooling device on big CPUs with cpufreq cooling device
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + /* ... */
> +
> + cpu_b0: cpu@100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a72";
> + reg = <0x0 0x100>;
> + enable-method = "psci";
> + capacity-dmips-mhz = <1024>;
> + dynamic-power-coefficient = <436>;
> + #cooling-cells = <2>; /* min followed by max */
> + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
> + idle-thermal {
thermal-idle?
> + #cooling-cells = <2>;
> + duration = <10000>;
> + latency = <500>;
> + };
> + };
> +
> + cpu_b1: cpu@101 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a72";
> + reg = <0x0 0x101>;
> + enable-method = "psci";
> + capacity-dmips-mhz = <1024>;
> + dynamic-power-coefficient = <436>;
> + #cooling-cells = <2>; /* min followed by max */
> + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
> + idle-thermal {
thermal-idle?
> + #cooling-cells = <2>;
> + duration = <10000>;
> + latency = <500>;
> + };
> + };
> +
> + /* ... */
> +
> + };
> +
> + /* ... */
> +
> + thermal_zones {
> + cpu_thermal: cpu {
> + polling-delay-passive = <100>;
> + polling-delay = <1000>;
> +
> + /* ... */
> +
> + trips {
> + cpu_alert0: cpu_alert0 {
> + temperature = <65000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu_alert1: cpu_alert1 {
> + temperature = <70000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu_alert2: cpu_alert2 {
> + temperature = <75000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu_crit: cpu_crit {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_alert1>;
> + cooling-device = <&{/cpus/cpu@100/idle-thermal} 0 15 >,
> + <&{/cpus/cpu@101/idle-thermal} 0 15>;
> + };
> +
> + map1 {
> + trip = <&cpu_alert2>;
> + cooling-device =
> + <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> + };
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 2/4] dt-bindings: thermal: Add the idle cooling device
2020-03-29 22:03 ` [PATCH 2/4] dt-bindings: thermal: Add the idle cooling device Daniel Lezcano
2020-04-07 13:36 ` Daniel Lezcano
2020-04-07 14:09 ` Amit Kucheria
@ 2020-04-10 16:59 ` Rob Herring
2020-04-12 18:08 ` Daniel Lezcano
2 siblings, 1 reply; 11+ messages in thread
From: Rob Herring @ 2020-04-10 16:59 UTC (permalink / raw)
To: Daniel Lezcano
Cc: rafael, Zhang Rui, Amit Kucheria, Mark Rutland,
open list:THERMAL,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
On Mon, Mar 30, 2020 at 12:03:18AM +0200, Daniel Lezcano wrote:
> Some devices are not able to cool down by reducing their voltage /
> frequency because it could be not available or the system does not
> allow voltage scaling. In this configuration, it is not possible to
> use this strategy and the idle injection cooling device can be used
> instead.
>
> One idle cooling device is now present for the CPU as implemented by
> the combination of the idle injection framework belonging to the power
> capping framework and the thermal cooling device. The missing part is
> the DT binding providing a way to describe how the cooling device will
> work on the system.
>
> A first iteration was done by making the cooling device to point to
> the idle state. Unfortunately it does not make sense because it would
> need to duplicate the idle state description for each CPU in order to
> have a different phandle and make the thermal internal framework
> happy.
>
> It was proposed to add an cooling-cells to <3>, unfortunately the
> thermal framework is expecting a value of <2> as stated by the
> documentation and it is not possible from the cooling device generic
> code to loop this third value to the back end cooling device.
>
> Another proposal was to add a child 'thermal-idle' node as the SCMI
> does. This approach allows to have a self-contained configuration for
> the idle cooling device without colliding with the cpufreq cooling
> device which is based on the CPU node. In addition, it allows to have
> the cpufreq cooling device and the idle cooling device to co-exist
> together as showed in the example.
>
> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> ---
> .../bindings/thermal/thermal-idle.yaml | 145 ++++++++++++++++++
> 1 file changed, 145 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/thermal-idle.yaml
>
> diff --git a/Documentation/devicetree/bindings/thermal/thermal-idle.yaml b/Documentation/devicetree/bindings/thermal/thermal-idle.yaml
> new file mode 100644
> index 000000000000..f9f59cfa3c36
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/thermal-idle.yaml
> @@ -0,0 +1,145 @@
> +# SPDX-License-Identifier: (GPL-2.0)
Dual license please.
> +# Copyright 2020 Linaro Ltd.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Thermal idle cooling device binding
> +
> +maintainers:
> + - Daniel Lezcano <daniel.lezcano@linaro.org>
> +
> +description: |
> + The thermal idle cooling device allows the system to passively
> + mitigate the temperature on the device by injecting idle cycles,
> + forcing it to cool down.
> +
> + This binding describes the thermal idle node.
> +
> +properties:
> + $nodename:
> + const: thermal-idle
> + description: |
> + A /thermal-idle node describes the idle cooling device properties to
/thermal-idle would be at the root node.
> + cool down efficiently the attached thermal zone.
> +
> + '#cooling-cells':
> + const: 2
> + description: |
> + Must be 2, in order to specify minimum and maximum cooling state used in
> + the cooling-maps reference. The first cell is the minimum cooling state
> + and the second cell is the maximum cooling state requested.
> +
> + duration:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + The idle duration in microsecond the device begins to cool down.
> +
> + latency:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + The exit latency constraint in microsecond for the injected
> + idle state for the device.
Both of these should have unit suffix. And then they don't need a type
def.
> +
> +required:
> + - '#cooling-cells'
> +
> +examples:
> + - |
> + #include <dt-bindings/thermal/thermal.h>
> +
> + // Example: Combining idle cooling device on big CPUs with cpufreq cooling device
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + /* ... */
> +
> + cpu_b0: cpu@100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a72";
> + reg = <0x0 0x100>;
> + enable-method = "psci";
> + capacity-dmips-mhz = <1024>;
> + dynamic-power-coefficient = <436>;
> + #cooling-cells = <2>; /* min followed by max */
> + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
> + idle-thermal {
thermal-idle...
> + #cooling-cells = <2>;
> + duration = <10000>;
> + latency = <500>;
> + };
> + };
> +
> + cpu_b1: cpu@101 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a72";
> + reg = <0x0 0x101>;
> + enable-method = "psci";
> + capacity-dmips-mhz = <1024>;
> + dynamic-power-coefficient = <436>;
> + #cooling-cells = <2>; /* min followed by max */
> + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
> + idle-thermal {
> + #cooling-cells = <2>;
> + duration = <10000>;
> + latency = <500>;
> + };
> + };
> +
> + /* ... */
> +
> + };
> +
> + /* ... */
> +
> + thermal_zones {
> + cpu_thermal: cpu {
> + polling-delay-passive = <100>;
> + polling-delay = <1000>;
> +
> + /* ... */
> +
> + trips {
> + cpu_alert0: cpu_alert0 {
> + temperature = <65000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu_alert1: cpu_alert1 {
> + temperature = <70000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu_alert2: cpu_alert2 {
> + temperature = <75000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu_crit: cpu_crit {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_alert1>;
> + cooling-device = <&{/cpus/cpu@100/idle-thermal} 0 15 >,
> + <&{/cpus/cpu@101/idle-thermal} 0 15>;
> + };
> +
> + map1 {
> + trip = <&cpu_alert2>;
> + cooling-device =
> + <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> + };
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 2/4] dt-bindings: thermal: Add the idle cooling device
2020-04-10 16:59 ` Rob Herring
@ 2020-04-12 18:08 ` Daniel Lezcano
0 siblings, 0 replies; 11+ messages in thread
From: Daniel Lezcano @ 2020-04-12 18:08 UTC (permalink / raw)
To: Rob Herring
Cc: rafael, Zhang Rui, Amit Kucheria, Mark Rutland,
open list:THERMAL,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
Hi Rob,
thanks for the review.
On 10/04/2020 18:59, Rob Herring wrote:
> On Mon, Mar 30, 2020 at 12:03:18AM +0200, Daniel Lezcano wrote:
[ ... ]
>> + '#cooling-cells':
>> + const: 2
>> + description: |
>> + Must be 2, in order to specify minimum and maximum cooling state used in
>> + the cooling-maps reference. The first cell is the minimum cooling state
>> + and the second cell is the maximum cooling state requested.
>> +
>> + duration:
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + description: |
>> + The idle duration in microsecond the device begins to cool down.
>> +
>> + latency:
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + description: |
>> + The exit latency constraint in microsecond for the injected
>> + idle state for the device.
>
> Both of these should have unit suffix. And then they don't need a type
> def.
Do you mean I should remove the $ref:
/schemas/types.yaml#/definitions/uint32 and change the name to
duration_us and latency_us ?
[ ... ]
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 3/4] thermal/drivers/cpuidle_cooling: Change the registration function
2020-03-29 22:03 [PATCH V2 1/4] powercap/drivers/idle_inject: Specify idle state max latency Daniel Lezcano
2020-03-29 22:03 ` [PATCH 2/4] dt-bindings: thermal: Add the idle cooling device Daniel Lezcano
@ 2020-03-29 22:03 ` Daniel Lezcano
2020-03-30 9:58 ` Viresh Kumar
2020-03-29 22:03 ` [PATCH 4/4] thermal: cpuidle: Register cpuidle cooling device Daniel Lezcano
2020-04-03 9:38 ` [PATCH V2 1/4] powercap/drivers/idle_inject: Specify idle state max latency Rafael J. Wysocki
3 siblings, 1 reply; 11+ messages in thread
From: Daniel Lezcano @ 2020-03-29 22:03 UTC (permalink / raw)
To: rafael, robh
Cc: daniel.lezcano, Amit Daniel Kachhap, Viresh Kumar, Javi Merino,
Zhang Rui, Amit Kucheria, open list:THERMAL/CPU_COOLING,
open list
Today, there is no user for the cpuidle cooling device. The targetted
platform is ARM and ARM64.
The cpuidle and the cpufreq cooling device are based on the device tree.
As the cpuidle cooling device can have its own configuration depending
on the platform and the available idle states. The DT node description
will give the optional properties to set the cooling device up.
Do no longer rely on the CPU node which is prone to error and will
lead to a confusion in the DT because the cpufreq cooling device is
also using it. Let initialize the cpuidle cooling device with the DT
binding.
This was tested on:
- hikey960
- hikey6220
- rock960
- db845c
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/thermal/cpuidle_cooling.c | 58 +++++++++++++++++++++++++------
include/linux/cpu_cooling.h | 7 ----
2 files changed, 47 insertions(+), 18 deletions(-)
diff --git a/drivers/thermal/cpuidle_cooling.c b/drivers/thermal/cpuidle_cooling.c
index 0bb843246f59..b2c81c427f05 100644
--- a/drivers/thermal/cpuidle_cooling.c
+++ b/drivers/thermal/cpuidle_cooling.c
@@ -10,6 +10,7 @@
#include <linux/err.h>
#include <linux/idle_inject.h>
#include <linux/idr.h>
+#include <linux/of_device.h>
#include <linux/slab.h>
#include <linux/thermal.h>
@@ -154,22 +155,25 @@ static struct thermal_cooling_device_ops cpuidle_cooling_ops = {
};
/**
- * cpuidle_of_cooling_register - Idle cooling device initialization function
+ * __cpuidle_cooling_register: register the cooling device
* @drv: a cpuidle driver structure pointer
- * @np: a node pointer to a device tree cooling device node
+ * @np: a device node structure pointer used for the thermal binding
*
- * This function is in charge of creating a cooling device per cpuidle
- * driver and register it to thermal framework.
+ * This function is in charge of allocating the cpuidle cooling device
+ * structure, the idle injection, initialize them and register the
+ * cooling device to the thermal framework.
*
- * Return: zero on success, or negative value corresponding to the
- * error detected in the underlying subsystems.
+ * Return: zero on success, a negative value returned by one of the
+ * underlying subsystem in case of error
*/
-int cpuidle_of_cooling_register(struct device_node *np,
- struct cpuidle_driver *drv)
+static int __cpuidle_cooling_register(struct device_node *np,
+ struct cpuidle_driver *drv)
{
struct idle_inject_device *ii_dev;
struct cpuidle_cooling_device *idle_cdev;
struct thermal_cooling_device *cdev;
+ unsigned int idle_duration_us = TICK_USEC;
+ unsigned int latency_us = UINT_MAX;
char dev_name[THERMAL_NAME_LENGTH];
int id, ret;
@@ -191,7 +195,11 @@ int cpuidle_of_cooling_register(struct device_node *np,
goto out_id;
}
- idle_inject_set_duration(ii_dev, TICK_USEC, TICK_USEC);
+ of_property_read_u32(np, "duration", &idle_duration_us);
+ of_property_read_u32(np, "latency", &latency_us);
+
+ idle_inject_set_duration(ii_dev, TICK_USEC, idle_duration_us);
+ idle_inject_set_latency(ii_dev, latency_us);
idle_cdev->ii_dev = ii_dev;
@@ -204,6 +212,9 @@ int cpuidle_of_cooling_register(struct device_node *np,
goto out_unregister;
}
+ pr_info("%s: Idle injection set with idle duration=%u, latency=%u\n",
+ dev_name, idle_duration_us, latency_us);
+
return 0;
out_unregister:
@@ -221,12 +232,37 @@ int cpuidle_of_cooling_register(struct device_node *np,
* @drv: a cpuidle driver structure pointer
*
* This function is in charge of creating a cooling device per cpuidle
- * driver and register it to thermal framework.
+ * driver and register it to the thermal framework.
*
* Return: zero on success, or negative value corresponding to the
* error detected in the underlying subsystems.
*/
int cpuidle_cooling_register(struct cpuidle_driver *drv)
{
- return cpuidle_of_cooling_register(NULL, drv);
+ struct device_node *cooling_node;
+ struct device_node *cpu_node;
+ int cpu, ret;
+
+ for_each_cpu(cpu, drv->cpumask) {
+
+ cpu_node = of_cpu_device_node_get(cpu);
+
+ cooling_node = of_get_child_by_name(cpu_node, "idle-thermal");
+
+ of_node_put(cpu_node);
+
+ if (!cooling_node)
+ continue;
+
+ ret = __cpuidle_cooling_register(cooling_node, drv);
+
+ of_node_put(cooling_node);
+
+ if (ret)
+ return ret;
+
+ cooling_node = NULL;
+ }
+
+ return 0;
}
diff --git a/include/linux/cpu_cooling.h b/include/linux/cpu_cooling.h
index 65501d8f9778..4d7b4a303327 100644
--- a/include/linux/cpu_cooling.h
+++ b/include/linux/cpu_cooling.h
@@ -64,18 +64,11 @@ struct cpuidle_driver;
#ifdef CONFIG_CPU_IDLE_THERMAL
int cpuidle_cooling_register(struct cpuidle_driver *drv);
-int cpuidle_of_cooling_register(struct device_node *np,
- struct cpuidle_driver *drv);
#else /* CONFIG_CPU_IDLE_THERMAL */
static inline int cpuidle_cooling_register(struct cpuidle_driver *drv)
{
return 0;
}
-static inline int cpuidle_of_cooling_register(struct device_node *np,
- struct cpuidle_driver *drv)
-{
- return 0;
-}
#endif /* CONFIG_CPU_IDLE_THERMAL */
#endif /* __CPU_COOLING_H__ */
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 3/4] thermal/drivers/cpuidle_cooling: Change the registration function
2020-03-29 22:03 ` [PATCH 3/4] thermal/drivers/cpuidle_cooling: Change the registration function Daniel Lezcano
@ 2020-03-30 9:58 ` Viresh Kumar
0 siblings, 0 replies; 11+ messages in thread
From: Viresh Kumar @ 2020-03-30 9:58 UTC (permalink / raw)
To: Daniel Lezcano
Cc: rafael, robh, Amit Daniel Kachhap, Javi Merino, Zhang Rui,
Amit Kucheria, open list:THERMAL/CPU_COOLING, open list
On 30-03-20, 00:03, Daniel Lezcano wrote:
> Today, there is no user for the cpuidle cooling device. The targetted
> platform is ARM and ARM64.
>
> The cpuidle and the cpufreq cooling device are based on the device tree.
>
> As the cpuidle cooling device can have its own configuration depending
> on the platform and the available idle states. The DT node description
> will give the optional properties to set the cooling device up.
>
> Do no longer rely on the CPU node which is prone to error and will
> lead to a confusion in the DT because the cpufreq cooling device is
> also using it. Let initialize the cpuidle cooling device with the DT
> binding.
>
> This was tested on:
> - hikey960
> - hikey6220
> - rock960
> - db845c
>
> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> ---
> drivers/thermal/cpuidle_cooling.c | 58 +++++++++++++++++++++++++------
> include/linux/cpu_cooling.h | 7 ----
> 2 files changed, 47 insertions(+), 18 deletions(-)
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 4/4] thermal: cpuidle: Register cpuidle cooling device
2020-03-29 22:03 [PATCH V2 1/4] powercap/drivers/idle_inject: Specify idle state max latency Daniel Lezcano
2020-03-29 22:03 ` [PATCH 2/4] dt-bindings: thermal: Add the idle cooling device Daniel Lezcano
2020-03-29 22:03 ` [PATCH 3/4] thermal/drivers/cpuidle_cooling: Change the registration function Daniel Lezcano
@ 2020-03-29 22:03 ` Daniel Lezcano
2020-04-03 9:38 ` [PATCH V2 1/4] powercap/drivers/idle_inject: Specify idle state max latency Rafael J. Wysocki
3 siblings, 0 replies; 11+ messages in thread
From: Daniel Lezcano @ 2020-03-29 22:03 UTC (permalink / raw)
To: rafael, robh
Cc: daniel.lezcano, Rafael J. Wysocki, Lorenzo Pieralisi,
Sudeep Holla, open list:CPU IDLE TIME MANAGEMENT FRAMEWORK,
open list, open list:CPUIDLE DRIVER - ARM PSCI
The cpuidle driver can be used as a cooling device by injecting idle
cycles. The DT binding for the idle state added an optional
When the property is set, register the cpuidle driver with the idle
state node pointer as a cooling device. The thermal framework will do
the association automatically with the thermal zone via the
cooling-device defined in the device tree cooling-maps section.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/cpuidle/cpuidle-arm.c | 5 +++++
drivers/cpuidle/cpuidle-psci.c | 5 +++++
2 files changed, 10 insertions(+)
diff --git a/drivers/cpuidle/cpuidle-arm.c b/drivers/cpuidle/cpuidle-arm.c
index 9e5156d39627..2406ac0ae134 100644
--- a/drivers/cpuidle/cpuidle-arm.c
+++ b/drivers/cpuidle/cpuidle-arm.c
@@ -8,6 +8,7 @@
#define pr_fmt(fmt) "CPUidle arm: " fmt
+#include <linux/cpu_cooling.h>
#include <linux/cpuidle.h>
#include <linux/cpumask.h>
#include <linux/cpu_pm.h>
@@ -124,6 +125,10 @@ static int __init arm_idle_init_cpu(int cpu)
if (ret)
goto out_kfree_drv;
+ ret = cpuidle_cooling_register(drv);
+ if (ret)
+ pr_err("Failed to register the idle cooling device: %d\n", ret);
+
return 0;
out_kfree_drv:
diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c
index edd7a54ef0d3..8e805bff646f 100644
--- a/drivers/cpuidle/cpuidle-psci.c
+++ b/drivers/cpuidle/cpuidle-psci.c
@@ -9,6 +9,7 @@
#define pr_fmt(fmt) "CPUidle PSCI: " fmt
#include <linux/cpuhotplug.h>
+#include <linux/cpu_cooling.h>
#include <linux/cpuidle.h>
#include <linux/cpumask.h>
#include <linux/cpu_pm.h>
@@ -305,6 +306,10 @@ static int __init psci_idle_init_cpu(int cpu)
if (ret)
goto out_kfree_drv;
+ ret = cpuidle_cooling_register(drv);
+ if (ret)
+ pr_err("Failed to register the idle cooling device: %d\n", ret);
+
return 0;
out_kfree_drv:
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH V2 1/4] powercap/drivers/idle_inject: Specify idle state max latency
2020-03-29 22:03 [PATCH V2 1/4] powercap/drivers/idle_inject: Specify idle state max latency Daniel Lezcano
` (2 preceding siblings ...)
2020-03-29 22:03 ` [PATCH 4/4] thermal: cpuidle: Register cpuidle cooling device Daniel Lezcano
@ 2020-04-03 9:38 ` Rafael J. Wysocki
2020-04-03 11:09 ` Daniel Lezcano
3 siblings, 1 reply; 11+ messages in thread
From: Rafael J. Wysocki @ 2020-04-03 9:38 UTC (permalink / raw)
To: Daniel Lezcano; +Cc: rafael, robh, open list:POWER MANAGEMENT CORE, open list
On Monday, March 30, 2020 12:03:17 AM CEST Daniel Lezcano wrote:
> Currently the idle injection framework uses the play_idle() function
> which puts the current CPU in an idle state. The idle state is the
> deepest one, as specified by the latency constraint when calling the
> subsequent play_idle_precise() function with the INT_MAX.
>
> The idle_injection is used by the cpuidle_cooling device which
> computes the idle / run duration to mitigate the temperature by
> injecting idle cycles. The cooling device has no control on the depth
> of the idle state.
>
> Allow finer control of the idle injection mechanism by allowing to
> specify the latency for the idle state. Thus the cooling device has
> the ability to have a guarantee on the exit latency of the idle states
> it is injecting.
>
> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
And I'm assuming that you will take care of the series yourself.
> ---
> - V2:
> - Remove the get_latency helper
>
> ---
> drivers/powercap/idle_inject.c | 16 +++++++++++++++-
> include/linux/idle_inject.h | 4 ++++
> 2 files changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/powercap/idle_inject.c b/drivers/powercap/idle_inject.c
> index cd1270614cc6..49f42c475620 100644
> --- a/drivers/powercap/idle_inject.c
> +++ b/drivers/powercap/idle_inject.c
> @@ -61,12 +61,14 @@ struct idle_inject_thread {
> * @timer: idle injection period timer
> * @idle_duration_us: duration of CPU idle time to inject
> * @run_duration_us: duration of CPU run time to allow
> + * @latency_us: max allowed latency
> * @cpumask: mask of CPUs affected by idle injection
> */
> struct idle_inject_device {
> struct hrtimer timer;
> unsigned int idle_duration_us;
> unsigned int run_duration_us;
> + unsigned int latency_us;
> unsigned long int cpumask[0];
> };
>
> @@ -138,7 +140,8 @@ static void idle_inject_fn(unsigned int cpu)
> */
> iit->should_run = 0;
>
> - play_idle(READ_ONCE(ii_dev->idle_duration_us));
> + play_idle_precise(READ_ONCE(ii_dev->idle_duration_us) * NSEC_PER_USEC,
> + READ_ONCE(ii_dev->latency_us) * NSEC_PER_USEC);
> }
>
> /**
> @@ -169,6 +172,16 @@ void idle_inject_get_duration(struct idle_inject_device *ii_dev,
> *idle_duration_us = READ_ONCE(ii_dev->idle_duration_us);
> }
>
> +/**
> + * idle_inject_set_latency - set the maximum latency allowed
> + * @latency_us: set the latency requirement for the idle state
> + */
> +void idle_inject_set_latency(struct idle_inject_device *ii_dev,
> + unsigned int latency_us)
> +{
> + WRITE_ONCE(ii_dev->latency_us, latency_us);
> +}
> +
> /**
> * idle_inject_start - start idle injections
> * @ii_dev: idle injection control device structure
> @@ -297,6 +310,7 @@ struct idle_inject_device *idle_inject_register(struct cpumask *cpumask)
> cpumask_copy(to_cpumask(ii_dev->cpumask), cpumask);
> hrtimer_init(&ii_dev->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
> ii_dev->timer.function = idle_inject_timer_fn;
> + ii_dev->latency_us = UINT_MAX;
>
> for_each_cpu(cpu, to_cpumask(ii_dev->cpumask)) {
>
> diff --git a/include/linux/idle_inject.h b/include/linux/idle_inject.h
> index a445cd1a36c5..91a8612b8bf9 100644
> --- a/include/linux/idle_inject.h
> +++ b/include/linux/idle_inject.h
> @@ -26,4 +26,8 @@ void idle_inject_set_duration(struct idle_inject_device *ii_dev,
> void idle_inject_get_duration(struct idle_inject_device *ii_dev,
> unsigned int *run_duration_us,
> unsigned int *idle_duration_us);
> +
> +void idle_inject_set_latency(struct idle_inject_device *ii_dev,
> + unsigned int latency_ns);
> +
> #endif /* __IDLE_INJECT_H__ */
>
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH V2 1/4] powercap/drivers/idle_inject: Specify idle state max latency
2020-04-03 9:38 ` [PATCH V2 1/4] powercap/drivers/idle_inject: Specify idle state max latency Rafael J. Wysocki
@ 2020-04-03 11:09 ` Daniel Lezcano
0 siblings, 0 replies; 11+ messages in thread
From: Daniel Lezcano @ 2020-04-03 11:09 UTC (permalink / raw)
To: Rafael J. Wysocki
Cc: rafael, robh, open list:POWER MANAGEMENT CORE, open list
On 03/04/2020 11:38, Rafael J. Wysocki wrote:
> On Monday, March 30, 2020 12:03:17 AM CEST Daniel Lezcano wrote:
>> Currently the idle injection framework uses the play_idle()
>> function which puts the current CPU in an idle state. The idle
>> state is the deepest one, as specified by the latency constraint
>> when calling the subsequent play_idle_precise() function with the
>> INT_MAX.
>>
>> The idle_injection is used by the cpuidle_cooling device which
>> computes the idle / run duration to mitigate the temperature by
>> injecting idle cycles. The cooling device has no control on the
>> depth of the idle state.
>>
>> Allow finer control of the idle injection mechanism by allowing
>> to specify the latency for the idle state. Thus the cooling
>> device has the ability to have a guarantee on the exit latency of
>> the idle states it is injecting.
>>
>> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
>
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
>
> And I'm assuming that you will take care of the series yourself.
Yes, thanks for reviewing.
- Daniel
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 11+ messages in thread