From: Mark Brown <broonie@kernel.org> To: Chris Brandt <chris.brandt@renesas.com> Cc: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Geert Uytterhoeven <geert+renesas@glider.be>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Mason Yang <masonccyang@mxic.com.tw>, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Subject: Re: [PATCH 4/6] spi: Add SPIBSC driver Date: Tue, 3 Dec 2019 14:19:44 +0000 Message-ID: <20191203141944.GI1998@sirena.org.uk> (raw) In-Reply-To: <20191203034519.5640-5-chris.brandt@renesas.com> [-- Attachment #1: Type: text/plain, Size: 2990 bytes --] On Mon, Dec 02, 2019 at 10:45:17PM -0500, Chris Brandt wrote: > +config SPI_SPIBSC > + tristate "Renesas SPI Multi I/O Bus Controller" > + depends on ARCH_R7S72100 || ARCH_R7S9210 I'm not seeing any build dependency here, please add an || COMPILE_TEST for build coverage. > +++ b/drivers/spi/spi-spibsc.c > @@ -0,0 +1,609 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * SPI Bus Space Controller (SPIBSC) bus driver Please make the entire comment block here a C++ one so things look more intentional. > +static void spibsc_write(struct spibsc_priv *sbsc, int reg, u32 val) > +{ > + iowrite32(val, sbsc->base + reg); > +} > +static void spibsc_write8(struct spibsc_priv *sbsc, int reg, u8 val) Blank likes between functions, please see coding-style.rst. Looking at a bunch of the stuff here it looks like you could benefit from regmap, it's got lots of debug infrastructure. > + if (tx) > + pr_debug("spibsc: send data: "); > + else > + pr_debug("spibsc: recv data: "); dev_dbg() if you're going to do tis. > + > + for (i = 0; i < len; ) { > + sprintf(line_buffer + line_index, " %02X", buf[i]); snprintf()! > +static int spibsc_transfer_one_message(struct spi_controller *master, > + struct spi_message *msg) > +{ > + struct spibsc_priv *sbsc = spi_controller_get_devdata(master); > + struct spi_transfer *t, *t_last; > + u8 tx_data[MAX_CMD_LEN]; > + int tx_only; > + u8 tx_len; > + int ret; > + > + t_last = list_last_entry(&msg->transfers, struct spi_transfer, > + transfer_list); > + /* defaults */ > + ret = 0; > + sbsc->last_xfer = 0; > + tx_only = 1; > + > + /* Analyze the messages */ > + t = list_first_entry(&msg->transfers, struct spi_transfer, > + transfer_list); > + if (t->rx_buf) { > + dev_dbg(sbsc->dev, "Cannot Rx without Tx first!\n"); > + return -EIO; These errors should probably be -EINVAL, you're failing on validation here. > + } > + list_for_each_entry(t, &msg->transfers, transfer_list) { Blank line here please as well. > + if (spi->bits_per_word != 8) { > + dev_err(sbsc->dev, "bits_per_word must be 8\n"); > + return -EIO; > + } The core will validate this for you. > + master->num_chipselect = 1; > + master->mode_bits = SPI_CPOL | SPI_CPHA; > + master->setup = spibsc_setup; > + master->transfer_one_message = spibsc_transfer_one_message; Set bits_per_word_mask here. > + dev_info(&pdev->dev, "probed\n"); > + Remove this, it's just noise. > +static int spibsc_remove(struct platform_device *pdev) > +{ > + struct spibsc_priv *sbsc = dev_get_drvdata(&pdev->dev); > + > + pm_runtime_put(&pdev->dev); > + pm_runtime_disable(&pdev->dev); There seems to be no purpose in the runtime PM code in this driver, there's no PM operations of any kind and the driver holds a runtime PM reference for the entire lifetime of the device. > + spi_unregister_controller(sbsc->master); You registered the controller with devm_, there's no need to unregister it and if you do you need to use a matching devm_ unregiser. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --]
next prev parent reply index Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-03 3:45 [PATCH 0/6] spi: Add Renesas SPIBSC controller Chris Brandt 2019-12-03 3:45 ` [PATCH 1/6] clk: renesas: mstp: Add critical clock from device tree support Chris Brandt 2019-12-03 18:32 ` Geert Uytterhoeven 2019-12-03 18:46 ` Chris Brandt 2019-12-03 18:51 ` Geert Uytterhoeven 2019-12-03 3:45 ` [PATCH 2/6] ARM: dts: r7s72100: Add SPIBSC clocks Chris Brandt 2019-12-03 18:42 ` Geert Uytterhoeven 2019-12-03 18:57 ` Chris Brandt 2019-12-03 19:12 ` Geert Uytterhoeven 2019-12-04 8:38 ` Lee Jones 2019-12-04 9:03 ` Geert Uytterhoeven 2019-12-04 9:47 ` Lee Jones 2019-12-04 11:00 ` Chris Brandt 2019-12-03 3:45 ` [PATCH 3/6] clk: renesas: r7s9210: Add SPIBSC clock Chris Brandt 2019-12-03 18:49 ` Geert Uytterhoeven 2019-12-03 19:09 ` Chris Brandt 2019-12-03 20:40 ` Geert Uytterhoeven 2019-12-04 3:09 ` Chris Brandt 2019-12-03 3:45 ` [PATCH 4/6] spi: Add SPIBSC driver Chris Brandt 2019-12-03 14:19 ` Mark Brown [this message] 2019-12-03 15:00 ` Chris Brandt 2019-12-03 18:29 ` Geert Uytterhoeven 2019-12-04 11:25 ` Mark Brown 2019-12-04 12:14 ` Geert Uytterhoeven 2019-12-04 15:51 ` Chris Brandt 2019-12-04 16:49 ` Mark Brown 2019-12-03 18:28 ` Geert Uytterhoeven 2019-12-04 11:18 ` Mark Brown 2019-12-04 22:12 ` Chris Brandt 2019-12-03 3:45 ` [PATCH 5/6] ARM: dts: r7s9210: Add SPIBSC Device support Chris Brandt 2019-12-03 18:59 ` Geert Uytterhoeven 2019-12-03 22:38 ` Chris Brandt 2019-12-04 7:57 ` Geert Uytterhoeven 2019-12-04 11:04 ` Chris Brandt 2019-12-03 3:45 ` [PATCH 6/6] dt-bindings: spi: Document Renesas SPIBSC bindings Chris Brandt 2019-12-03 9:14 ` Sergei Shtylyov 2019-12-03 13:27 ` Chris Brandt 2019-12-03 16:04 ` Sergei Shtylyov 2019-12-03 16:35 ` Chris Brandt 2019-12-03 18:57 ` Geert Uytterhoeven 2019-12-03 20:39 ` Geert Uytterhoeven 2019-12-04 2:54 ` Chris Brandt 2019-12-04 8:56 ` Geert Uytterhoeven 2019-12-04 13:31 ` Chris Brandt 2019-12-05 15:48 ` Geert Uytterhoeven 2019-12-05 16:00 ` Chris Brandt 2019-12-04 8:40 ` Geert Uytterhoeven 2019-12-03 22:33 ` Chris Brandt 2019-12-04 8:43 ` Geert Uytterhoeven 2019-12-04 11:19 ` Chris Brandt
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