* [PATCH 0/2] dmaengine: rcar-dmac: Add dma-channel-mask property support
@ 2019-08-28 11:13 Yoshihiro Shimoda
2019-08-28 11:13 ` [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped Yoshihiro Shimoda
2019-08-28 11:13 ` [PATCH 2/2] dmaengine: rcar-dmac: Add dma-channel-mask property support Yoshihiro Shimoda
0 siblings, 2 replies; 10+ messages in thread
From: Yoshihiro Shimoda @ 2019-08-28 11:13 UTC (permalink / raw)
To: vkoul; +Cc: dmaengine, linux-renesas-soc, Yoshihiro Shimoda
This patch series is based on
- renesas-drivers.git / renesas-drivers-2019-08-13-v5.3-rc4 tag
- and the following patch series:
https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=165881
The commit e2d896c08ca3 ("Documentation: bindings: dma: Add binding for
dma-channel-mask") adds the generic property and R-Car also has such
use cases so that I made this patch series. Before adding the property
support, I made a clean-up patch as the patch 1/2.
Yoshihiro Shimoda (2):
dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped
dmaengine: rcar-dmac: Add dma-channel-mask property support
drivers/dma/sh/rcar-dmac.c | 32 ++++++++++++++++++++++++--------
1 file changed, 24 insertions(+), 8 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped
2019-08-28 11:13 [PATCH 0/2] dmaengine: rcar-dmac: Add dma-channel-mask property support Yoshihiro Shimoda
@ 2019-08-28 11:13 ` Yoshihiro Shimoda
2019-08-31 8:49 ` Simon Horman
` (2 more replies)
2019-08-28 11:13 ` [PATCH 2/2] dmaengine: rcar-dmac: Add dma-channel-mask property support Yoshihiro Shimoda
1 sibling, 3 replies; 10+ messages in thread
From: Yoshihiro Shimoda @ 2019-08-28 11:13 UTC (permalink / raw)
To: vkoul; +Cc: dmaengine, linux-renesas-soc, Yoshihiro Shimoda
The commit 20c169aceb45 ("dmaengine: rcar-dmac: clear pertinence
number of channels") always set the DMACHCLR bit 0 to 1, but if
iommu is mapped to the device, this driver doesn't need to clear it.
So, this patch takes care of it by using "channels_mask" bitfield.
Note that, this patch doesn't have a "Fixes:" tag because the driver
doesn't manage the channel 0 anyway so that the behavior of
the channel is not changed.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
drivers/dma/sh/rcar-dmac.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
index 779b715..204160e 100644
--- a/drivers/dma/sh/rcar-dmac.c
+++ b/drivers/dma/sh/rcar-dmac.c
@@ -192,6 +192,7 @@ struct rcar_dmac_chan {
* @iomem: remapped I/O memory base
* @n_channels: number of available channels
* @channels: array of DMAC channels
+ * @channels_mask: bitfield of which DMA channels are managed by this driver
* @modules: bitmask of client modules in use
*/
struct rcar_dmac {
@@ -202,6 +203,7 @@ struct rcar_dmac {
unsigned int n_channels;
struct rcar_dmac_chan *channels;
+ unsigned int channels_mask;
DECLARE_BITMAP(modules, 256);
};
@@ -446,7 +448,7 @@ static int rcar_dmac_init(struct rcar_dmac *dmac)
u16 dmaor;
/* Clear all channels and enable the DMAC globally. */
- rcar_dmac_write(dmac, RCAR_DMACHCLR, GENMASK(dmac->n_channels - 1, 0));
+ rcar_dmac_write(dmac, RCAR_DMACHCLR, dmac->channels_mask);
rcar_dmac_write(dmac, RCAR_DMAOR,
RCAR_DMAOR_PRI_FIXED | RCAR_DMAOR_DME);
@@ -822,6 +824,9 @@ static void rcar_dmac_stop_all_chan(struct rcar_dmac *dmac)
for (i = 0; i < dmac->n_channels; ++i) {
struct rcar_dmac_chan *chan = &dmac->channels[i];
+ if (!(dmac->channels_mask & BIT(i)))
+ continue;
+
/* Stop and reinitialize the channel. */
spin_lock_irq(&chan->lock);
rcar_dmac_chan_halt(chan);
@@ -1801,6 +1806,8 @@ static int rcar_dmac_parse_of(struct device *dev, struct rcar_dmac *dmac)
return -EINVAL;
}
+ dmac->channels_mask = GENMASK(dmac->n_channels - 1, 0);
+
return 0;
}
@@ -1810,7 +1817,6 @@ static int rcar_dmac_probe(struct platform_device *pdev)
DMA_SLAVE_BUSWIDTH_2_BYTES | DMA_SLAVE_BUSWIDTH_4_BYTES |
DMA_SLAVE_BUSWIDTH_8_BYTES | DMA_SLAVE_BUSWIDTH_16_BYTES |
DMA_SLAVE_BUSWIDTH_32_BYTES | DMA_SLAVE_BUSWIDTH_64_BYTES;
- unsigned int channels_offset = 0;
struct dma_device *engine;
struct rcar_dmac *dmac;
const struct rcar_dmac_of_data *data;
@@ -1843,10 +1849,8 @@ static int rcar_dmac_probe(struct platform_device *pdev)
* level we can't disable it selectively, so ignore channel 0 for now if
* the device is part of an IOMMU group.
*/
- if (device_iommu_mapped(&pdev->dev)) {
- dmac->n_channels--;
- channels_offset = 1;
- }
+ if (device_iommu_mapped(&pdev->dev))
+ dmac->channels_mask &= ~BIT(0);
dmac->channels = devm_kcalloc(&pdev->dev, dmac->n_channels,
sizeof(*dmac->channels), GFP_KERNEL);
@@ -1903,8 +1907,10 @@ static int rcar_dmac_probe(struct platform_device *pdev)
INIT_LIST_HEAD(&engine->channels);
for (i = 0; i < dmac->n_channels; ++i) {
- ret = rcar_dmac_chan_probe(dmac, &dmac->channels[i], data,
- i + channels_offset);
+ if (!(dmac->channels_mask & BIT(i)))
+ continue;
+
+ ret = rcar_dmac_chan_probe(dmac, &dmac->channels[i], data, i);
if (ret < 0)
goto error;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] dmaengine: rcar-dmac: Add dma-channel-mask property support
2019-08-28 11:13 [PATCH 0/2] dmaengine: rcar-dmac: Add dma-channel-mask property support Yoshihiro Shimoda
2019-08-28 11:13 ` [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped Yoshihiro Shimoda
@ 2019-08-28 11:13 ` Yoshihiro Shimoda
2019-08-31 8:50 ` Simon Horman
2019-09-02 8:50 ` Geert Uytterhoeven
1 sibling, 2 replies; 10+ messages in thread
From: Yoshihiro Shimoda @ 2019-08-28 11:13 UTC (permalink / raw)
To: vkoul; +Cc: dmaengine, linux-renesas-soc, Yoshihiro Shimoda
This patch adds dma-channel-mask property support not to reserve
some DMA channels for some reasons. (for example: a heterogeneous
CPU uses it.)
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
drivers/dma/sh/rcar-dmac.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
index 204160e..bae0fe8 100644
--- a/drivers/dma/sh/rcar-dmac.c
+++ b/drivers/dma/sh/rcar-dmac.c
@@ -1806,7 +1806,17 @@ static int rcar_dmac_parse_of(struct device *dev, struct rcar_dmac *dmac)
return -EINVAL;
}
- dmac->channels_mask = GENMASK(dmac->n_channels - 1, 0);
+ /*
+ * If the driver is unable to read dma-channel-mask property,
+ * the driver assumes that it can use all channels.
+ */
+ ret = of_property_read_u32(np, "dma-channel-mask",
+ &dmac->channels_mask);
+ if (ret < 0)
+ dmac->channels_mask = GENMASK(dmac->n_channels - 1, 0);
+
+ /* If the property has out-of-channel mask, this driver clears it */
+ dmac->channels_mask &= GENMASK(dmac->n_channels - 1, 0);
return 0;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped
2019-08-28 11:13 ` [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped Yoshihiro Shimoda
@ 2019-08-31 8:49 ` Simon Horman
2019-09-02 8:36 ` Geert Uytterhoeven
2019-09-02 8:52 ` Geert Uytterhoeven
2 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2019-08-31 8:49 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: vkoul, dmaengine, linux-renesas-soc
On Wed, Aug 28, 2019 at 08:13:54PM +0900, Yoshihiro Shimoda wrote:
> The commit 20c169aceb45 ("dmaengine: rcar-dmac: clear pertinence
> number of channels") always set the DMACHCLR bit 0 to 1, but if
> iommu is mapped to the device, this driver doesn't need to clear it.
> So, this patch takes care of it by using "channels_mask" bitfield.
>
> Note that, this patch doesn't have a "Fixes:" tag because the driver
> doesn't manage the channel 0 anyway so that the behavior of
> the channel is not changed.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] dmaengine: rcar-dmac: Add dma-channel-mask property support
2019-08-28 11:13 ` [PATCH 2/2] dmaengine: rcar-dmac: Add dma-channel-mask property support Yoshihiro Shimoda
@ 2019-08-31 8:50 ` Simon Horman
2019-09-02 8:50 ` Geert Uytterhoeven
1 sibling, 0 replies; 10+ messages in thread
From: Simon Horman @ 2019-08-31 8:50 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: vkoul, dmaengine, linux-renesas-soc
On Wed, Aug 28, 2019 at 08:13:55PM +0900, Yoshihiro Shimoda wrote:
> This patch adds dma-channel-mask property support not to reserve
> some DMA channels for some reasons. (for example: a heterogeneous
> CPU uses it.)
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped
2019-08-28 11:13 ` [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped Yoshihiro Shimoda
2019-08-31 8:49 ` Simon Horman
@ 2019-09-02 8:36 ` Geert Uytterhoeven
2019-09-02 9:21 ` Yoshihiro Shimoda
2019-09-02 8:52 ` Geert Uytterhoeven
2 siblings, 1 reply; 10+ messages in thread
From: Geert Uytterhoeven @ 2019-09-02 8:36 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: Vinod, dmaengine, Linux-Renesas
Hi Shimoda-san,
On Wed, Aug 28, 2019 at 1:15 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> The commit 20c169aceb45 ("dmaengine: rcar-dmac: clear pertinence
> number of channels") always set the DMACHCLR bit 0 to 1, but if
> iommu is mapped to the device, this driver doesn't need to clear it.
> So, this patch takes care of it by using "channels_mask" bitfield.
Thanks for your patch!
> Note that, this patch doesn't have a "Fixes:" tag because the driver
> doesn't manage the channel 0 anyway so that the behavior of
> the channel is not changed.
This patch does fix a bug, as GENMASK(dmac->n_channels - 1, 0) doesn't
take into account channels_offset. Hence it not only clears channel 0,
as you mentioned, but also forgets to clear the last channel, which
is a real bug.
So I think this does warrant a
Fixes: 20c169aceb459575 ("dmaengine: rcar-dmac: clear pertinence
number of channels")
Or perhaps the actual bug should be fixed first in a separate patch?
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> --- a/drivers/dma/sh/rcar-dmac.c
> +++ b/drivers/dma/sh/rcar-dmac.c
> @@ -446,7 +448,7 @@ static int rcar_dmac_init(struct rcar_dmac *dmac)
> u16 dmaor;
>
> /* Clear all channels and enable the DMAC globally. */
> - rcar_dmac_write(dmac, RCAR_DMACHCLR, GENMASK(dmac->n_channels - 1, 0));
> + rcar_dmac_write(dmac, RCAR_DMACHCLR, dmac->channels_mask);
> rcar_dmac_write(dmac, RCAR_DMAOR,
> RCAR_DMAOR_PRI_FIXED | RCAR_DMAOR_DME);
>
> @@ -822,6 +824,9 @@ static void rcar_dmac_stop_all_chan(struct rcar_dmac *dmac)
> for (i = 0; i < dmac->n_channels; ++i) {
> struct rcar_dmac_chan *chan = &dmac->channels[i];
>
> + if (!(dmac->channels_mask & BIT(i)))
> + continue;
> +
> /* Stop and reinitialize the channel. */
> spin_lock_irq(&chan->lock);
> rcar_dmac_chan_halt(chan);
> @@ -1801,6 +1806,8 @@ static int rcar_dmac_parse_of(struct device *dev, struct rcar_dmac *dmac)
> return -EINVAL;
> }
>
> + dmac->channels_mask = GENMASK(dmac->n_channels - 1, 0);
You're aware dmac->n_channels can be 99, as per the check above, jut out of
context? ;-)
Probably that check should be changed to reject >= 32, as the hardware
and driver don't support more than 32 bits in CHCLR anyway.
> +
> return 0;
> }
>
> @@ -1810,7 +1817,6 @@ static int rcar_dmac_probe(struct platform_device *pdev)
> DMA_SLAVE_BUSWIDTH_2_BYTES | DMA_SLAVE_BUSWIDTH_4_BYTES |
> DMA_SLAVE_BUSWIDTH_8_BYTES | DMA_SLAVE_BUSWIDTH_16_BYTES |
> DMA_SLAVE_BUSWIDTH_32_BYTES | DMA_SLAVE_BUSWIDTH_64_BYTES;
> - unsigned int channels_offset = 0;
> struct dma_device *engine;
> struct rcar_dmac *dmac;
> const struct rcar_dmac_of_data *data;
> @@ -1843,10 +1849,8 @@ static int rcar_dmac_probe(struct platform_device *pdev)
> * level we can't disable it selectively, so ignore channel 0 for now if
> * the device is part of an IOMMU group.
> */
> - if (device_iommu_mapped(&pdev->dev)) {
> - dmac->n_channels--;
> - channels_offset = 1;
> - }
> + if (device_iommu_mapped(&pdev->dev))
> + dmac->channels_mask &= ~BIT(0);
>
> dmac->channels = devm_kcalloc(&pdev->dev, dmac->n_channels,
> sizeof(*dmac->channels), GFP_KERNEL);
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] dmaengine: rcar-dmac: Add dma-channel-mask property support
2019-08-28 11:13 ` [PATCH 2/2] dmaengine: rcar-dmac: Add dma-channel-mask property support Yoshihiro Shimoda
2019-08-31 8:50 ` Simon Horman
@ 2019-09-02 8:50 ` Geert Uytterhoeven
1 sibling, 0 replies; 10+ messages in thread
From: Geert Uytterhoeven @ 2019-09-02 8:50 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: Vinod, dmaengine, Linux-Renesas
Hi Shimoda-san,
On Wed, Aug 28, 2019 at 1:15 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> This patch adds dma-channel-mask property support not to reserve
> some DMA channels for some reasons. (for example: a heterogeneous
> CPU uses it.)
Thanks for your patch!
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
One suggestion below.
> --- a/drivers/dma/sh/rcar-dmac.c
> +++ b/drivers/dma/sh/rcar-dmac.c
> @@ -1806,7 +1806,17 @@ static int rcar_dmac_parse_of(struct device *dev, struct rcar_dmac *dmac)
> return -EINVAL;
> }
>
> - dmac->channels_mask = GENMASK(dmac->n_channels - 1, 0);
> + /*
> + * If the driver is unable to read dma-channel-mask property,
> + * the driver assumes that it can use all channels.
> + */
> + ret = of_property_read_u32(np, "dma-channel-mask",
> + &dmac->channels_mask);
> + if (ret < 0)
> + dmac->channels_mask = GENMASK(dmac->n_channels - 1, 0);
You could keep the preinitialization, and just ignore the return value:
dmac->channels_mask = GENMASK(dmac->n_channels - 1, 0);
of_property_read_u32(np, "dma-channel-mask", &dmac->channels_mask);
>
> +
> + /* If the property has out-of-channel mask, this driver clears it */
> + dmac->channels_mask &= GENMASK(dmac->n_channels - 1, 0);
>
> return 0;
> }
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped
2019-08-28 11:13 ` [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped Yoshihiro Shimoda
2019-08-31 8:49 ` Simon Horman
2019-09-02 8:36 ` Geert Uytterhoeven
@ 2019-09-02 8:52 ` Geert Uytterhoeven
2019-09-02 9:25 ` Yoshihiro Shimoda
2 siblings, 1 reply; 10+ messages in thread
From: Geert Uytterhoeven @ 2019-09-02 8:52 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: Vinod, dmaengine, Linux-Renesas
Hi Shimoda-san,
On Wed, Aug 28, 2019 at 1:15 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> The commit 20c169aceb45 ("dmaengine: rcar-dmac: clear pertinence
> number of channels") always set the DMACHCLR bit 0 to 1, but if
> iommu is mapped to the device, this driver doesn't need to clear it.
> So, this patch takes care of it by using "channels_mask" bitfield.
>
> Note that, this patch doesn't have a "Fixes:" tag because the driver
> doesn't manage the channel 0 anyway so that the behavior of
> the channel is not changed.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
> drivers/dma/sh/rcar-dmac.c | 22 ++++++++++++++--------
> 1 file changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
> index 779b715..204160e 100644
> --- a/drivers/dma/sh/rcar-dmac.c
> +++ b/drivers/dma/sh/rcar-dmac.c
> @@ -192,6 +192,7 @@ struct rcar_dmac_chan {
> * @iomem: remapped I/O memory base
> * @n_channels: number of available channels
> * @channels: array of DMAC channels
> + * @channels_mask: bitfield of which DMA channels are managed by this driver
> * @modules: bitmask of client modules in use
> */
> struct rcar_dmac {
> @@ -202,6 +203,7 @@ struct rcar_dmac {
>
> unsigned int n_channels;
> struct rcar_dmac_chan *channels;
> + unsigned int channels_mask;
Given you want to store the output of of_property_read_u32() here in a
subsequent patch, you may want to use u32 instead of unsigned int.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped
2019-09-02 8:36 ` Geert Uytterhoeven
@ 2019-09-02 9:21 ` Yoshihiro Shimoda
0 siblings, 0 replies; 10+ messages in thread
From: Yoshihiro Shimoda @ 2019-09-02 9:21 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Vinod, dmaengine, Linux-Renesas
Hi Geert-san,
> From: Geert Uytterhoeven, Sent: Monday, September 2, 2019 5:36 PM
>
> Hi Shimoda-san,
>
> On Wed, Aug 28, 2019 at 1:15 PM Yoshihiro Shimoda
> <yoshihiro.shimoda.uh@renesas.com> wrote:
> > The commit 20c169aceb45 ("dmaengine: rcar-dmac: clear pertinence
> > number of channels") always set the DMACHCLR bit 0 to 1, but if
> > iommu is mapped to the device, this driver doesn't need to clear it.
> > So, this patch takes care of it by using "channels_mask" bitfield.
>
> Thanks for your patch!
>
> > Note that, this patch doesn't have a "Fixes:" tag because the driver
> > doesn't manage the channel 0 anyway so that the behavior of
> > the channel is not changed.
>
> This patch does fix a bug, as GENMASK(dmac->n_channels - 1, 0) doesn't
> take into account channels_offset. Hence it not only clears channel 0,
> as you mentioned, but also forgets to clear the last channel, which
> is a real bug.
Indeed.
> So I think this does warrant a
> Fixes: 20c169aceb459575 ("dmaengine: rcar-dmac: clear pertinence
> number of channels")
>
> Or perhaps the actual bug should be fixed first in a separate patch?
I think so. So, now I had already submitted two series like below, but
I'll fix this at first.
https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=165881
https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=166457
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thank you for your review!
> > --- a/drivers/dma/sh/rcar-dmac.c
> > +++ b/drivers/dma/sh/rcar-dmac.c
>
> > @@ -446,7 +448,7 @@ static int rcar_dmac_init(struct rcar_dmac *dmac)
> > u16 dmaor;
> >
> > /* Clear all channels and enable the DMAC globally. */
> > - rcar_dmac_write(dmac, RCAR_DMACHCLR, GENMASK(dmac->n_channels - 1, 0));
> > + rcar_dmac_write(dmac, RCAR_DMACHCLR, dmac->channels_mask);
> > rcar_dmac_write(dmac, RCAR_DMAOR,
> > RCAR_DMAOR_PRI_FIXED | RCAR_DMAOR_DME);
> >
> > @@ -822,6 +824,9 @@ static void rcar_dmac_stop_all_chan(struct rcar_dmac *dmac)
> > for (i = 0; i < dmac->n_channels; ++i) {
> > struct rcar_dmac_chan *chan = &dmac->channels[i];
> >
> > + if (!(dmac->channels_mask & BIT(i)))
> > + continue;
> > +
> > /* Stop and reinitialize the channel. */
> > spin_lock_irq(&chan->lock);
> > rcar_dmac_chan_halt(chan);
> > @@ -1801,6 +1806,8 @@ static int rcar_dmac_parse_of(struct device *dev, struct rcar_dmac *dmac)
> > return -EINVAL;
> > }
> >
> > + dmac->channels_mask = GENMASK(dmac->n_channels - 1, 0);
>
> You're aware dmac->n_channels can be 99, as per the check above, jut out of
> context? ;-)
>
> Probably that check should be changed to reject >= 32, as the hardware
> and driver don't support more than 32 bits in CHCLR anyway.
I got it. So, I'll fix the rcar_dmac_parse_of() as one more a separate patch.
Best regards,
Yoshihiro Shimoda
> > +
> > return 0;
> > }
> >
> > @@ -1810,7 +1817,6 @@ static int rcar_dmac_probe(struct platform_device *pdev)
> > DMA_SLAVE_BUSWIDTH_2_BYTES | DMA_SLAVE_BUSWIDTH_4_BYTES |
> > DMA_SLAVE_BUSWIDTH_8_BYTES | DMA_SLAVE_BUSWIDTH_16_BYTES |
> > DMA_SLAVE_BUSWIDTH_32_BYTES | DMA_SLAVE_BUSWIDTH_64_BYTES;
> > - unsigned int channels_offset = 0;
> > struct dma_device *engine;
> > struct rcar_dmac *dmac;
> > const struct rcar_dmac_of_data *data;
> > @@ -1843,10 +1849,8 @@ static int rcar_dmac_probe(struct platform_device *pdev)
> > * level we can't disable it selectively, so ignore channel 0 for now if
> > * the device is part of an IOMMU group.
> > */
> > - if (device_iommu_mapped(&pdev->dev)) {
> > - dmac->n_channels--;
> > - channels_offset = 1;
> > - }
> > + if (device_iommu_mapped(&pdev->dev))
> > + dmac->channels_mask &= ~BIT(0);
> >
> > dmac->channels = devm_kcalloc(&pdev->dev, dmac->n_channels,
> > sizeof(*dmac->channels), GFP_KERNEL);
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped
2019-09-02 8:52 ` Geert Uytterhoeven
@ 2019-09-02 9:25 ` Yoshihiro Shimoda
0 siblings, 0 replies; 10+ messages in thread
From: Yoshihiro Shimoda @ 2019-09-02 9:25 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Vinod, dmaengine, Linux-Renesas
Hi Geert-san,
> From: Geert Uytterhoeven, Sent: Monday, September 2, 2019 5:52 PM
<snip>
> > @@ -202,6 +203,7 @@ struct rcar_dmac {
> >
> > unsigned int n_channels;
> > struct rcar_dmac_chan *channels;
> > + unsigned int channels_mask;
>
> Given you want to store the output of of_property_read_u32() here in a
> subsequent patch, you may want to use u32 instead of unsigned int.
I got it. I'll fix it.
Best regards,
Yoshihiro Shimoda
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-09-02 9:25 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-28 11:13 [PATCH 0/2] dmaengine: rcar-dmac: Add dma-channel-mask property support Yoshihiro Shimoda
2019-08-28 11:13 ` [PATCH 1/2] dmaengine: rcar-dmac: Don't set DMACHCLR bit 0 to 1 if iommu is mapped Yoshihiro Shimoda
2019-08-31 8:49 ` Simon Horman
2019-09-02 8:36 ` Geert Uytterhoeven
2019-09-02 9:21 ` Yoshihiro Shimoda
2019-09-02 8:52 ` Geert Uytterhoeven
2019-09-02 9:25 ` Yoshihiro Shimoda
2019-08-28 11:13 ` [PATCH 2/2] dmaengine: rcar-dmac: Add dma-channel-mask property support Yoshihiro Shimoda
2019-08-31 8:50 ` Simon Horman
2019-09-02 8:50 ` Geert Uytterhoeven
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