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* [PATCH v1 0/7] RISC-V: kconfig.socs cleanup, part 1
@ 2022-11-21 22:14 Conor Dooley
  2022-11-21 22:14 ` [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols Conor Dooley
                   ` (6 more replies)
  0 siblings, 7 replies; 19+ messages in thread
From: Conor Dooley @ 2022-11-21 22:14 UTC (permalink / raw)
  To: linux-riscv
  Cc: Conor Dooley, Arnd Bergmann, Christoph Hellwig, Damien Le Moal,
	Emil Renner Berthing, Geert Uytterhoeven, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

From: Conor Dooley <conor.dooley@microchip.com>

Hey all,

Following on from my RFC series a little bit ago, I'm back again with an
attempted conversion of our SOC_FOO symbols to a more uniform ARCH_FOO.
Last time around, I had about 30 patches [0], but here I have a more
modest offering.

Patch 1 adds stubs, that ideally would be applied for v6.2-rc1 (but
after week 1, see the note in that patch for more), which would allow
for converting drivers etc over a release cycle (or more) while allowing
everything else to keep working in the meantime.

Christoph Hellwig & Damien voiced some objections in the original thread,
hopefully the gradual conversion assuages Damien's concerns about
breaking defconfigs - but I am not sure what to do about Christoph's
dislike of the ARCH_FOO stuff. A change the world approach is unlikely
to be well received & introducing "duplicate" symbols for cross-arch
vendors would surely be similarly well received? I don't mind doing it,
but my instinct is that that is a futile use of time.

The rest of this series contains v6.3 material, converting SOC_FOO
usages in arch/riscv to ARCH_FOO.

Thanks,
Conor.

[0] - https://lore.kernel.org/linux-riscv/20220923185605.1900083-1-conor@kernel.org/

CC: Arnd Bergmann <arnd@arndb.de>
CC: Christoph Hellwig <hch@infradead.org>
CC: Conor.Dooley <conor.dooley@microchip.com>
CC: Damien Le Moal <damien.lemoal@opensource.wdc.com>
CC: Emil Renner Berthing <emil.renner.berthing@canonical.com>
CC: Geert Uytterhoeven <geert@linux-m68k.org>
CC: Heiko Stuebner <heiko@sntech.de>
CC: Palmer Dabbelt <palmer@dabbelt.com>
CC: Samuel Holland <samuel@sholland.org>
CC: linux-riscv@lists.infradead.org

Conor Dooley (7):
  RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
  RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN
  RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO
  RISC-V: stop selecting SIFIVE_PLIC at the SoC level
  RISC-V: stop selecting the PolarFire SoC clock driver
  RISC-V: stop selecting SiFive clock and serial drivers directly
  RISC-V: stop directly selecting drivers for SOC_CANAAN

 arch/riscv/Kconfig                     |  1 +
 arch/riscv/Kconfig.socs                | 44 +++++++++++++++-----------
 arch/riscv/Makefile                    |  2 +-
 arch/riscv/boot/dts/Makefile           |  2 +-
 arch/riscv/boot/dts/canaan/Makefile    | 14 ++++----
 arch/riscv/boot/dts/microchip/Makefile |  8 ++---
 arch/riscv/boot/dts/sifive/Makefile    |  4 +--
 arch/riscv/boot/dts/starfive/Makefile  |  2 +-
 8 files changed, 43 insertions(+), 34 deletions(-)

-- 
2.37.2


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^ permalink raw reply	[flat|nested] 19+ messages in thread

* [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
  2022-11-21 22:14 [PATCH v1 0/7] RISC-V: kconfig.socs cleanup, part 1 Conor Dooley
@ 2022-11-21 22:14 ` Conor Dooley
  2023-01-10 21:14   ` Geert Uytterhoeven
  2022-11-21 22:14 ` [PATCH v1 2/7] RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN Conor Dooley
                   ` (5 subsequent siblings)
  6 siblings, 1 reply; 19+ messages in thread
From: Conor Dooley @ 2022-11-21 22:14 UTC (permalink / raw)
  To: linux-riscv
  Cc: Conor Dooley, Arnd Bergmann, Christoph Hellwig, Damien Le Moal,
	Emil Renner Berthing, Geert Uytterhoeven, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

From: Conor Dooley <conor.dooley@microchip.com>

To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle,
introduce some aliases so that drivers etc that use the SOC_FOO symbols
can be converted.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
To me, the most straight-forward conversion looks like so:
- this patch is applied in week 2 of the merge window, to avoid
  any conflicts with the Renesas tree
- all users of the SOC_ variants can be converted over a release cycle
  (or more) & no trees need to merge an immutable branch.
- we convert defconfig etc over after all users are converted
- doing it over at least one release cycle means that `make oldconfig`
  will keep people's configs working as they upgrade
- any new SoC families added uses ARCH_FOO
---
 arch/riscv/Kconfig.socs | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 75fb0390d6bd..58cd2304b82d 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -1,5 +1,8 @@
 menu "SoC selection"
 
+config ARCH_MICROCHIP_POLARFIRE
+	def_bool SOC_MICROCHIP_POLARFIRE
+
 config SOC_MICROCHIP_POLARFIRE
 	bool "Microchip PolarFire SoCs"
 	select MCHP_CLK_MPFS
@@ -12,6 +15,9 @@ config ARCH_RENESAS
 	help
 	  This enables support for the RISC-V based Renesas SoCs.
 
+config ARCH_SIFIVE
+	def_bool SOC_SIFIVE
+
 config SOC_SIFIVE
 	bool "SiFive SoCs"
 	select SERIAL_SIFIVE if TTY
@@ -23,6 +29,9 @@ config SOC_SIFIVE
 	help
 	  This enables support for SiFive SoC platform hardware.
 
+config ARCH_STARFIVE
+	def_bool SOC_STARFIVE
+
 config SOC_STARFIVE
 	bool "StarFive SoCs"
 	select PINCTRL
@@ -31,6 +40,9 @@ config SOC_STARFIVE
 	help
 	  This enables support for StarFive SoC platform hardware.
 
+config ARCH_VIRT
+	def_bool SOC_VIRT
+	
 config SOC_VIRT
 	bool "QEMU Virt Machine"
 	select CLINT_TIMER if RISCV_M_MODE
@@ -46,6 +58,9 @@ config SOC_VIRT
 	help
 	  This enables support for QEMU Virt Machine.
 
+config ARCH_CANAAN
+	def_bool SOC_CANAAN
+
 config SOC_CANAAN
 	bool "Canaan Kendryte K210 SoC"
 	depends on !MMU
@@ -62,6 +77,9 @@ config SOC_CANAAN
 
 if SOC_CANAAN
 
+config ARCH_CANAAN_K210_DTB_BUILTIN
+	def_bool SOC_CANAAN_K210_DTB_BUILTIN
+
 config SOC_CANAAN_K210_DTB_BUILTIN
 	bool "Builtin device tree for the Canaan Kendryte K210"
 	depends on SOC_CANAAN
@@ -73,6 +91,9 @@ config SOC_CANAAN_K210_DTB_BUILTIN
 	  This option should be selected if no bootloader is being used.
 	  If unsure, say Y.
 
+config ARCH_CANAAN_K210_DTB_SOURCE
+	def_bool SOC_CANAAN_K210_DTB_SOURCE
+
 config SOC_CANAAN_K210_DTB_SOURCE
 	string "Source file for the Canaan Kendryte K210 builtin DTB"
 	depends on SOC_CANAAN
-- 
2.37.2


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^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v1 2/7] RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN
  2022-11-21 22:14 [PATCH v1 0/7] RISC-V: kconfig.socs cleanup, part 1 Conor Dooley
  2022-11-21 22:14 ` [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols Conor Dooley
@ 2022-11-21 22:14 ` Conor Dooley
  2022-11-21 22:14 ` [PATCH v1 3/7] RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO Conor Dooley
                   ` (4 subsequent siblings)
  6 siblings, 0 replies; 19+ messages in thread
From: Conor Dooley @ 2022-11-21 22:14 UTC (permalink / raw)
  To: linux-riscv
  Cc: Conor Dooley, Arnd Bergmann, Christoph Hellwig, Damien Le Moal,
	Emil Renner Berthing, Geert Uytterhoeven, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

From: Conor Dooley <conor.dooley@microchip.com>

While we cannot yet drop the SOC_ prefixed symbols, we can convert
uses of these symbols within Kconfig.socs to the ARCH_ variants.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig.socs | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 58cd2304b82d..203d1c528ef4 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -75,14 +75,14 @@ config SOC_CANAAN
 	help
 	  This enables support for Canaan Kendryte K210 SoC platform hardware.
 
-if SOC_CANAAN
+if ARCH_CANAAN
 
 config ARCH_CANAAN_K210_DTB_BUILTIN
 	def_bool SOC_CANAAN_K210_DTB_BUILTIN
 
 config SOC_CANAAN_K210_DTB_BUILTIN
 	bool "Builtin device tree for the Canaan Kendryte K210"
-	depends on SOC_CANAAN
+	depends on ARCH_CANAAN
 	default y
 	select OF
 	select BUILTIN_DTB
@@ -96,14 +96,14 @@ config ARCH_CANAAN_K210_DTB_SOURCE
 
 config SOC_CANAAN_K210_DTB_SOURCE
 	string "Source file for the Canaan Kendryte K210 builtin DTB"
-	depends on SOC_CANAAN
-	depends on SOC_CANAAN_K210_DTB_BUILTIN
+	depends on ARCH_CANAAN
+	depends on ARCH_CANAAN_K210_DTB_BUILTIN
 	default "k210_generic"
 	help
 	  Base name (without suffix, relative to arch/riscv/boot/dts/canaan)
 	  for the DTS file that will be used to produce the DTB linked into the
 	  kernel.
 
-endif # SOC_CANAAN
+endif # ARCH_CANAAN
 
 endmenu # "SoC selection"
-- 
2.37.2


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^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v1 3/7] RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO
  2022-11-21 22:14 [PATCH v1 0/7] RISC-V: kconfig.socs cleanup, part 1 Conor Dooley
  2022-11-21 22:14 ` [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols Conor Dooley
  2022-11-21 22:14 ` [PATCH v1 2/7] RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN Conor Dooley
@ 2022-11-21 22:14 ` Conor Dooley
  2022-11-22  6:04   ` Christoph Hellwig
  2022-11-21 22:14 ` [PATCH v1 4/7] RISC-V: stop selecting SIFIVE_PLIC at the SoC level Conor Dooley
                   ` (3 subsequent siblings)
  6 siblings, 1 reply; 19+ messages in thread
From: Conor Dooley @ 2022-11-21 22:14 UTC (permalink / raw)
  To: linux-riscv
  Cc: Conor Dooley, Arnd Bergmann, Christoph Hellwig, Damien Le Moal,
	Emil Renner Berthing, Geert Uytterhoeven, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

From: Conor Dooley <conor.dooley@microchip.com>

Convert all non user visible use of SOC_FOO symbols to their ARCH_FOO
variants. The canaan DTs are an outlier in that they're gated at the
directory and the file level. Drop the directory level gating while we
are swapping the symbol names over.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Makefile                    |  2 +-
 arch/riscv/boot/dts/Makefile           |  2 +-
 arch/riscv/boot/dts/canaan/Makefile    | 14 +++++++-------
 arch/riscv/boot/dts/microchip/Makefile |  8 ++++----
 arch/riscv/boot/dts/sifive/Makefile    |  4 ++--
 arch/riscv/boot/dts/starfive/Makefile  |  2 +-
 6 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 0d13b597cb55..46a520c1273c 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -131,7 +131,7 @@ endif
 endif
 
 ifneq ($(CONFIG_XIP_KERNEL),y)
-ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN),yy)
+ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy)
 KBUILD_IMAGE := $(boot)/loader.bin
 else
 ifeq ($(CONFIG_EFI_ZBOOT),)
diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile
index b0ff5fbabb0c..0c97d673b775 100644
--- a/arch/riscv/boot/dts/Makefile
+++ b/arch/riscv/boot/dts/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 subdir-y += sifive
 subdir-y += starfive
-subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan
+subdir-y += canaan
 subdir-y += microchip
 subdir-y += renesas
 
diff --git a/arch/riscv/boot/dts/canaan/Makefile b/arch/riscv/boot/dts/canaan/Makefile
index befe4eb7527b..520623264c87 100644
--- a/arch/riscv/boot/dts/canaan/Makefile
+++ b/arch/riscv/boot/dts/canaan/Makefile
@@ -1,9 +1,9 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_CANAAN) += canaan_kd233.dtb
-dtb-$(CONFIG_SOC_CANAAN) += k210_generic.dtb
-dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_bit.dtb
-dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_dock.dtb
-dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_go.dtb
-dtb-$(CONFIG_SOC_CANAAN) += sipeed_maixduino.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += canaan_kd233.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += k210_generic.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_bit.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_dock.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_go.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maixduino.dtb
 
-obj-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_SOC_CANAAN_K210_DTB_SOURCE))
+obj-$(CONFIG_ARCH_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_ARCH_CANAAN_K210_DTB_SOURCE))
diff --git a/arch/riscv/boot/dts/microchip/Makefile b/arch/riscv/boot/dts/microchip/Makefile
index 7427a20934f3..259c3c802cab 100644
--- a/arch/riscv/boot/dts/microchip/Makefile
+++ b/arch/riscv/boot/dts/microchip/Makefile
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
-dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
-dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
-dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
 obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
diff --git a/arch/riscv/boot/dts/sifive/Makefile b/arch/riscv/boot/dts/sifive/Makefile
index d90e4eb0ade8..6a5fbd4ed96a 100644
--- a/arch/riscv/boot/dts/sifive/Makefile
+++ b/arch/riscv/boot/dts/sifive/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb \
-			    hifive-unmatched-a00.dtb
+dtb-$(CONFIG_ARCH_SIFIVE) += hifive-unleashed-a00.dtb \
+			     hifive-unmatched-a00.dtb
 obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
index 039c143cba33..7b00a48580ca 100644
--- a/arch/riscv/boot/dts/starfive/Makefile
+++ b/arch/riscv/boot/dts/starfive/Makefile
@@ -1,2 +1,2 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
+dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
-- 
2.37.2


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^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v1 4/7] RISC-V: stop selecting SIFIVE_PLIC at the SoC level
  2022-11-21 22:14 [PATCH v1 0/7] RISC-V: kconfig.socs cleanup, part 1 Conor Dooley
                   ` (2 preceding siblings ...)
  2022-11-21 22:14 ` [PATCH v1 3/7] RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO Conor Dooley
@ 2022-11-21 22:14 ` Conor Dooley
  2022-11-21 22:14 ` [PATCH v1 5/7] RISC-V: stop selecting the PolarFire SoC clock driver Conor Dooley
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 19+ messages in thread
From: Conor Dooley @ 2022-11-21 22:14 UTC (permalink / raw)
  To: linux-riscv
  Cc: Conor Dooley, Arnd Bergmann, Christoph Hellwig, Damien Le Moal,
	Emil Renner Berthing, Geert Uytterhoeven, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

From: Conor Dooley <conor.dooley@microchip.com>

The SIFIVE_PLIC driver is used by all current RISC-V SoCs & will be,
where possible, used for future implementations. Rather than having each
SoC select the option in Kconfig.socs, do so at the arch level.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig      | 1 +
 arch/riscv/Kconfig.socs | 5 -----
 2 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index fec54872ab45..d7334e02d20b 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -125,6 +125,7 @@ config RISCV
 	select PCI_MSI if PCI
 	select RISCV_INTC
 	select RISCV_TIMER if RISCV_SBI
+	select SIFIVE_PLIC
 	select SPARSE_IRQ
 	select SYSCTL_EXCEPTION_TRACE
 	select THREAD_INFO_IN_TASK
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 203d1c528ef4..ce920f627f6d 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -6,7 +6,6 @@ config ARCH_MICROCHIP_POLARFIRE
 config SOC_MICROCHIP_POLARFIRE
 	bool "Microchip PolarFire SoCs"
 	select MCHP_CLK_MPFS
-	select SIFIVE_PLIC
 	help
 	  This enables support for Microchip PolarFire SoC platforms.
 
@@ -24,7 +23,6 @@ config SOC_SIFIVE
 	select SERIAL_SIFIVE_CONSOLE if TTY
 	select CLK_SIFIVE
 	select CLK_SIFIVE_PRCI
-	select SIFIVE_PLIC
 	select ERRATA_SIFIVE if !XIP_KERNEL
 	help
 	  This enables support for SiFive SoC platform hardware.
@@ -36,7 +34,6 @@ config SOC_STARFIVE
 	bool "StarFive SoCs"
 	select PINCTRL
 	select RESET_CONTROLLER
-	select SIFIVE_PLIC
 	help
 	  This enables support for StarFive SoC platform hardware.
 
@@ -51,7 +48,6 @@ config SOC_VIRT
 	select POWER_RESET_SYSCON_POWEROFF
 	select GOLDFISH
 	select RTC_DRV_GOLDFISH if RTC_CLASS
-	select SIFIVE_PLIC
 	select PM_GENERIC_DOMAINS if PM
 	select PM_GENERIC_DOMAINS_OF if PM && OF
 	select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI
@@ -67,7 +63,6 @@ config SOC_CANAAN
 	select CLINT_TIMER if RISCV_M_MODE
 	select SERIAL_SIFIVE if TTY
 	select SERIAL_SIFIVE_CONSOLE if TTY
-	select SIFIVE_PLIC
 	select ARCH_HAS_RESET_CONTROLLER
 	select PINCTRL
 	select COMMON_CLK
-- 
2.37.2


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^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v1 5/7] RISC-V: stop selecting the PolarFire SoC clock driver
  2022-11-21 22:14 [PATCH v1 0/7] RISC-V: kconfig.socs cleanup, part 1 Conor Dooley
                   ` (3 preceding siblings ...)
  2022-11-21 22:14 ` [PATCH v1 4/7] RISC-V: stop selecting SIFIVE_PLIC at the SoC level Conor Dooley
@ 2022-11-21 22:14 ` Conor Dooley
  2022-11-22  8:35   ` Geert Uytterhoeven
  2022-11-21 22:14 ` [PATCH v1 6/7] RISC-V: stop selecting SiFive clock and serial drivers directly Conor Dooley
  2022-11-21 22:14 ` [PATCH v1 7/7] RISC-V: stop directly selecting drivers for SOC_CANAAN Conor Dooley
  6 siblings, 1 reply; 19+ messages in thread
From: Conor Dooley @ 2022-11-21 22:14 UTC (permalink / raw)
  To: linux-riscv
  Cc: Conor Dooley, Arnd Bergmann, Christoph Hellwig, Damien Le Moal,
	Emil Renner Berthing, Geert Uytterhoeven, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

From: Conor Dooley <conor.dooley@microchip.com>

The driver is now enabled by default if SOC_MICROCHIP_POLARFIRE so
there is no longer a need to select it in Kconfig.socs

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig.socs | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index ce920f627f6d..aca5e750772c 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -5,7 +5,6 @@ config ARCH_MICROCHIP_POLARFIRE
 
 config SOC_MICROCHIP_POLARFIRE
 	bool "Microchip PolarFire SoCs"
-	select MCHP_CLK_MPFS
 	help
 	  This enables support for Microchip PolarFire SoC platforms.
 
-- 
2.37.2


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^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v1 6/7] RISC-V: stop selecting SiFive clock and serial drivers directly
  2022-11-21 22:14 [PATCH v1 0/7] RISC-V: kconfig.socs cleanup, part 1 Conor Dooley
                   ` (4 preceding siblings ...)
  2022-11-21 22:14 ` [PATCH v1 5/7] RISC-V: stop selecting the PolarFire SoC clock driver Conor Dooley
@ 2022-11-21 22:14 ` Conor Dooley
  2022-11-21 22:14 ` [PATCH v1 7/7] RISC-V: stop directly selecting drivers for SOC_CANAAN Conor Dooley
  6 siblings, 0 replies; 19+ messages in thread
From: Conor Dooley @ 2022-11-21 22:14 UTC (permalink / raw)
  To: linux-riscv
  Cc: Conor Dooley, Arnd Bergmann, Christoph Hellwig, Damien Le Moal,
	Emil Renner Berthing, Geert Uytterhoeven, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

From: Conor Dooley <conor.dooley@microchip.com>

The SiFive clock and serial drivers will now default to the value of
SOC_SIFIVE so there is no need to directly select their symbols
anymore.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig.socs | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index aca5e750772c..b90af1e22bc0 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -18,10 +18,6 @@ config ARCH_SIFIVE
 
 config SOC_SIFIVE
 	bool "SiFive SoCs"
-	select SERIAL_SIFIVE if TTY
-	select SERIAL_SIFIVE_CONSOLE if TTY
-	select CLK_SIFIVE
-	select CLK_SIFIVE_PRCI
 	select ERRATA_SIFIVE if !XIP_KERNEL
 	help
 	  This enables support for SiFive SoC platform hardware.
-- 
2.37.2


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^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v1 7/7] RISC-V: stop directly selecting drivers for SOC_CANAAN
  2022-11-21 22:14 [PATCH v1 0/7] RISC-V: kconfig.socs cleanup, part 1 Conor Dooley
                   ` (5 preceding siblings ...)
  2022-11-21 22:14 ` [PATCH v1 6/7] RISC-V: stop selecting SiFive clock and serial drivers directly Conor Dooley
@ 2022-11-21 22:14 ` Conor Dooley
  6 siblings, 0 replies; 19+ messages in thread
From: Conor Dooley @ 2022-11-21 22:14 UTC (permalink / raw)
  To: linux-riscv
  Cc: Conor Dooley, Arnd Bergmann, Christoph Hellwig, Damien Le Moal,
	Emil Renner Berthing, Geert Uytterhoeven, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

From: Conor Dooley <conor.dooley@microchip.com>

The serial and clock drivers will be enabled by default if the symbol
itself is enabled, so stop directly selecting the drivers in
Kconfigs.socs.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig.socs | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index b90af1e22bc0..34a54e5310a1 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -56,12 +56,9 @@ config SOC_CANAAN
 	bool "Canaan Kendryte K210 SoC"
 	depends on !MMU
 	select CLINT_TIMER if RISCV_M_MODE
-	select SERIAL_SIFIVE if TTY
-	select SERIAL_SIFIVE_CONSOLE if TTY
 	select ARCH_HAS_RESET_CONTROLLER
 	select PINCTRL
 	select COMMON_CLK
-	select COMMON_CLK_K210
 	help
 	  This enables support for Canaan Kendryte K210 SoC platform hardware.
 
-- 
2.37.2


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^ permalink raw reply related	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 3/7] RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO
  2022-11-21 22:14 ` [PATCH v1 3/7] RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO Conor Dooley
@ 2022-11-22  6:04   ` Christoph Hellwig
  2022-12-09  1:24     ` Palmer Dabbelt
  0 siblings, 1 reply; 19+ messages in thread
From: Christoph Hellwig @ 2022-11-22  6:04 UTC (permalink / raw)
  To: Conor Dooley
  Cc: linux-riscv, Conor Dooley, Arnd Bergmann, Christoph Hellwig,
	Damien Le Moal, Emil Renner Berthing, Geert Uytterhoeven,
	Heiko Stuebner, Palmer Dabbelt, Samuel Holland

On Mon, Nov 21, 2022 at 10:14:11PM +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> Convert all non user visible use of SOC_FOO symbols to their ARCH_FOO
> variants. The canaan DTs are an outlier in that they're gated at the
> directory and the file level. Drop the directory level gating while we
> are swapping the symbol names over.


I still very much disagree with this.  ARCH_FOO for something that
is not a Linux architecture is a really really bad idea.  We need to
fix arm and not convert riscv, which got this right.

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^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 5/7] RISC-V: stop selecting the PolarFire SoC clock driver
  2022-11-21 22:14 ` [PATCH v1 5/7] RISC-V: stop selecting the PolarFire SoC clock driver Conor Dooley
@ 2022-11-22  8:35   ` Geert Uytterhoeven
  2022-11-22  8:40     ` Conor.Dooley
  0 siblings, 1 reply; 19+ messages in thread
From: Geert Uytterhoeven @ 2022-11-22  8:35 UTC (permalink / raw)
  To: Conor Dooley
  Cc: linux-riscv, Conor Dooley, Arnd Bergmann, Christoph Hellwig,
	Damien Le Moal, Emil Renner Berthing, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

Hi Conor,

Thanks for your patch!

On Mon, Nov 21, 2022 at 11:18 PM Conor Dooley <conor@kernel.org> wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> The driver is now enabled by default if SOC_MICROCHIP_POLARFIRE so
> there is no longer a need to select it in Kconfig.socs

Where is it enabled by default?
I cannot seem to find that location...

>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -5,7 +5,6 @@ config ARCH_MICROCHIP_POLARFIRE
>
>  config SOC_MICROCHIP_POLARFIRE
>         bool "Microchip PolarFire SoCs"
> -       select MCHP_CLK_MPFS
>         help
>           This enables support for Microchip PolarFire SoC platforms.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 5/7] RISC-V: stop selecting the PolarFire SoC clock driver
  2022-11-22  8:35   ` Geert Uytterhoeven
@ 2022-11-22  8:40     ` Conor.Dooley
  0 siblings, 0 replies; 19+ messages in thread
From: Conor.Dooley @ 2022-11-22  8:40 UTC (permalink / raw)
  To: geert, conor
  Cc: linux-riscv, arnd, hch, damien.lemoal, emil.renner.berthing,
	heiko, palmer, samuel

On 22/11/2022 08:35, Geert Uytterhoeven wrote:
> On Mon, Nov 21, 2022 at 11:18 PM Conor Dooley <conor@kernel.org> wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> The driver is now enabled by default if SOC_MICROCHIP_POLARFIRE so
>> there is no longer a need to select it in Kconfig.socs
> 
> Where is it enabled by default?
> I cannot seem to find that location...

Huh, you're right.. I could have sworn I had submitted a patch for
that but it turns out I only submitted a patch to make the SiFive
clk stuff default on. I suppose my defconfig has an explicit set in
it and I never noticed.

Thanks Geert!

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^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 3/7] RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO
  2022-11-22  6:04   ` Christoph Hellwig
@ 2022-12-09  1:24     ` Palmer Dabbelt
  0 siblings, 0 replies; 19+ messages in thread
From: Palmer Dabbelt @ 2022-12-09  1:24 UTC (permalink / raw)
  To: Christoph Hellwig, Arnd Bergmann, linux-arm-kernel, soc,
	catalin.marinas, Will Deacon
  Cc: Conor Dooley, linux-riscv, Conor Dooley, Christoph Hellwig,
	damien.lemoal, emil.renner.berthing, geert, heiko, samuel

On Mon, 21 Nov 2022 22:04:21 PST (-0800), Christoph Hellwig wrote:
> On Mon, Nov 21, 2022 at 10:14:11PM +0000, Conor Dooley wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> Convert all non user visible use of SOC_FOO symbols to their ARCH_FOO
>> variants. The canaan DTs are an outlier in that they're gated at the
>> directory and the file level. Drop the directory level gating while we
>> are swapping the symbol names over.
>
>
> I still very much disagree with this.  ARCH_FOO for something that
> is not a Linux architecture is a really really bad idea.  We need to
> fix arm and not convert riscv, which got this right.

Makes sense, though I guess I'd argue that SOC is also a wrong name (but 
at least it doesn't conflict with the ARCH_* symbols that already 
exist).  That'll touch a bunch of trees, adding the Arm folks to see if 
they're on board.

I don't care a ton either way, my only opinion here is that RISC-V and 
Arm should use the same scheme.  If the Arm folks want to move over to 
SOC_* that works for me, and has the advantage of being  no work on my 
end ;)

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^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
  2022-11-21 22:14 ` [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols Conor Dooley
@ 2023-01-10 21:14   ` Geert Uytterhoeven
  2023-01-10 21:39     ` Conor Dooley
  2023-01-10 22:22     ` Damien Le Moal
  0 siblings, 2 replies; 19+ messages in thread
From: Geert Uytterhoeven @ 2023-01-10 21:14 UTC (permalink / raw)
  To: Conor Dooley
  Cc: linux-riscv, Conor Dooley, Arnd Bergmann, Christoph Hellwig,
	Damien Le Moal, Emil Renner Berthing, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

Hi Conor,

On Mon, Nov 21, 2022 at 11:18 PM Conor Dooley <conor@kernel.org> wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle,
> introduce some aliases so that drivers etc that use the SOC_FOO symbols
> can be converted.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Thanks for your patch, which is now commit fc43211939bb6874
("RISC-V: kconfig.socs: convert usage of SOC_CANAAN to
ARCH_CANAAN") in riscv/for-next

> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs

> @@ -73,6 +91,9 @@ config SOC_CANAAN_K210_DTB_BUILTIN
>           This option should be selected if no bootloader is being used.
>           If unsure, say Y.
>
> +config ARCH_CANAAN_K210_DTB_SOURCE
> +       def_bool SOC_CANAAN_K210_DTB_SOURCE

This is not correct, as SOC_CANAAN_K210_DTB_SOURCE below is
not a bool, but a string.

> +
>  config SOC_CANAAN_K210_DTB_SOURCE
>         string "Source file for the Canaan Kendryte K210 builtin DTB"
>         depends on SOC_CANAAN

Hence

    obj-$(CONFIG_ARCH_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o,
$(CONFIG_ARCH_CANAAN_K210_DTB_SOURCE))

will do the wrong thing later, and I get a non-bootable system (no output)
on my MAiX-BiT.

Unfortunately there is no def_string, so I don't think we can fix this
in a backwards-compatible way, and have to replace all
SOC_CANAAN_K210_DTB_SOURCE by ARCH_CANAAN_K210_DTB_SOURCE,
and urging users to update their .config manually.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
  2023-01-10 21:14   ` Geert Uytterhoeven
@ 2023-01-10 21:39     ` Conor Dooley
  2023-01-11  7:46       ` Geert Uytterhoeven
  2023-01-10 22:22     ` Damien Le Moal
  1 sibling, 1 reply; 19+ messages in thread
From: Conor Dooley @ 2023-01-10 21:39 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: linux-riscv, Conor Dooley, Arnd Bergmann, Christoph Hellwig,
	Damien Le Moal, Emil Renner Berthing, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland


[-- Attachment #1.1: Type: text/plain, Size: 3101 bytes --]

Hi Geert...

On Tue, Jan 10, 2023 at 10:14:51PM +0100, Geert Uytterhoeven wrote:
> On Mon, Nov 21, 2022 at 11:18 PM Conor Dooley <conor@kernel.org> wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle,
> > introduce some aliases so that drivers etc that use the SOC_FOO symbols
> > can be converted.
> >
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Thanks for your patch, which is now commit fc43211939bb6874
> ("RISC-V: kconfig.socs: convert usage of SOC_CANAAN to
> ARCH_CANAAN") in riscv/for-next

I see this and I immediately know it is going to be bad news!

> > --- a/arch/riscv/Kconfig.socs
> > +++ b/arch/riscv/Kconfig.socs
> 
> > @@ -73,6 +91,9 @@ config SOC_CANAAN_K210_DTB_BUILTIN
> >           This option should be selected if no bootloader is being used.
> >           If unsure, say Y.
> >
> > +config ARCH_CANAAN_K210_DTB_SOURCE
> > +       def_bool SOC_CANAAN_K210_DTB_SOURCE
> 
> This is not correct, as SOC_CANAAN_K210_DTB_SOURCE below is
> not a bool, but a string.
> 
> > +
> >  config SOC_CANAAN_K210_DTB_SOURCE
> >         string "Source file for the Canaan Kendryte K210 builtin DTB"
> >         depends on SOC_CANAAN
> 
> Hence
> 
>     obj-$(CONFIG_ARCH_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o,
> $(CONFIG_ARCH_CANAAN_K210_DTB_SOURCE))
> 
> will do the wrong thing later, and I get a non-bootable system (no output)
> on my MAiX-BiT.
> 
> Unfortunately there is no def_string, so I don't think we can fix this
> in a backwards-compatible way, and have to replace all
> SOC_CANAAN_K210_DTB_SOURCE by ARCH_CANAAN_K210_DTB_SOURCE,
> and urging users to update their .config manually.

That sucks. I'm not sure how I missed this - I had tested originally on
my k210, but evidently there was something wrong with how I had done it.
I must have not tested a subsequent revision on the k210. Mea cupla.

As it wasn't my intention to inflict this change without time for the
symbols to appear in configs, my immediate feeling is that this part of
the change should be reverted.

Of course, we could so something like:
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 34a54e5310a1..d36a5f39f13a 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -79,7 +79,8 @@ config SOC_CANAAN_K210_DTB_BUILTIN
          If unsure, say Y.
 
 config ARCH_CANAAN_K210_DTB_SOURCE
-       def_bool SOC_CANAAN_K210_DTB_SOURCE
+       string
+       default SOC_CANAAN_K210_DTB_SOURCE
 
 config SOC_CANAAN_K210_DTB_SOURCE
        string "Source file for the Canaan Kendryte K210 builtin DTB"

But I am not sure of how that interacts with the various methods of
updating ones config.
From, admittedly limited, testing it does get updated if
SOC_CANAAN_K210_DTB_SOURCE is changed using menuconfig. Similarly, if
one alters that symbol and does olddefconfig it also gets updated.

I'm sure I am overlooking something here though, what is it?

Thanks & apologies,
Conor.


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^ permalink raw reply related	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
  2023-01-10 21:14   ` Geert Uytterhoeven
  2023-01-10 21:39     ` Conor Dooley
@ 2023-01-10 22:22     ` Damien Le Moal
  2023-01-10 22:34       ` Conor Dooley
  1 sibling, 1 reply; 19+ messages in thread
From: Damien Le Moal @ 2023-01-10 22:22 UTC (permalink / raw)
  To: Geert Uytterhoeven, Conor Dooley
  Cc: linux-riscv, Conor Dooley, Arnd Bergmann, Christoph Hellwig,
	Emil Renner Berthing, Heiko Stuebner, Palmer Dabbelt,
	Samuel Holland

On 1/11/23 06:14, Geert Uytterhoeven wrote:
> Hi Conor,
> 
> On Mon, Nov 21, 2022 at 11:18 PM Conor Dooley <conor@kernel.org> wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle,
>> introduce some aliases so that drivers etc that use the SOC_FOO symbols
>> can be converted.
>>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Thanks for your patch, which is now commit fc43211939bb6874
> ("RISC-V: kconfig.socs: convert usage of SOC_CANAAN to
> ARCH_CANAAN") in riscv/for-next
> 
>> --- a/arch/riscv/Kconfig.socs
>> +++ b/arch/riscv/Kconfig.socs
> 
>> @@ -73,6 +91,9 @@ config SOC_CANAAN_K210_DTB_BUILTIN
>>           This option should be selected if no bootloader is being used.
>>           If unsure, say Y.
>>
>> +config ARCH_CANAAN_K210_DTB_SOURCE
>> +       def_bool SOC_CANAAN_K210_DTB_SOURCE
> 
> This is not correct, as SOC_CANAAN_K210_DTB_SOURCE below is
> not a bool, but a string.
> 
>> +
>>  config SOC_CANAAN_K210_DTB_SOURCE
>>         string "Source file for the Canaan Kendryte K210 builtin DTB"
>>         depends on SOC_CANAAN
> 
> Hence
> 
>     obj-$(CONFIG_ARCH_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o,
> $(CONFIG_ARCH_CANAAN_K210_DTB_SOURCE))
> 
> will do the wrong thing later, and I get a non-bootable system (no output)
> on my MAiX-BiT.
> 
> Unfortunately there is no def_string, so I don't think we can fix this
> in a backwards-compatible way, and have to replace all
> SOC_CANAAN_K210_DTB_SOURCE by ARCH_CANAAN_K210_DTB_SOURCE,
> and urging users to update their .config manually.

Yes, the default built-in dtb is set to k210_generic.dts since we have a
only generic nommu_k210[_sdcard] defconfig. We could add defconfigs per
board type, but that is not the common approach.

By the way, I recall some pushback with the renaming of SOC_XXX to
ARCH_XXX. I personally do not like it and Christoph suggested the revers
approach of renaming arm ARCH_XXX to something else instead. I did not
follow further on that discussion, but it looks like the riscv SOC_XXX
renaming went through ?

> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

-- 
Damien Le Moal
Western Digital Research


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^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
  2023-01-10 22:22     ` Damien Le Moal
@ 2023-01-10 22:34       ` Conor Dooley
  2023-01-10 22:47         ` Damien Le Moal
  0 siblings, 1 reply; 19+ messages in thread
From: Conor Dooley @ 2023-01-10 22:34 UTC (permalink / raw)
  To: Damien Le Moal
  Cc: Geert Uytterhoeven, linux-riscv, Conor Dooley, Arnd Bergmann,
	Christoph Hellwig, Emil Renner Berthing, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland


[-- Attachment #1.1: Type: text/plain, Size: 667 bytes --]

On Wed, Jan 11, 2023 at 07:22:47AM +0900, Damien Le Moal wrote:
> By the way, I recall some pushback with the renaming of SOC_XXX to
> ARCH_XXX. I personally do not like it and Christoph suggested the revers
> approach of renaming arm ARCH_XXX to something else instead. I did not
> follow further on that discussion, but it looks like the riscv SOC_XXX
> renaming went through ?

We asked the ARM guys about it, I think on IRC as they'd not replied to
the thread, and cold water was poured on the idea.

It's Murphy's Law that the thing with the problem would be the k210 too
isn't it.
I could've sworn I booted one of each vendor so kinda kicking myself
right now.

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^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
  2023-01-10 22:34       ` Conor Dooley
@ 2023-01-10 22:47         ` Damien Le Moal
  2023-01-11  7:50           ` Geert Uytterhoeven
  0 siblings, 1 reply; 19+ messages in thread
From: Damien Le Moal @ 2023-01-10 22:47 UTC (permalink / raw)
  To: Conor Dooley
  Cc: Geert Uytterhoeven, linux-riscv, Conor Dooley, Arnd Bergmann,
	Christoph Hellwig, Emil Renner Berthing, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

On 1/11/23 07:34, Conor Dooley wrote:
> On Wed, Jan 11, 2023 at 07:22:47AM +0900, Damien Le Moal wrote:
>> By the way, I recall some pushback with the renaming of SOC_XXX to
>> ARCH_XXX. I personally do not like it and Christoph suggested the revers
>> approach of renaming arm ARCH_XXX to something else instead. I did not
>> follow further on that discussion, but it looks like the riscv SOC_XXX
>> renaming went through ?
> 
> We asked the ARM guys about it, I think on IRC as they'd not replied to
> the thread, and cold water was poured on the idea.

That is really too bad. Naming something ARCH_XXX that is not a CPU
architecture is simply very confusing I think.

> It's Murphy's Law that the thing with the problem would be the k210 too
> isn't it.
> I could've sworn I booted one of each vendor so kinda kicking myself
> right now.

-- 
Damien Le Moal
Western Digital Research


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^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
  2023-01-10 21:39     ` Conor Dooley
@ 2023-01-11  7:46       ` Geert Uytterhoeven
  0 siblings, 0 replies; 19+ messages in thread
From: Geert Uytterhoeven @ 2023-01-11  7:46 UTC (permalink / raw)
  To: Conor Dooley
  Cc: linux-riscv, Conor Dooley, Arnd Bergmann, Christoph Hellwig,
	Damien Le Moal, Emil Renner Berthing, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

Hi Conor,

On Tue, Jan 10, 2023 at 10:40 PM Conor Dooley <conor@kernel.org> wrote:
> On Tue, Jan 10, 2023 at 10:14:51PM +0100, Geert Uytterhoeven wrote:
> > On Mon, Nov 21, 2022 at 11:18 PM Conor Dooley <conor@kernel.org> wrote:
> > > From: Conor Dooley <conor.dooley@microchip.com>
> > >
> > > To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle,
> > > introduce some aliases so that drivers etc that use the SOC_FOO symbols
> > > can be converted.
> > >
> > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> >
> > Thanks for your patch, which is now commit fc43211939bb6874
> > ("RISC-V: kconfig.socs: convert usage of SOC_CANAAN to
> > ARCH_CANAAN") in riscv/for-next
>
> I see this and I immediately know it is going to be bad news!
>
> > > --- a/arch/riscv/Kconfig.socs
> > > +++ b/arch/riscv/Kconfig.socs
> >
> > > @@ -73,6 +91,9 @@ config SOC_CANAAN_K210_DTB_BUILTIN
> > >           This option should be selected if no bootloader is being used.
> > >           If unsure, say Y.
> > >
> > > +config ARCH_CANAAN_K210_DTB_SOURCE
> > > +       def_bool SOC_CANAAN_K210_DTB_SOURCE
> >
> > This is not correct, as SOC_CANAAN_K210_DTB_SOURCE below is
> > not a bool, but a string.
> >
> > > +
> > >  config SOC_CANAAN_K210_DTB_SOURCE
> > >         string "Source file for the Canaan Kendryte K210 builtin DTB"
> > >         depends on SOC_CANAAN
> >
> > Hence
> >
> >     obj-$(CONFIG_ARCH_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o,
> > $(CONFIG_ARCH_CANAAN_K210_DTB_SOURCE))
> >
> > will do the wrong thing later, and I get a non-bootable system (no output)
> > on my MAiX-BiT.
> >
> > Unfortunately there is no def_string, so I don't think we can fix this
> > in a backwards-compatible way, and have to replace all
> > SOC_CANAAN_K210_DTB_SOURCE by ARCH_CANAAN_K210_DTB_SOURCE,
> > and urging users to update their .config manually.
>
> That sucks. I'm not sure how I missed this - I had tested originally on
> my k210, but evidently there was something wrong with how I had done it.
> I must have not tested a subsequent revision on the k210. Mea cupla.
>
> As it wasn't my intention to inflict this change without time for the
> symbols to appear in configs, my immediate feeling is that this part of
> the change should be reverted.
>
> Of course, we could so something like:
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 34a54e5310a1..d36a5f39f13a 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -79,7 +79,8 @@ config SOC_CANAAN_K210_DTB_BUILTIN
>           If unsure, say Y.
>
>  config ARCH_CANAAN_K210_DTB_SOURCE
> -       def_bool SOC_CANAAN_K210_DTB_SOURCE
> +       string
> +       default SOC_CANAAN_K210_DTB_SOURCE

Thanks, that works!
I guess it was too late in the evening for me, to realize that the lack of
"def_string" can be worked around using "string" and "default".

>  config SOC_CANAAN_K210_DTB_SOURCE
>         string "Source file for the Canaan Kendryte K210 builtin DTB"
>
> But I am not sure of how that interacts with the various methods of
> updating ones config.
> From, admittedly limited, testing it does get updated if
> SOC_CANAAN_K210_DTB_SOURCE is changed using menuconfig. Similarly, if
> one alters that symbol and does olddefconfig it also gets updated.

With the above, the value of SOC_CANAAN_K210_DTB_SOURCE in existing
config files will be copied to ARCH_CANAAN_K210_DTB_SOURCE when running
"make oldconfig".
Hence in v6.4 you can drop the old SOC_CANAAN_K210_DTB_SOURCE.  As that
symbol is not present in defconfigs, there is nothing to update there,

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
  2023-01-10 22:47         ` Damien Le Moal
@ 2023-01-11  7:50           ` Geert Uytterhoeven
  0 siblings, 0 replies; 19+ messages in thread
From: Geert Uytterhoeven @ 2023-01-11  7:50 UTC (permalink / raw)
  To: Damien Le Moal
  Cc: Conor Dooley, linux-riscv, Conor Dooley, Arnd Bergmann,
	Christoph Hellwig, Emil Renner Berthing, Heiko Stuebner,
	Palmer Dabbelt, Samuel Holland

Hi Damien,

On Tue, Jan 10, 2023 at 11:47 PM Damien Le Moal
<damien.lemoal@opensource.wdc.com> wrote:
> On 1/11/23 07:34, Conor Dooley wrote:
> > On Wed, Jan 11, 2023 at 07:22:47AM +0900, Damien Le Moal wrote:
> >> By the way, I recall some pushback with the renaming of SOC_XXX to
> >> ARCH_XXX. I personally do not like it and Christoph suggested the revers
> >> approach of renaming arm ARCH_XXX to something else instead. I did not
> >> follow further on that discussion, but it looks like the riscv SOC_XXX
> >> renaming went through ?
> >
> > We asked the ARM guys about it, I think on IRC as they'd not replied to
> > the thread, and cold water was poured on the idea.
>
> That is really too bad. Naming something ARCH_XXX that is not a CPU
> architecture is simply very confusing I think.

I agree it is.
However, fixing that means adding backwards-compatiblity symbols,
updating the few thousand existing users, and dropping the old symbols.
And handling all the fall-out of people who didn't run "make oldconfig"
in between, now wondering why their kernel no longer boots.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 19+ messages in thread

end of thread, other threads:[~2023-01-11  7:51 UTC | newest]

Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-11-21 22:14 [PATCH v1 0/7] RISC-V: kconfig.socs cleanup, part 1 Conor Dooley
2022-11-21 22:14 ` [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols Conor Dooley
2023-01-10 21:14   ` Geert Uytterhoeven
2023-01-10 21:39     ` Conor Dooley
2023-01-11  7:46       ` Geert Uytterhoeven
2023-01-10 22:22     ` Damien Le Moal
2023-01-10 22:34       ` Conor Dooley
2023-01-10 22:47         ` Damien Le Moal
2023-01-11  7:50           ` Geert Uytterhoeven
2022-11-21 22:14 ` [PATCH v1 2/7] RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN Conor Dooley
2022-11-21 22:14 ` [PATCH v1 3/7] RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO Conor Dooley
2022-11-22  6:04   ` Christoph Hellwig
2022-12-09  1:24     ` Palmer Dabbelt
2022-11-21 22:14 ` [PATCH v1 4/7] RISC-V: stop selecting SIFIVE_PLIC at the SoC level Conor Dooley
2022-11-21 22:14 ` [PATCH v1 5/7] RISC-V: stop selecting the PolarFire SoC clock driver Conor Dooley
2022-11-22  8:35   ` Geert Uytterhoeven
2022-11-22  8:40     ` Conor.Dooley
2022-11-21 22:14 ` [PATCH v1 6/7] RISC-V: stop selecting SiFive clock and serial drivers directly Conor Dooley
2022-11-21 22:14 ` [PATCH v1 7/7] RISC-V: stop directly selecting drivers for SOC_CANAAN Conor Dooley

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