From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org
Cc: palmer@dabbelt.com, damien.lemoal@opensource.wdc.com,
geert@linux-mk68.org, heiko@sntech.de, kernel@esmil.dk,
arnd@arndb.de, Conor Dooley <conor.dooley@microchip.com>
Subject: [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO
Date: Fri, 23 Sep 2022 19:55:39 +0100 [thread overview]
Message-ID: <20220923185605.1900083-1-conor@kernel.org> (raw)
From: Conor Dooley <conor.dooley@microchip.com>
Following on from LPC, here's the start of my efforts to clean up
Kconfig.socs.
My preference would be to take the whole thing through the RISC-V tree
for v6.2 to make things a bit less fiddly, but I am sending this as an
RFC in the hopes of getting some opinions on how the series should be
split up & merged. I guess it would always be possible to create a few
immutable branches for the individual subsystems that are being modified
& take the series through the riscv tree unless we hit a conflict in
-next. Obiviously for that route, maintainer acks will be needed.
The only SoCs I have, at the moment ;), are the jh7100, mpfs, fu540 and
the k210 so I've given those a whirl to make sure I didn't break
something.
I have also yet to deal with ARCH_VIRT, but just throwing this out for
some opinions on how to apply/split up the set before finalising a v1.
I've CCed a few people that may have an opinion here, but anyone that
has an opinion here - please shout!
One other point, is it worth adding something to the patch acceptance
policy to say "do your kconfig xyz way" or is that not something that's
worth doing since it is easy to push people in the right direction
during review?
The series is currently on top of:
https://lore.kernel.org/all/20220908142914.359777-1-cristian.ciocaltea@collabora.com/
Thanks,
Conor.
Conor Dooley (27):
clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
i2c: microchip-corei2c: replace SOC_MICROCHIP_POLARFIRE with
ARCH_MICROCHIP
mailbox: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
usb: musb: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
rtc: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
riscv: stop selecting the PolarFire SoC clock driver
riscv: replace SOC_STARFIVE with ARCH_STARFIVE
clk: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
pinctrl: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
reset: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
riscv: replace SOC_SIFIVE with ARCH_SIFIVE
soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
clk: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
clk: sifive: select by default if ARCH_SIFIVE
serial: sifive: select by default if ARCH_SIFIVE
PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE
riscv: stop selecting SiFive clock and serial drivers directly
riscv: convert SOC_VIRT to ARCH_VIRT
kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config
wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv
riscv: convert SOC_CANAAN to ARCH_CANAAN
clk: k210: convert SOC_CANAAN to ARCH_CANAAN
pinctrl: k210: convert SOC_CANAAN to ARCH_CANAAN
soc: k210: convert SOC_CANAAN to ARCH_CANAAN
reset: k210: convert SOC_CANAAN to ARCH_CANAAN
serial: sifive: select by default if ARCH_CANAAN
riscv: stop directly selecting drivers for ARCH_CANAAN
arch/riscv/Kconfig.socs | 30 +++++++------------
arch/riscv/Makefile | 2 +-
arch/riscv/boot/dts/Makefile | 2 +-
arch/riscv/boot/dts/canaan/Makefile | 14 ++++-----
arch/riscv/boot/dts/sifive/Makefile | 2 +-
arch/riscv/boot/dts/starfive/Makefile | 2 +-
arch/riscv/configs/defconfig | 6 ++--
arch/riscv/configs/nommu_k210_defconfig | 2 +-
.../riscv/configs/nommu_k210_sdcard_defconfig | 2 +-
arch/riscv/configs/nommu_virt_defconfig | 2 +-
arch/riscv/configs/rv32_defconfig | 4 +--
drivers/clk/Kconfig | 4 +--
drivers/clk/Makefile | 2 +-
drivers/clk/microchip/Kconfig | 3 +-
drivers/clk/sifive/Kconfig | 4 ++-
drivers/clk/starfive/Kconfig | 6 ++--
drivers/i2c/busses/Kconfig | 2 +-
drivers/mailbox/Kconfig | 2 +-
drivers/pci/controller/dwc/Kconfig | 2 +-
drivers/pinctrl/Kconfig | 8 ++---
drivers/reset/Kconfig | 8 ++---
drivers/rtc/Kconfig | 2 +-
drivers/soc/Makefile | 4 +--
drivers/soc/canaan/Kconfig | 4 +--
drivers/soc/sifive/Kconfig | 2 +-
drivers/tty/serial/Kconfig | 2 ++
drivers/usb/musb/Kconfig | 2 +-
tools/testing/kunit/qemu_configs/riscv.py | 2 +-
.../wireguard/qemu/arch/riscv32.config | 2 +-
.../wireguard/qemu/arch/riscv64.config | 2 +-
30 files changed, 64 insertions(+), 67 deletions(-)
--
2.37.3
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next reply other threads:[~2022-09-23 18:57 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-23 18:55 Conor Dooley [this message]
2022-09-23 18:55 ` [RFC 01/27] clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP Conor Dooley
2022-09-28 12:16 ` Christoph Hellwig
2022-09-28 12:51 ` Conor Dooley
2022-09-23 18:55 ` [RFC 02/27] i2c: microchip-corei2c: " Conor Dooley
2022-09-23 18:55 ` [RFC 03/27] mailbox: mpfs: " Conor Dooley
2022-09-23 18:55 ` [RFC 04/27] usb: musb: " Conor Dooley
2022-09-23 18:55 ` [RFC 05/27] rtc: " Conor Dooley
2022-09-23 18:55 ` [RFC 06/27] riscv: stop selecting the PolarFire SoC clock driver Conor Dooley
2022-09-23 18:55 ` [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE Conor Dooley
2022-09-23 19:09 ` Heiko Stuebner
2022-09-23 19:14 ` Conor Dooley
2022-09-23 19:20 ` Heiko Stuebner
2022-09-23 19:22 ` Conor Dooley
2022-09-23 18:55 ` [RFC 08/27] clk: starfive: " Conor Dooley
2022-09-23 18:55 ` [RFC 09/27] pinctrl: " Conor Dooley
2022-09-23 18:55 ` [RFC 10/27] reset: " Conor Dooley
2022-09-23 18:55 ` [RFC 11/27] riscv: replace SOC_SIFIVE with ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 12/27] soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 13/27] clk: " Conor Dooley
2022-09-23 18:55 ` [RFC 14/27] clk: sifive: select by default if ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 15/27] serial: " Conor Dooley
2022-09-23 18:55 ` [RFC 16/27] PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 17/27] riscv: stop selecting SiFive clock and serial drivers directly Conor Dooley
2022-09-23 18:55 ` [RFC 18/27] riscv: convert SOC_VIRT to ARCH_VIRT Conor Dooley
2022-09-23 18:55 ` [RFC 19/27] kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config Conor Dooley
2022-09-23 18:55 ` [RFC 20/27] wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv Conor Dooley
2022-09-24 10:03 ` Jason A. Donenfeld
2022-09-23 18:56 ` [RFC 21/27] riscv: convert SOC_CANAAN to ARCH_CANAAN Conor Dooley
2022-09-23 18:56 ` [RFC 22/27] clk: k210: " Conor Dooley
2022-09-23 18:56 ` [RFC 23/27] pinctrl: " Conor Dooley
2022-09-23 18:56 ` [RFC 24/27] soc: " Conor Dooley
2022-09-23 18:56 ` [RFC 25/27] reset: " Conor Dooley
2022-09-23 18:56 ` [RFC 26/27] serial: sifive: select by default if ARCH_CANAAN Conor Dooley
2022-09-23 18:56 ` [RFC 27/27] riscv: stop directly selecting drivers for ARCH_CANAAN Conor Dooley
2022-09-23 18:59 ` [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
2022-09-26 1:50 ` Damien Le Moal
2022-09-26 8:02 ` Conor Dooley
2022-09-26 9:04 ` Geert Uytterhoeven
2022-09-27 6:34 ` Conor Dooley
2022-09-27 6:48 ` Arnd Bergmann
2022-09-27 6:57 ` Conor Dooley
2022-09-27 7:03 ` Geert Uytterhoeven
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