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From: Heiko Stuebner <heiko@sntech.de>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com
Cc: christoph.muellner@vrull.eu, prabhakar.csengg@gmail.com,
	conor@kernel.org, philipp.tomsich@vrull.eu,
	ajones@ventanamicro.com, heiko@sntech.de,
	emil.renner.berthing@canonical.com, jszhang@kernel.org,
	Heiko Stuebner <heiko.stuebner@vrull.eu>,
	Conor Dooley <conor.dooley@microchip.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH v5 11/12] RISC-V: add helpers for handling immediates in U-type and I-type pairs
Date: Fri, 23 Dec 2022 23:13:31 +0100	[thread overview]
Message-ID: <20221223221332.4127602-12-heiko@sntech.de> (raw)
In-Reply-To: <20221223221332.4127602-1-heiko@sntech.de>

From: Heiko Stuebner <heiko.stuebner@vrull.eu>

Used together U-type and I-type instructions can for example be used to
generate bigger jumps (i.e. in auipc+jalr pairs) by splitting the value
into an upper immediate (i.e. auipc) and a 12bit immediate (i.e. jalr).

Due to both immediates being considered signed this creates some corner
cases, so add some helper to prevent this from getting duplicated in
different places.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
---
 arch/riscv/include/asm/insn.h | 48 +++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h
index 2a23890b4577..98453535324a 100644
--- a/arch/riscv/include/asm/insn.h
+++ b/arch/riscv/include/asm/insn.h
@@ -290,3 +290,51 @@ static __always_inline bool riscv_insn_is_branch(u32 code)
 	(RVC_X(x_, RVC_B_IMM_5_OPOFF, RVC_B_IMM_5_MASK) << RVC_B_IMM_5_OFF) | \
 	(RVC_X(x_, RVC_B_IMM_7_6_OPOFF, RVC_B_IMM_7_6_MASK) << RVC_B_IMM_7_6_OFF) | \
 	(RVC_IMM_SIGN(x_) << RVC_B_IMM_SIGN_OFF); })
+
+/*
+ * Put together one immediate from a U-type and I-type instruction pair.
+ *
+ * The U-type contains an upper immediate, meaning bits[31:12] with [11:0]
+ * being zero, while the I-type contains a 12bit immediate.
+ * Combined these can encode larger 32bit values and are used for example
+ * in auipc + jalr pairs to allow larger jumps.
+ *
+ * @utype_insn: instruction containing the upper immediate
+ * @itype_insn: instruction
+ * Return: combined immediate
+ */
+static inline s32 riscv_insn_extract_utype_itype_imm(u32 utype_insn, u32 itype_insn)
+{
+	s32 imm;
+
+	imm = RV_EXTRACT_UTYPE_IMM(utype_insn);
+	imm += RV_EXTRACT_ITYPE_IMM(itype_insn);
+
+	return imm;
+}
+
+/*
+ * Update a set of two instructions (U-type + I-type) with an immediate value.
+ *
+ * Used for example in auipc+jalrs pairs the U-type instructions contains
+ * a 20bit upper immediate representing bits[31:12], while the I-type
+ * instruction contains a 12bit immediate representing bits[11:0].
+ *
+ * This also takes into account that both separate immediates are
+ * considered as signed values, so if the I-type immediate becomes
+ * negative (BIT(11) set) the U-type part gets adjusted.
+ *
+ * @utype_insn: pointer to the utype instruction of the pair
+ * @itype_insn: pointer to the itype instruction of the pair
+ * @imm: the immediate to insert into the two instructions
+ */
+static inline void riscv_insn_insert_utype_itype_imm(u32 *utype_insn, u32 *itype_insn, s32 imm)
+{
+	/* drop possible old IMM values */
+	*utype_insn &= ~(RV_U_IMM_31_12_MASK);
+	*itype_insn &= ~(RV_I_IMM_11_0_MASK << RV_I_IMM_11_0_OPOFF);
+
+	/* add the adapted IMMs */
+	*utype_insn |= (imm & RV_U_IMM_31_12_MASK) + ((imm & BIT(11)) << 1);
+	*itype_insn |= ((imm & RV_I_IMM_11_0_MASK) << RV_I_IMM_11_0_OPOFF);
+}
-- 
2.35.1


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  parent reply	other threads:[~2022-12-23 22:17 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-23 22:13 [PATCH v5 00/12] Allow calls in alternatives Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 01/12] RISC-V: fix funct4 definition for c.jalr in parse_asm.h Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 02/12] RISC-V: add prefix to all constants/macros " Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 03/12] RISC-V: detach funct-values from their offset Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 04/12] RISC-V: add ebreak instructions to definitions Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 05/12] RISC-V: add auipc elements to parse_asm header Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 06/12] RISC-V: Move riscv_insn_is_* macros into a common header Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 07/12] RISC-V: rename parse_asm.h to insn.h Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 08/12] RISC-V: kprobes: use central defined funct3 constants Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 09/12] RISC-V: add U-type imm parsing to insn.h header Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 10/12] RISC-V: add rd reg " Heiko Stuebner
2022-12-23 22:13 ` Heiko Stuebner [this message]
2022-12-23 22:13 ` [PATCH v5 12/12] RISC-V: fix auipc-jalr addresses in patched alternatives Heiko Stuebner
2022-12-29 15:00 ` [PATCH v5 00/12] Allow calls in alternatives Palmer Dabbelt
2022-12-29 20:10 ` patchwork-bot+linux-riscv

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