From: Heiko Stuebner <heiko@sntech.de>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com
Cc: christoph.muellner@vrull.eu, prabhakar.csengg@gmail.com,
conor@kernel.org, philipp.tomsich@vrull.eu,
ajones@ventanamicro.com, heiko@sntech.de,
emil.renner.berthing@canonical.com, jszhang@kernel.org,
Heiko Stuebner <heiko.stuebner@vrull.eu>,
Conor Dooley <conor.dooley@microchip.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH v5 05/12] RISC-V: add auipc elements to parse_asm header
Date: Fri, 23 Dec 2022 23:13:25 +0100 [thread overview]
Message-ID: <20221223221332.4127602-6-heiko@sntech.de> (raw)
In-Reply-To: <20221223221332.4127602-1-heiko@sntech.de>
From: Heiko Stuebner <heiko.stuebner@vrull.eu>
Instruction parsing should not be done in individual code, but instead
supported by central
Right now kgdb and kprobes parse instructions and at least kprobes (and
the upcoming auipc+jalr alternative fixer-function) need the auipc
instruction.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
---
arch/riscv/include/asm/parse_asm.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/riscv/include/asm/parse_asm.h b/arch/riscv/include/asm/parse_asm.h
index e8303250f598..28742eb19034 100644
--- a/arch/riscv/include/asm/parse_asm.h
+++ b/arch/riscv/include/asm/parse_asm.h
@@ -118,6 +118,7 @@
#define RVC_C2_RD_OPOFF 7
/* parts of opcode for RVG*/
+#define RVG_OPCODE_AUIPC 0x17
#define RVG_OPCODE_BRANCH 0x63
#define RVG_OPCODE_JALR 0x67
#define RVG_OPCODE_JAL 0x6f
@@ -149,6 +150,7 @@
#define RVG_FUNCT12_EBREAK 0x1
#define RVG_FUNCT12_SRET 0x102
+#define RVG_MATCH_AUIPC (RVG_OPCODE_AUIPC)
#define RVG_MATCH_JALR (RV_ENCODE_FUNCT3(JALR) | RVG_OPCODE_JALR)
#define RVG_MATCH_JAL (RVG_OPCODE_JAL)
#define RVG_MATCH_BEQ (RV_ENCODE_FUNCT3(BEQ) | RVG_OPCODE_BRANCH)
@@ -167,6 +169,7 @@
#define RVC_MATCH_C_JALR (RVC_ENCODE_FUNCT4(C_JALR) | RVC_OPCODE_C2)
#define RVC_MATCH_C_EBREAK (RVC_ENCODE_FUNCT4(C_EBREAK) | RVC_OPCODE_C2)
+#define RVG_MASK_AUIPC (RV_INSN_OPCODE_MASK)
#define RVG_MASK_JALR (RV_INSN_FUNCT3_MASK | RV_INSN_OPCODE_MASK)
#define RVG_MASK_JAL (RV_INSN_OPCODE_MASK)
#define RVC_MASK_C_JALR (RVC_INSN_FUNCT4_MASK | RVC_INSN_J_RS2_MASK | RVC_INSN_OPCODE_MASK)
--
2.35.1
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next prev parent reply other threads:[~2022-12-24 7:29 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-23 22:13 [PATCH v5 00/12] Allow calls in alternatives Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 01/12] RISC-V: fix funct4 definition for c.jalr in parse_asm.h Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 02/12] RISC-V: add prefix to all constants/macros " Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 03/12] RISC-V: detach funct-values from their offset Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 04/12] RISC-V: add ebreak instructions to definitions Heiko Stuebner
2022-12-23 22:13 ` Heiko Stuebner [this message]
2022-12-23 22:13 ` [PATCH v5 06/12] RISC-V: Move riscv_insn_is_* macros into a common header Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 07/12] RISC-V: rename parse_asm.h to insn.h Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 08/12] RISC-V: kprobes: use central defined funct3 constants Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 09/12] RISC-V: add U-type imm parsing to insn.h header Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 10/12] RISC-V: add rd reg " Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 11/12] RISC-V: add helpers for handling immediates in U-type and I-type pairs Heiko Stuebner
2022-12-23 22:13 ` [PATCH v5 12/12] RISC-V: fix auipc-jalr addresses in patched alternatives Heiko Stuebner
2022-12-29 15:00 ` [PATCH v5 00/12] Allow calls in alternatives Palmer Dabbelt
2022-12-29 20:10 ` patchwork-bot+linux-riscv
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