From: jhugo@codeaurora.org (Jeffrey Hugo) To: linux-riscv@lists.infradead.org Subject: [RFC 0/3] Unify CPU topology across ARM64 & RISC-V Date: Tue, 20 Nov 2018 08:28:18 -0700 [thread overview] Message-ID: <35b92f83-dbbf-fad2-561f-49b0933ffe19@codeaurora.org> (raw) In-Reply-To: <20181120111146.GA6497@e107155-lin> On 11/20/2018 4:11 AM, Sudeep Holla wrote: > On Thu, Nov 15, 2018 at 11:31:33AM -0700, Jeffrey Hugo wrote: > > [...] > >> >> I was interested in testing these on QDF2400, an ARM64 platform, since this >> series touches core ARM64 code and I'd hate to see a regression. However, I >> can't figure out what baseline to use to apply these. Different patches >> cause different conflicts of a variety of baselines I attempted. >> > > Good to know that we can test DT configuration on QDF2400. I always assumed > it's ACPI only. It is ACPI only in the production configuration. I suppose we could hack things up to do basic DT sanity, but I expect it would be nasty and non-trivial. > >> What are these intended to apply to? >> > > The series alone may not get the package/socket ids correct on QDF2400. > I have not yet added support for the same as I wanted to get the initial > feedback on DT bindings. The movement of DT binding and corresponding > code should not regress and you should be able to validate only that > part. > On a cursory glance, it looks like some of the reorganized code would also be used in the ACPI path (things that are common between DT and ACPI). I do not expect problems, but I still feel its prudent to do a sanity check on actual hardware. -- Jeffrey Hugo Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
WARNING: multiple messages have this Message-ID (diff)
From: Jeffrey Hugo <jhugo@codeaurora.org> To: Sudeep Holla <sudeep.holla@arm.com> Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Damien.LeMoal@wdc.com, juri.lelli@arm.com, anup@brainfault.org, palmer@sifive.com, linux-kernel@vger.kernel.org, jeremy.linton@arm.com, Atish Patra <atish.patra@wdc.com>, robh+dt@kernel.org, mick@ics.forth.gr, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [RFC 0/3] Unify CPU topology across ARM64 & RISC-V Date: Tue, 20 Nov 2018 08:28:18 -0700 [thread overview] Message-ID: <35b92f83-dbbf-fad2-561f-49b0933ffe19@codeaurora.org> (raw) Message-ID: <20181120152818.zd4Vz2mNt4nHbe95XyH0xaQo9zC7AKqGv9jeonbY3Ko@z> (raw) In-Reply-To: <20181120111146.GA6497@e107155-lin> On 11/20/2018 4:11 AM, Sudeep Holla wrote: > On Thu, Nov 15, 2018 at 11:31:33AM -0700, Jeffrey Hugo wrote: > > [...] > >> >> I was interested in testing these on QDF2400, an ARM64 platform, since this >> series touches core ARM64 code and I'd hate to see a regression. However, I >> can't figure out what baseline to use to apply these. Different patches >> cause different conflicts of a variety of baselines I attempted. >> > > Good to know that we can test DT configuration on QDF2400. I always assumed > it's ACPI only. It is ACPI only in the production configuration. I suppose we could hack things up to do basic DT sanity, but I expect it would be nasty and non-trivial. > >> What are these intended to apply to? >> > > The series alone may not get the package/socket ids correct on QDF2400. > I have not yet added support for the same as I wanted to get the initial > feedback on DT bindings. The movement of DT binding and corresponding > code should not regress and you should be able to validate only that > part. > On a cursory glance, it looks like some of the reorganized code would also be used in the ACPI path (things that are common between DT and ACPI). I do not expect problems, but I still feel its prudent to do a sanity check on actual hardware. -- Jeffrey Hugo Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2018-11-20 15:28 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-11-09 1:50 [RFC 0/3] Unify CPU topology across ARM64 & RISC-V Atish Patra 2018-11-09 1:50 ` Atish Patra 2018-11-09 1:50 ` [RFC 1/3] dt-binding: cpu-topology: Move cpu-map to a common binding Atish Patra 2018-11-09 1:50 ` Atish Patra 2018-11-17 16:32 ` Rob Herring 2018-11-17 16:32 ` Rob Herring 2018-11-19 17:57 ` Atish Patra 2018-11-19 17:57 ` Atish Patra 2018-11-09 1:50 ` [RFC 2/3] cpu-topology: Move cpu topology code to common code Atish Patra 2018-11-09 1:50 ` Atish Patra 2018-11-09 1:50 ` [RFC 3/3] RISC-V: Parse cpu topology during boot Atish Patra 2018-11-09 1:50 ` Atish Patra 2018-11-15 18:31 ` [RFC 0/3] Unify CPU topology across ARM64 & RISC-V Jeffrey Hugo 2018-11-15 18:31 ` Jeffrey Hugo 2018-11-19 17:46 ` Atish Patra 2018-11-19 17:46 ` Atish Patra 2018-11-20 11:11 ` Sudeep Holla 2018-11-20 11:11 ` Sudeep Holla 2018-11-20 15:28 ` Jeffrey Hugo [this message] 2018-11-20 15:28 ` Jeffrey Hugo
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