From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Biju Das <biju.das.jz@bp.renesas.com>,
"Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
linux-riscv <linux-riscv@lists.infradead.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding documentation for Renesas RZ/Five SoC and SMARC EVK
Date: Wed, 27 Jul 2022 15:00:40 +0200 [thread overview]
Message-ID: <75e5ace3-3255-2302-65f5-9fbef9cb1147@linaro.org> (raw)
In-Reply-To: <OS0PR01MB5922FDF8CFFE44A611D3783886979@OS0PR01MB5922.jpnprd01.prod.outlook.com>
On 27/07/2022 14:56, Biju Das wrote:
>>
>> Then it is not the same SoC! Same means same, identical. CPU
>> architecture is one of the major differences, which means it is not the
>> same.
>
> Family SoC(R9A07G043) is at top level. Then it has different SoCId for taking care of
> differences for SoC based on ARMV8 and RISC-V which has separate compatible like
> r9a07g043u11 and r9a07g043f01?
This does not answer the concern - it's not the same SoC. The most
generic compatible denotes the most common part. I would argue that
instruction set and architecture are the most important differences.
None of ARMv8 SoCs (SoCs, not CPU cores) have "arm,armv8" compatible and
you went even more - you combined two architectures in the most generic
compatibles.
>
>>
>>> Using same SoM and Carrier board?
>>
>> It's like saying PC with x86 and ARMv8 board are the same because they
>> both use same "PC chassis".
>
> What I meant is board based on Family SoC(R9A07G043) that is either based on ARMv8 or
> RISC-V cpu architecture.
I don't see this related to the topic at all. What board do you use,
does not matter. The board does not change the fact these SoCs have
entirely different architecture - ARMv8 and RISC-V.
Best regards,
Krzysztof
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next prev parent reply other threads:[~2022-07-27 13:01 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-26 18:06 [PATCH 0/6] Add support for Renesas RZ/Five SoC Lad Prabhakar
2022-07-26 18:06 ` [PATCH 1/6] dt-bindings: arm: renesas: Ignore the schema for RISC-V arch Lad Prabhakar
2022-07-27 8:50 ` Krzysztof Kozlowski
2022-07-27 8:55 ` Lad, Prabhakar
2022-07-27 8:53 ` Krzysztof Kozlowski
2022-07-27 9:00 ` Lad, Prabhakar
2022-07-27 9:31 ` Krzysztof Kozlowski
2022-07-27 9:48 ` Lad, Prabhakar
2022-08-11 15:26 ` Geert Uytterhoeven
2022-08-11 23:37 ` Lad, Prabhakar
2022-07-27 15:43 ` Rob Herring
2022-07-26 18:06 ` [PATCH 2/6] dt-bindings: riscv: Sort the CPU core list alphabetically Lad Prabhakar
2022-07-27 8:51 ` Krzysztof Kozlowski
2022-07-26 18:06 ` [PATCH 3/6] dt-bindings: riscv: Add Andes AX45MP core to the list Lad Prabhakar
2022-07-27 8:51 ` Krzysztof Kozlowski
2022-07-26 18:06 ` [PATCH 4/6] dt-bindings: riscv: Add DT binding documentation for Renesas RZ/Five SoC and SMARC EVK Lad Prabhakar
2022-07-27 8:54 ` Krzysztof Kozlowski
2022-07-27 9:05 ` Lad, Prabhakar
2022-07-27 9:27 ` Biju Das
2022-07-27 9:35 ` Lad, Prabhakar
2022-07-27 9:54 ` Krzysztof Kozlowski
2022-07-27 10:06 ` Lad, Prabhakar
2022-07-27 10:09 ` Krzysztof Kozlowski
2022-07-27 11:37 ` Lad, Prabhakar
2022-07-27 11:44 ` Krzysztof Kozlowski
2022-07-27 12:21 ` Biju Das
2022-07-27 12:36 ` Krzysztof Kozlowski
2022-07-27 12:56 ` Biju Das
2022-07-27 13:00 ` Krzysztof Kozlowski [this message]
2022-07-27 13:29 ` Conor.Dooley
2022-07-27 15:32 ` Lad, Prabhakar
2022-08-11 15:42 ` Geert Uytterhoeven
2022-08-12 6:23 ` Krzysztof Kozlowski
2022-08-12 9:49 ` Lad, Prabhakar
2022-08-12 15:10 ` Palmer Dabbelt
2022-07-26 18:06 ` [PATCH 5/6] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option Lad Prabhakar
2022-07-26 18:49 ` Conor.Dooley
2022-07-27 8:19 ` Lad, Prabhakar
2022-07-26 18:06 ` [PATCH 6/6] riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC Lad Prabhakar
2022-07-26 18:25 ` Conor.Dooley
2022-07-26 18:53 ` Conor.Dooley
2022-07-27 8:09 ` Lad, Prabhakar
2022-07-27 8:21 ` Conor.Dooley
2022-07-27 8:30 ` Lad, Prabhakar
2022-07-27 8:55 ` Krzysztof Kozlowski
2022-07-27 9:08 ` Lad, Prabhakar
2022-07-26 18:51 ` [PATCH 0/6] Add support " Conor.Dooley
2022-07-27 8:00 ` Lad, Prabhakar
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