Re: [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO

[Damien Le Moal <damien.lemoal@opensource.wdc.com>]

On 9/24/22 03:55, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> Following on from LPC, here's the start of my efforts to clean up
> Kconfig.socs.
> 
> My preference would be to take the whole thing through the RISC-V tree
> for v6.2 to make things a bit less fiddly, but I am sending this as an
> RFC in the hopes of getting some opinions on how the series should be
> split up & merged. I guess it would always be possible to create a few
> immutable branches for the individual subsystems that are being modified
> & take the series through the riscv tree unless we hit a conflict in
> -next. Obiviously for that route, maintainer acks will be needed.
> 
> The only SoCs I have, at the moment ;), are the jh7100, mpfs, fu540 and
> the k210 so I've given those a whirl to make sure I didn't break
> something.
> 
> I have also yet to deal with ARCH_VIRT, but just throwing this out for
> some opinions on how to apply/split up the set before finalising a v1.
> 
> I've CCed a few people that may have an opinion here, but anyone that
> has an opinion here - please shout!
> 
> One other point, is it worth adding something to the patch acceptance
> policy to say "do your kconfig xyz way" or is that not something that's
> worth doing since it is easy to push people in the right direction
> during review?
> 
> The series is currently on top of:
> https://lore.kernel.org/all/20220908142914.359777-1-cristian.ciocaltea@collabora.com/

It is not very nice to change the config option names as that can break
user build environments, e.g. buildroot setups that have tweaked kernel
configs.

What's wrong with the SOC_XXX names ? Changing these to ARCH_XXX is
weird since the ARCH prefix is generally used for ISA differentiation
rather than boards/SoCs.

> 
> Thanks,
> Conor.
> 
> Conor Dooley (27):
>   clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
>   i2c: microchip-corei2c: replace SOC_MICROCHIP_POLARFIRE with
>     ARCH_MICROCHIP
>   mailbox: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
>   usb: musb: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
>   rtc: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
>   riscv: stop selecting the PolarFire SoC clock driver
>   riscv: replace SOC_STARFIVE with ARCH_STARFIVE
>   clk: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
>   pinctrl: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
>   reset: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
>   riscv: replace SOC_SIFIVE with ARCH_SIFIVE
>   soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
>   clk: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
>   clk: sifive: select by default if ARCH_SIFIVE
>   serial: sifive: select by default if ARCH_SIFIVE
>   PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE
>   riscv: stop selecting SiFive clock and serial drivers directly
>   riscv: convert SOC_VIRT to ARCH_VIRT
>   kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config
>   wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv
>   riscv: convert SOC_CANAAN to ARCH_CANAAN
>   clk: k210: convert SOC_CANAAN to ARCH_CANAAN
>   pinctrl: k210: convert SOC_CANAAN to ARCH_CANAAN
>   soc: k210: convert SOC_CANAAN to ARCH_CANAAN
>   reset: k210: convert SOC_CANAAN to ARCH_CANAAN
>   serial: sifive: select by default if ARCH_CANAAN
>   riscv: stop directly selecting drivers for ARCH_CANAAN
> 
>  arch/riscv/Kconfig.socs                       | 30 +++++++------------
>  arch/riscv/Makefile                           |  2 +-
>  arch/riscv/boot/dts/Makefile                  |  2 +-
>  arch/riscv/boot/dts/canaan/Makefile           | 14 ++++-----
>  arch/riscv/boot/dts/sifive/Makefile           |  2 +-
>  arch/riscv/boot/dts/starfive/Makefile         |  2 +-
>  arch/riscv/configs/defconfig                  |  6 ++--
>  arch/riscv/configs/nommu_k210_defconfig       |  2 +-
>  .../riscv/configs/nommu_k210_sdcard_defconfig |  2 +-
>  arch/riscv/configs/nommu_virt_defconfig       |  2 +-
>  arch/riscv/configs/rv32_defconfig             |  4 +--
>  drivers/clk/Kconfig                           |  4 +--
>  drivers/clk/Makefile                          |  2 +-
>  drivers/clk/microchip/Kconfig                 |  3 +-
>  drivers/clk/sifive/Kconfig                    |  4 ++-
>  drivers/clk/starfive/Kconfig                  |  6 ++--
>  drivers/i2c/busses/Kconfig                    |  2 +-
>  drivers/mailbox/Kconfig                       |  2 +-
>  drivers/pci/controller/dwc/Kconfig            |  2 +-
>  drivers/pinctrl/Kconfig                       |  8 ++---
>  drivers/reset/Kconfig                         |  8 ++---
>  drivers/rtc/Kconfig                           |  2 +-
>  drivers/soc/Makefile                          |  4 +--
>  drivers/soc/canaan/Kconfig                    |  4 +--
>  drivers/soc/sifive/Kconfig                    |  2 +-
>  drivers/tty/serial/Kconfig                    |  2 ++
>  drivers/usb/musb/Kconfig                      |  2 +-
>  tools/testing/kunit/qemu_configs/riscv.py     |  2 +-
>  .../wireguard/qemu/arch/riscv32.config        |  2 +-
>  .../wireguard/qemu/arch/riscv64.config        |  2 +-
>  30 files changed, 64 insertions(+), 67 deletions(-)
> 

-- 
Damien Le Moal
Western Digital Research


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