From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: "Heiko Stübner" <heiko@sntech.de>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
christoph.muellner@vrull.eu, conor@kernel.org,
philipp.tomsich@vrull.eu, ajones@ventanamicro.com,
emil.renner.berthing@canonical.com
Subject: Re: [PATCH 5/7] RISC-V: fix auipc-jalr addresses in patched alternatives
Date: Mon, 21 Nov 2022 23:59:43 +0000 [thread overview]
Message-ID: <CA+V-a8sq8=mG5VZ3QTRUT=cx-p4L+yNVTskeuNaRxhF-4NJx9A@mail.gmail.com> (raw)
In-Reply-To: <14108757.uLZWGnKmhe@diego>
Hi Heiko,
On Mon, Nov 21, 2022 at 10:17 PM Heiko Stübner <heiko@sntech.de> wrote:
>
> Am Montag, 21. November 2022, 22:31:36 CET schrieb Lad, Prabhakar:
> > Hi Heiko,
> >
> > On Mon, Nov 21, 2022 at 3:06 PM Lad, Prabhakar
> > <prabhakar.csengg@gmail.com> wrote:
> > >
<snip>
> > Some more information,
> >
> > - If I drop the riscv_alternative_fix_auipc_jalr() call after
> > patch_text_nosync() and then print the alt->old_ptr instructions
> > before patching I can see the instructions as 0x13 (nop) which is
> > correct.
> >
> > - if I call riscv_alternative_fix_auipc_jalr() call after
> > patch_text_nosync() and then print the alt->old_ptr instructions
> > before patching I dont see 0x13 (nop) consistently for old
> > instructions.
>
> which is to be expected I guess.
>
> alt->old_ptr points to the memory location where the live kernel code
> lives.
>
Agreed.
> I.e. the code at this location is the thing the kernel actually runs.
> The code at this location then gets overwritten by the alternative
> assembly.
>
But shouldn't the actual code be nops before patching?
>
> > - If I replace the nop's in the old instructions with my assembly code
> > of rz/five cmo and then just use patch_text_nosync() I can see the
> > correct actual instruction being printed apart from jalr (is some sort
> > of offset added to it as I see last 4 bits match?) and then is
> > replaced correctly by the same alt instructions apart from the jalr
> > (log [0]).
> >
> > - If I replace the nop's in the old instructions with my assembly code
> > of rz/five cmo and then use patch_text_nosync() and
> > riscv_alternative_fix_auipc_jalr() I can see the actual old
> > instructions differs a bit and again the jalr instruction differs too
> > in the patched code (log [1]).
> >
> > [0] https://paste.debian.net/1261412/
> > [1] https://paste.debian.net/1261413/
> >
> > Attached is the objump of dma-noncoherent.o for reference.
>
> I did read that objdumps are not really conclusive when looking
> at auipc + jalr instructions, hence the printing of the actual instructions.
>
> As either manually or with a helper like
>
> https://luplab.gitlab.io/rvcodecjs/#q=0xf4c080e7
>
> you can then decode the actual instruction and compare.
>
OK, I will give it a try.
> In your log the two jalr instructions decode to different offsets,
> jalr x1, x1, -180
> vs
> jalr x1, x1, -834
>
> Can you check what the patch_offset value is in your case?
>
I'll check that and let you know.
> Interestingly the
> auipc x1, 0
> is 0 for both cases.
>
> I'll try to build a real test-setup mimicing what you're doing
> tomorrow (european tomorrow).
>
Thank you!
Cheers,
Prabhakar
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next prev parent reply other threads:[~2022-11-22 0:00 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-10 16:49 [PATCH 0/7] Zbb string optimizations and call support in alternatives Heiko Stuebner
2022-11-10 16:49 ` [PATCH 1/7] efi/riscv: libstub: mark when compiling libstub Heiko Stuebner
2022-11-13 17:16 ` Conor Dooley
2022-11-13 17:20 ` Heiko Stübner
2022-11-13 18:06 ` Conor Dooley
2022-11-10 16:49 ` [PATCH 2/7] RISC-V: add auipc elements to parse_asm header Heiko Stuebner
2022-11-13 17:18 ` Conor Dooley
2022-11-10 16:49 ` [PATCH 3/7] RISC-V: add U-type imm parsing " Heiko Stuebner
2022-11-13 19:06 ` Conor Dooley
2022-11-10 16:49 ` [PATCH 4/7] RISC-V: add rd reg " Heiko Stuebner
2022-11-13 19:08 ` Conor Dooley
2022-11-10 16:49 ` [PATCH 5/7] RISC-V: fix auipc-jalr addresses in patched alternatives Heiko Stuebner
2022-11-13 20:31 ` Conor Dooley
2022-11-14 10:57 ` Emil Renner Berthing
2022-11-14 11:35 ` Andrew Jones
2022-11-14 11:38 ` Emil Renner Berthing
2022-11-14 11:38 ` Heiko Stübner
2022-11-14 12:15 ` Andrew Jones
2022-11-14 12:29 ` Emil Renner Berthing
2022-11-14 12:47 ` Philipp Tomsich
2022-11-15 14:28 ` Lad, Prabhakar
2022-11-17 11:51 ` Heiko Stübner
2022-11-21 9:50 ` Lad, Prabhakar
2022-11-21 11:27 ` Heiko Stübner
2022-11-21 15:06 ` Lad, Prabhakar
2022-11-21 21:31 ` Lad, Prabhakar
2022-11-21 22:17 ` Heiko Stübner
2022-11-21 22:38 ` Heiko Stübner
2022-11-22 0:16 ` Lad, Prabhakar
2022-11-21 23:59 ` Lad, Prabhakar [this message]
2022-11-22 10:59 ` Lad, Prabhakar
2022-11-22 11:19 ` Heiko Stübner
2022-11-22 11:37 ` Heiko Stübner
2022-11-22 12:28 ` Lad, Prabhakar
2022-11-10 16:49 ` [PATCH 6/7] RISC-V: add infrastructure to allow different str* implementations Heiko Stuebner
2022-11-13 22:07 ` Conor Dooley
2022-11-10 16:49 ` [PATCH 7/7] RISC-V: add zbb support to string functions Heiko Stuebner
2022-11-13 23:29 ` Conor Dooley
2022-11-13 23:47 ` Heiko Stübner
2022-11-24 22:23 ` Heiko Stübner
2022-11-24 22:32 ` Conor Dooley
2022-11-24 23:51 ` Heiko Stuebner
2022-11-25 7:49 ` Andrew Jones
2022-11-25 8:17 ` Conor.Dooley
[not found] ` <CAEg0e7h9skbWPVDsz9CdB8dATN5XM9eT-uPY0A7xRZmX=qTU6A@mail.gmail.com>
2022-11-25 15:28 ` Andrew Jones
2022-11-25 16:35 ` Christoph Müllner
2022-11-25 16:39 ` Conor Dooley
2022-11-25 17:02 ` Christoph Müllner
2022-11-25 17:11 ` Conor Dooley
2022-11-25 17:42 ` Christoph Müllner
2022-11-25 16:36 ` Conor Dooley
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