From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: "Heiko Stübner" <heiko@sntech.de>,
linux-riscv@lists.infradead.org, palmer@dabbelt.com,
christoph.muellner@vrull.eu, prabhakar.csengg@gmail.com,
conor@kernel.org, philipp.tomsich@vrull.eu
Subject: Re: [PATCH 5/7] RISC-V: fix auipc-jalr addresses in patched alternatives
Date: Mon, 14 Nov 2022 13:29:04 +0100 [thread overview]
Message-ID: <CAJM55Z85MdF5sKSXnzXuj5kk_RDZeRa4e1+J8c5oCXK7cat8KA@mail.gmail.com> (raw)
In-Reply-To: <20221114121506.odv2vgc4whjrfwf4@kamzik>
On Mon, 14 Nov 2022 at 13:15, Andrew Jones <ajones@ventanamicro.com> wrote:
>
> On Mon, Nov 14, 2022 at 12:38:39PM +0100, Heiko Stübner wrote:
> > Am Montag, 14. November 2022, 12:35:53 CET schrieb Andrew Jones:
> > > On Mon, Nov 14, 2022 at 11:57:29AM +0100, Emil Renner Berthing wrote:
> > > > On Thu, 10 Nov 2022 at 17:50, Heiko Stuebner <heiko@sntech.de> wrote:
> > > ...
> > > > > @@ -316,8 +384,15 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin,
> > > > > }
> > > > >
> > > > > tmp = (1U << alt->errata_id);
> > > > > - if (cpu_req_feature & tmp)
> > > > > - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len);
> > > > > + if (cpu_req_feature & tmp) {
> > > > > + /* do the basic patching */
> > > > > + patch_text_nosync(alt->old_ptr, alt->alt_ptr,
> > > > > + alt->alt_len);
> > > > > +
> > > > > + riscv_alternative_fix_auipc_jalr(alt->old_ptr,
> > > > > + alt->alt_len,
> > > > > + alt->old_ptr - alt->alt_ptr);
> > > >
> > > > Here you're casting a void pointer to an instruction to an unsigned
> > > > int pointer, but since we enable compressed instructions this may
> > > > result in an unaligned pointer. Using this pointer will work, but may
> > > > be slow. Eg. fault to m-mode to be patched up. We already do that in
> > > > other places in the arch/riscv, but I'd prefer not to add new
> > > > instances of this.
> > >
> > > Alternative instruction sequences (old and new) have compression disabled.
> >
> > That was my first thought as well, but I think Emil was talking more about the
> > placement of the alternative block inside the running kernel.
> >
> > i.e. I guess the starting point of an alternative sequence could also be unaligned.
>
> Oh, I see.
>
> >
> > Though I don't _yet_ see how an improvement could look like.
>
> I think we can patch the alternative macros to add alignment. Something
> like
>
> diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
> index ec2f3f1b836f..3c330a9066f7 100644
> --- a/arch/riscv/include/asm/alternative-macros.h
> +++ b/arch/riscv/include/asm/alternative-macros.h
> @@ -20,6 +20,7 @@
> ALT_ENTRY 886b, 888f, \vendor_id, \errata_id, 889f - 888f
> .popsection
> .subsection 1
> + .balign 4
> 888 :
> .option push
> .option norvc
> @@ -34,6 +35,7 @@
> .endm
>
> .macro __ALTERNATIVE_CFG old_c, new_c, vendor_id, errata_id, enable
> + .balign 4
> 886 :
> .option push
> .option norvc
> @@ -49,6 +51,7 @@
>
> .macro __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
> new_c_2, vendor_id_2, errata_id_2, enable_2
> + .balign 4
> 886 :
> .option push
> .option norvc
> @@ -87,6 +90,7 @@
> ALT_ENTRY("886b", "888f", __stringify(vendor_id), __stringify(errata_id), "889f - 888f") \
> ".popsection\n" \
> ".subsection 1\n" \
> + ".balign 4\n" \
> "888 :\n" \
> ".option push\n" \
> ".option norvc\n" \
> @@ -100,6 +104,7 @@
> ".endif\n"
>
> #define __ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, enable) \
> + ".balign 4\n" \
> "886 :\n" \
> ".option push\n" \
> ".option norvc\n" \
> @@ -116,6 +121,7 @@
> enable_1, \
> new_c_2, vendor_id_2, errata_id_2, \
> enable_2) \
> + ".balign 4\n" \
> "886 :\n" \
> ".option push\n" \
> ".option norvc\n" \
Why not just use accessors? Eg.
unsigned int riscv_instruction_at(void *p)
{
u16 *parcel = p;
return (unsigned int)parcel[0] | (unsigned int)parcel[1] << 16;
}
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next prev parent reply other threads:[~2022-11-14 12:29 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-10 16:49 [PATCH 0/7] Zbb string optimizations and call support in alternatives Heiko Stuebner
2022-11-10 16:49 ` [PATCH 1/7] efi/riscv: libstub: mark when compiling libstub Heiko Stuebner
2022-11-13 17:16 ` Conor Dooley
2022-11-13 17:20 ` Heiko Stübner
2022-11-13 18:06 ` Conor Dooley
2022-11-10 16:49 ` [PATCH 2/7] RISC-V: add auipc elements to parse_asm header Heiko Stuebner
2022-11-13 17:18 ` Conor Dooley
2022-11-10 16:49 ` [PATCH 3/7] RISC-V: add U-type imm parsing " Heiko Stuebner
2022-11-13 19:06 ` Conor Dooley
2022-11-10 16:49 ` [PATCH 4/7] RISC-V: add rd reg " Heiko Stuebner
2022-11-13 19:08 ` Conor Dooley
2022-11-10 16:49 ` [PATCH 5/7] RISC-V: fix auipc-jalr addresses in patched alternatives Heiko Stuebner
2022-11-13 20:31 ` Conor Dooley
2022-11-14 10:57 ` Emil Renner Berthing
2022-11-14 11:35 ` Andrew Jones
2022-11-14 11:38 ` Emil Renner Berthing
2022-11-14 11:38 ` Heiko Stübner
2022-11-14 12:15 ` Andrew Jones
2022-11-14 12:29 ` Emil Renner Berthing [this message]
2022-11-14 12:47 ` Philipp Tomsich
2022-11-15 14:28 ` Lad, Prabhakar
2022-11-17 11:51 ` Heiko Stübner
2022-11-21 9:50 ` Lad, Prabhakar
2022-11-21 11:27 ` Heiko Stübner
2022-11-21 15:06 ` Lad, Prabhakar
2022-11-21 21:31 ` Lad, Prabhakar
2022-11-21 22:17 ` Heiko Stübner
2022-11-21 22:38 ` Heiko Stübner
2022-11-22 0:16 ` Lad, Prabhakar
2022-11-21 23:59 ` Lad, Prabhakar
2022-11-22 10:59 ` Lad, Prabhakar
2022-11-22 11:19 ` Heiko Stübner
2022-11-22 11:37 ` Heiko Stübner
2022-11-22 12:28 ` Lad, Prabhakar
2022-11-10 16:49 ` [PATCH 6/7] RISC-V: add infrastructure to allow different str* implementations Heiko Stuebner
2022-11-13 22:07 ` Conor Dooley
2022-11-10 16:49 ` [PATCH 7/7] RISC-V: add zbb support to string functions Heiko Stuebner
2022-11-13 23:29 ` Conor Dooley
2022-11-13 23:47 ` Heiko Stübner
2022-11-24 22:23 ` Heiko Stübner
2022-11-24 22:32 ` Conor Dooley
2022-11-24 23:51 ` Heiko Stuebner
2022-11-25 7:49 ` Andrew Jones
2022-11-25 8:17 ` Conor.Dooley
[not found] ` <CAEg0e7h9skbWPVDsz9CdB8dATN5XM9eT-uPY0A7xRZmX=qTU6A@mail.gmail.com>
2022-11-25 15:28 ` Andrew Jones
2022-11-25 16:35 ` Christoph Müllner
2022-11-25 16:39 ` Conor Dooley
2022-11-25 17:02 ` Christoph Müllner
2022-11-25 17:11 ` Conor Dooley
2022-11-25 17:42 ` Christoph Müllner
2022-11-25 16:36 ` Conor Dooley
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