Re: 5.2-rc1 boot on Unleashed

From: Troy Benjegerdes <troy.benjegerdes@sifive.com>
To: Anup Patel <Anup.Patel@wdc.com>
Cc: "jamez@wit.com" <jamez@wit.com>,
	"palmer@sifive.com" <palmer@sifive.com>,
	Atish Patra <Atish.Patra@wdc.com>,
	"Auer, Lukas" <lukas.auer@aisec.fraunhofer.de>,
	"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"jcarr@wit.com" <jcarr@wit.com>,
	"bjorn.topel@gmail.com" <bjorn.topel@gmail.com>
Subject: Re: 5.2-rc1 boot on Unleashed
Date: Sat, 25 May 2019 11:23:40 -0500	[thread overview]
Message-ID: <E5768027-0690-449C-91E7-BD9CBC78B0B2@sifive.com> (raw)
In-Reply-To: <MN2PR04MB606103F231BC76C345446A858D030@MN2PR04MB6061.namprd04.prod.outlook.com>

> On May 24, 2019, at 10:49 PM, Anup Patel <Anup.Patel@wdc.com> wrote:
> 
> 
> 
>> -----Original Message-----
>> From: Auer, Lukas <lukas.auer@aisec.fraunhofer.de>
>> Sent: Saturday, May 25, 2019 3:05 AM
>> To: Atish Patra <Atish.Patra@wdc.com>; troy.benjegerdes@sifive.com
>> Cc: paul.walmsley@sifive.com; linux-riscv@lists.infradead.org;
>> jamez@wit.com; palmer@sifive.com; Anup Patel <Anup.Patel@wdc.com>;
>> bjorn.topel@gmail.com; jcarr@wit.com
>> Subject: Re: 5.2-rc1 boot on Unleashed
>> 
>> On Fri, 2019-05-24 at 13:48 -0500, Troy Benjegerdes wrote:
>>> Would a reasonable answer be two device trees, one for M-mode and
>> another for S-mode?
>>> 
>>> This would let us easily keep synced with the kernel version
>>> 
>> 
>> That makes sense, I wasn't aware of the DDR init data in the device tree. It's
>> great to see that you are working on adding support for the DDR controller to
>> U-Boot!
>> 
>> That would work, but probably takes more effort to maintain than is needed.
>> For situations like this, where the U-Boot device tree requires a few
>> additional entries compared with the kernel device tree, U-Boot provides a
>> useful function. It automatically includes [board-dts]-u- boot.dtsi in the
>> compiled device tree, where [board-dts].dts is specified in the defconfig. In
>> this case, we can directly use hifive- unleashed-a00-fu540.dts from the
>> kernel and add a hifive-unleashed-a00- fu540-u-boot.dtsi with the DDR
>> controller entries. Since they are only needed in machine mode, we can use
>> ifdefs to remove them in supervisor mode builds.
> 
> Based on our previous discussion on U-Boot mailing list, Lukas had suggest
> very nice boot-flow for U-Boot which is as follows:
> 
> ZSBL -> U-Boot SPL (M-Mode)->OpenSBI/BBL->U-Boot(S-Mode)->Linux.
> 
> The U-Boot SPL above will:
> 1. Run from internal SRAM
> 2. Will do DDR init
> 3. Ethernet PHY reset using GPIO

Right now I am able do all of the above (although without a proper GPIO driver) 

What I’d like to get working before submitting patches is loading BBL/OpenSBI and a payload
(either the kernel directly, or U-boot(S-Mode) via TFTP. I suspect some kind of issue with
the ring buffer being in SRAM and/or a clocking init problem, as this is what I get:

U-Boot 2019.07-rc2-00202-g814bfda9a6 (May 24 2019 - 10:24:26 -0500)

CPU:   rv64imac
DRAM:  dram_init() start
dram_init() end
8 GiB
MMC:   
In:    serial
Out:   serial
Err:   serial
Net:   eth0: ethernet@10090000
Hit any key to stop autoboot:  0 
ethernet@10090000: PHY present at 0
ethernet@10090000: Starting autonegotiation...
ethernet@10090000: Autonegotiation complete
ethernet@10090000: link up, 1000Mbps full-duplex (lpa: 0x7800)
BOOTP broadcast 1
ethernet@10090000: TX timeout

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