* UNIX-Class Platform Specification Working Group @ 2019-04-02 16:50 Palmer Dabbelt 2019-04-02 17:38 ` [isa-dev] " Luke Kenneth Casson Leighton ` (2 more replies) 0 siblings, 3 replies; 12+ messages in thread From: Palmer Dabbelt @ 2019-04-02 16:50 UTC (permalink / raw) To: sw-dev, hw-dev, isa-dev, linux-riscv; +Cc: Atish Patra Atish and I have approval from the RISC-V technical committee and board to start a group to manage the UNIX-class platform specification. This working group will start by defining a subset of this platform specification that both allows compatibility with existing implementations and extensibility for the future needs. The contents of this first platform specification will include: * A versioning scheme for future versions of the UNIX-class platform specification. * A specification for a platform-level interrupt controller that is compatible with existing implementations of SiFive's PLIC. * A specification for a standard SBI that is compatible with the current implementation in Linux as well being extensible for future needs. * An SBI extension for CPU power management. * A specification of the interface between a bootloader and supervisor-mode software. Since this working group mostly consists of standardizing existing implementations, I hope it can progress quickly. As such, I'd like to set a 6-month deadline between when the working group is started (ie, today) and when a specification enters the 45-day review period. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [isa-dev] UNIX-Class Platform Specification Working Group 2019-04-02 16:50 UNIX-Class Platform Specification Working Group Palmer Dabbelt @ 2019-04-02 17:38 ` Luke Kenneth Casson Leighton [not found] ` <CABwTF4UW8YePYr9Ad65VSvef4-Y42VEvNUs=hPWyWcyH295zCw@mail.gmail.com> [not found] ` <CANs6eMn4+6XGaSOGyWoD5RK2DjQo2SUUHphqmL_dwQD-Xu-omQ@mail.gmail.com> 2 siblings, 0 replies; 12+ messages in thread From: Luke Kenneth Casson Leighton @ 2019-04-02 17:38 UTC (permalink / raw) To: Palmer Dabbelt Cc: RISC-V ISA Dev, Rick O'Connor, Atish Patra, RISC-V SW Dev, RISC-V HW Dev, linux-riscv On Tue, Apr 2, 2019 at 5:50 PM Palmer Dabbelt <palmer@sifive.com> wrote: > > Atish and I have approval from the RISC-V technical committee and board to > start a group to manage the UNIX-class platform specification. This working > group will start by defining a subset of this platform specification that both > allows compatibility with existing implementations and extensibility for the > future needs. The contents of this first platform specification will include: > > * A versioning scheme for future versions of the UNIX-class platform > specification. > * A specification for a platform-level interrupt controller that is compatible > with existing implementations of SiFive's PLIC. > * A specification for a standard SBI that is compatible with the current > implementation in Linux as well being extensible for future needs. > * An SBI extension for CPU power management. > * A specification of the interface between a bootloader and supervisor-mode > software. > > Since this working group mostly consists of standardizing existing > implementations, I hope it can progress quickly. As such, I'd like to set a > 6-month deadline between when the working group is started (ie, today) and when > a specification enters the 45-day review period. this sounds great, palmer, it will help resolve some of the uncertainty surrounding the Unix platform, allowing implementors to commit to silicon with confidence. as you are no doubt aware, the commercial and mass-volume libre risc-v SoC is a hybrid CPU / VPU / GPU [1], where for example the TLB / Virtual Memory handling and other aspects *may* need to deviate from the standard UNIX-class platform specification, or suffer significant (commercially unacceptable) performance degradation, jeapordising its chances of commercial success if its hybrid requirements are not met by the UNIX-class platform. in addition, as it is not intended as a proprietary (secretive, closed doors) design, those (potential) modifications *will* end up as publicly-released common-place mass-volume and high profile modifications to the associated software and toolchains that will ultimately require (potentially forcibly - not by our team! - due to user demand) upstream long-term distribution and support. in addition to *that*, there are funding applications being considered and under review that *require* full disclosure and full transparency, as part of "Enhanced Privacy and Trust" for end-users [2]. secretive closed-doors discussions of innovations and potential enhancements to, and ratification of, the UNIX-class platform are *not possible*, because engaging in secretive discussions would be viewed by investors, customers and end-users alike as "something to hide", and thus irrevocably cause harm to the reputation of the project by undermining its business case as a "trusted independently auditable product at every level of its development and manufacture". question: is the discussion of the UNIX-class platform specification to take place in a fashion that is inclusive of the *business* needs of this commercial *and* libre project to remain entirely public and transparent at all times? difficult as this is to point out: we have asked about this in the past, many times, and have not received a response. investigations into Trademark Law show that the point at which financial and other damages occur due to manufacturing and design delays caused by persistently and systematically not receiving a response is the point at which a Trademark may be irrevocably invalidated. whilst we continue to develop this product in good faith (an important factor to note under Trademark Law), and will make our best efforts to ensure interoperability (another extremely important factor to note under Trademark Law), our coninued exclusion from access to ongoing innovations and the Standards Development Process *will* at some point require us to make decisions or suffer substantial financial loss as a result. l. [1] unlike a discrete GPU, which is a completely separate isolated processor where IPC is deployed to shuttle data between the CPU and GPU, and thus any augmentations or non-compliance with Standards *does not matter*, a hybrid CPU / GPU / VPU has CPU workloads *and* GPU workloads *and* VPU workloads operating on the exact same SMP cores. the number of *general-purpose* registers has therefore been increased to a whopping 256 (128 INT and 128 FP), the ISA extended to cope (as hinted at as a possibility right at the top of the priv-spec), the TLB will almost certainly require pre-load "hints" due to the significantly different nature of GPU parallel workloads, and many other aspects besides. [2] https://nlnet.nl/PET/ _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
[parent not found: <CABwTF4UW8YePYr9Ad65VSvef4-Y42VEvNUs=hPWyWcyH295zCw@mail.gmail.com>]
* Re: [hw-dev] Re: [isa-dev] UNIX-Class Platform Specification Working Group [not found] ` <CABwTF4UW8YePYr9Ad65VSvef4-Y42VEvNUs=hPWyWcyH295zCw@mail.gmail.com> @ 2019-04-03 0:31 ` Luke Kenneth Casson Leighton 2019-04-03 2:43 ` Palmer Dabbelt 2019-04-03 1:53 ` Palmer Dabbelt 1 sibling, 1 reply; 12+ messages in thread From: Luke Kenneth Casson Leighton @ 2019-04-03 0:31 UTC (permalink / raw) To: Gurjeet Singh Cc: RISC-V ISA Dev, Palmer Dabbelt, Atish Patra, RISCV Software Developers, RISC-V HW Dev, linux-riscv On Wed, Apr 3, 2019 at 12:42 AM Gurjeet Singh <gurjeet@singh.im> wrote: > > Not that I'm interested in participating, but just curious > as to how these officially approved groups work. > Is there a mailing list for this group? that's the question that i asked. i had to ask it in the way that i did, using the words that i did, due to issues related to Trademark Law. > Is it open to public? it has not been made clear, hence my question. (as an aside: none of the "official" RISC-V Working Group mmailing lists are open access.) > How does one request to participate in these lists? again: it wasn't made clear. if however it has been expected that the lists be "RISC-V Working Group Mailing lists", then it is mandatory to sign the "RISC-V Membership Agreement", which prevents and prohibits all and any public discussion or release of information outside of the group without the expressed and explicit consent and approval of the RISC-V Foundation (Section 5). this being what our team absolutely cannot do [enter into secret agreements that interfere with the BUSINESS objectives], hence why i requested clarification. > How does one follow along in these conversations, that is, where are the mailing list archives for this group? again it was not stated (apologies, to palmer), so we do not know. > The list [1] seems to be for this purpose, but it is not hosted @groups.riscv.org so I'm not so sure. > [1]: linux-riscv@lists.infradead.org exactly: it's not clear. so, it needs to be made clear exactly what the Standards Development Process is to be, where discussion is to take place, and whether there are any terms or conditions required for participation. at that point, once it has been made clear, people will know what they are getting into. l. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [hw-dev] Re: [isa-dev] UNIX-Class Platform Specification Working Group 2019-04-03 0:31 ` [hw-dev] " Luke Kenneth Casson Leighton @ 2019-04-03 2:43 ` Palmer Dabbelt 2019-04-03 3:34 ` Luke Kenneth Casson Leighton 2019-04-03 4:13 ` Luke Kenneth Casson Leighton 0 siblings, 2 replies; 12+ messages in thread From: Palmer Dabbelt @ 2019-04-03 2:43 UTC (permalink / raw) To: lkcl; +Cc: isa-dev, gurjeet, Atish Patra, sw-dev, hw-dev, linux-riscv On Tue, 02 Apr 2019 17:31:23 PDT (-0700), lkcl@lkcl.net wrote: > On Wed, Apr 3, 2019 at 12:42 AM Gurjeet Singh <gurjeet@singh.im> wrote: >> >> Not that I'm interested in participating, but just curious >> as to how these officially approved groups work. >> Is there a mailing list for this group? > > that's the question that i asked. i had to ask it in the way that i > did, using the words that i did, due to issues related to Trademark > Law. > >> Is it open to public? > > it has not been made clear, hence my question. > > (as an aside: none of the "official" RISC-V Working Group mmailing > lists are open access.) It's a RISC-V working group and therefor follows the same policies as the rest of them. IIRC we're in a bit of a transition from workspace to groups.io, but either way the list (and associated meetings) will only be available to RISC-V members. There's a free membership for open source projects, as well as a cheap membership for individuals. > >> How does one request to participate in these lists? > > again: it wasn't made clear. if however it has been expected that > the lists be "RISC-V Working Group Mailing lists", then it is > mandatory to sign the "RISC-V Membership Agreement", which prevents > and prohibits all and any public discussion or release of information > outside of the group without the expressed and explicit consent and > approval of the RISC-V Foundation (Section 5). > > this being what our team absolutely cannot do [enter into secret > agreements that interfere with the BUSINESS objectives], hence why i > requested clarification. OK, well, I'm sorry you'll be unable to contribute. We considered different contribution models as part of starting the group, but decided the standard RISC-V arrangement was the best fit for this group as well. >> How does one follow along in these conversations, that is, where are the mailing list archives for this group? > > again it was not stated (apologies, to palmer), so we do not know. > >> The list [1] seems to be for this purpose, but it is not hosted @groups.riscv.org so I'm not so sure. >> [1]: linux-riscv@lists.infradead.org > > exactly: it's not clear. so, it needs to be made clear exactly what > the Standards Development Process is to be, where discussion is to > take place, and whether there are any terms or conditions required for > participation. > > at that point, once it has been made clear, people will know what > they are getting into. That's the RISC-V Linux kernel mailing list, where is where RISC-V kernel development happens. That is an open list, but does not directly discuss the development of RISC-V standards like the platform specification. Platform spec discussions will happen the same place as all the other RISC-V discussions -- my other groups are on workspace.riscv.org, but I don't see a platform spec group there and with the LF transition IIRC we're deprecating workspace in favor of something else. Maybe we'll be the first group to figure out how it works :) I pinged some of the LF people to try and figure out how to get at least myself added to the list. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [hw-dev] Re: [isa-dev] UNIX-Class Platform Specification Working Group 2019-04-03 2:43 ` Palmer Dabbelt @ 2019-04-03 3:34 ` Luke Kenneth Casson Leighton 2019-04-03 4:13 ` Luke Kenneth Casson Leighton 1 sibling, 0 replies; 12+ messages in thread From: Luke Kenneth Casson Leighton @ 2019-04-03 3:34 UTC (permalink / raw) To: Palmer Dabbelt, Rick O'Connor Cc: RISC-V ISA Dev, Gurjeet Singh, Atish Patra, RISC-V SW Dev, RISC-V HW Dev, linux-riscv On Wed, Apr 3, 2019 at 3:43 AM Palmer Dabbelt <palmer@sifive.com> wrote: > > On Tue, 02 Apr 2019 17:31:23 PDT (-0700), lkcl@lkcl.net wrote: > > On Wed, Apr 3, 2019 at 12:42 AM Gurjeet Singh <gurjeet@singh.im> wrote: > >> > >> Not that I'm interested in participating, but just curious > >> as to how these officially approved groups work. > >> Is there a mailing list for this group? > > > > that's the question that i asked. i had to ask it in the way that i > > did, using the words that i did, due to issues related to Trademark > > Law. > > > >> Is it open to public? > > > > it has not been made clear, hence my question. > > > > (as an aside: none of the "official" RISC-V Working Group mmailing > > lists are open access.) > > It's a RISC-V working group and therefor follows the same policies as the rest > of them. IIRC we're in a bit of a transition from workspace to groups.io, but > either way the list (and associated meetings) will only be available to RISC-V > members. There's a free membership for open source projects, as well as a > cheap membership for individuals. monetarily zero cost... as long as they have no conflict of interest that prevents and prohibits joining. and we have a clear business case (full transparency and independent third party audit requirements). to be clear: it would actually be considered to be *fraud* to have put in a Grant Application under false pretenses (namely: to state that we intended to develop a commercial chip in a fully transparent fashion, then immediately on doing so join a *CLOSED* secretive group). > >> How does one request to participate in these lists? > > > > again: it wasn't made clear. if however it has been expected that > > the lists be "RISC-V Working Group Mailing lists", then it is > > mandatory to sign the "RISC-V Membership Agreement", which prevents > > and prohibits all and any public discussion or release of information > > outside of the group without the expressed and explicit consent and > > approval of the RISC-V Foundation (Section 5). > > > > this being what our team absolutely cannot do [enter into secret > > agreements that interfere with the BUSINESS objectives], hence why i > > requested clarification. > > OK, well, I'm sorry you'll be unable to contribute. you may be misunderstanding: we have a clear business case for involvement in the standards development process, and have been consistently requesting access to resources such that we may participate in innovation. we have yet to receive a response. failure of the RISC-V Foundation to accept this and take it into account is not an option for the RISC-V Foundation if the RISC-V Foundation wishes to continue to enjoy the benefits afforded by Trademark Law. so we are being excluded from the standards development process, despite having a clear-cut business case for being included. given the failure of the RISC-V Foundation to take our business case into consideration, we are not going to just "give up", and will proceed as best we can under the circumstances with our business objectives. acting in good faith as we are, we will endeavour to ensure that our business objectives are met with the minimum disruption to the wider RISC-V community, however given that we are clearly being discriminated against, we cannot and will not be held responsible for any incompatibilities or non-interoperability: that is clearly down to the failure of the RISC-V Foundation to take our business objectives into consideration. if anyone has a problem with that, particularly that the libre/open community depends critically on good-will, PLEASE SPEAK UP. it is very important that you do so, as it will strengthen the case that substantial damages have arisen to our business objectives as direct consequence of continued and persistent silence and abdication of responsibility regarding Trademark Law by the RISC-V Foundation. (Executive Director once again cc'd so that there is no possibility that the RISC-V Foundation may claim "It Did Not Know") > e considered different > contribution models as part of starting the group, but decided the standard > RISC-V arrangement was the best fit for this group as well. this constitutes discrimination. Trademark Law is unfortunately quite clear: discrimination in this fashion is not permitted. any Tradmark owner that engages in discriminatory practices irrevocably forfeits the Trademark. it is also very clear that persistent failure by a Trademark holder to respond to communications to resolve such matters also results in permanent forfeiture, and a consequent loss of right of enforcement. we're *going* to go ahead, palmer. we *will* meet the business objective of creating an entirely and wholly libre-licensed RISC-V hybrid GPU/CPU/VPU that is fully transparent in its development and manufacture, right to the bedrock, with or without the RISC-V Foundation's cooperation. l. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [hw-dev] Re: [isa-dev] UNIX-Class Platform Specification Working Group 2019-04-03 2:43 ` Palmer Dabbelt 2019-04-03 3:34 ` Luke Kenneth Casson Leighton @ 2019-04-03 4:13 ` Luke Kenneth Casson Leighton 2019-04-03 4:48 ` Luke Kenneth Casson Leighton 1 sibling, 1 reply; 12+ messages in thread From: Luke Kenneth Casson Leighton @ 2019-04-03 4:13 UTC (permalink / raw) To: Palmer Dabbelt Cc: Rick O'Connor, RISC-V ISA Dev, Gurjeet Singh, Atish Patra, RISC-V SW Dev, RISC-V HW Dev, linux-riscv On Wed, Apr 3, 2019 at 3:43 AM Palmer Dabbelt <palmer@sifive.com> wrote: > We considered different > contribution models as part of starting the group, but decided the standard > RISC-V arrangement was the best fit for this group as well. to make it clear as to why this process constitutes "discrimination": why was there no invitattion made public for actively interested parties aka "stakeholders" to participate in the decision-making process? why was there no wider consultation? why was the decision made in secret? why are we being told *after* the decision has been made, and why do you believe that our business objectives do not matter? executive director of the RISC-V Foundation once again cc'd so that there is no way that the RISC-V Foundation may claim that they are unaware. l. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [hw-dev] Re: [isa-dev] UNIX-Class Platform Specification Working Group 2019-04-03 4:13 ` Luke Kenneth Casson Leighton @ 2019-04-03 4:48 ` Luke Kenneth Casson Leighton 0 siblings, 0 replies; 12+ messages in thread From: Luke Kenneth Casson Leighton @ 2019-04-03 4:48 UTC (permalink / raw) To: Palmer Dabbelt Cc: Rick O'Connor, RISC-V ISA Dev, Gurjeet Singh, Atish Patra, RISC-V SW Dev, RISC-V HW Dev, linux-riscv https://entertainment.slashdot.org/story/19/04/02/218226/justice-department-warns-academy-about-changing-oscar-rules-to-exclude-streaming#comments that's interesting. i was not previously aware of "Section 1 of the Sherman Act". Delrahim cited Section 1 of the Sherman Act that "prohibits anticompetitive agreements among competitors." "Accordingly, agreements among competitors to exclude new competitors can violate the antitrust laws when their purpose or effect is to impede competition by goods or services that consumers purchase and enjoy but which threaten the profits of incumbent firms," Delrahim wrote. i wonder therefore if "deciding the standard RISC-V arrangement was the best fit for this group as well" - excluding us from that decision-making process constitutes a violation of the Sherman Act, given that "profits of incumbent firms are threatened", and "competition by goods that consumers purchase is impeded"? l. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [isa-dev] UNIX-Class Platform Specification Working Group [not found] ` <CABwTF4UW8YePYr9Ad65VSvef4-Y42VEvNUs=hPWyWcyH295zCw@mail.gmail.com> 2019-04-03 0:31 ` [hw-dev] " Luke Kenneth Casson Leighton @ 2019-04-03 1:53 ` Palmer Dabbelt 2019-04-03 2:39 ` Luke Kenneth Casson Leighton 1 sibling, 1 reply; 12+ messages in thread From: Palmer Dabbelt @ 2019-04-03 1:53 UTC (permalink / raw) To: gurjeet; +Cc: Atish Patra, linux-riscv, sw-dev, isa-dev, hw-dev On Tue, 02 Apr 2019 16:42:30 PDT (-0700), gurjeet@singh.im wrote: > Not that I'm interested in participating, but just curious as to how these > officially approved groups work. Is there a mailing list for this group? Is > it open to public? How does one request to participate in these lists? How > does one follow along in these conversations, that is, where are the > mailing list archives for this group? There is (or will soon be) an internal RISC-V foundation mailing list. You sign up for it via your RISC-V foundation account -- I've never quite figured out how to use that, mostly because Arun handles it for me. The tool is called workspace, which lives here: http://workspace.riscv.org/higherlogic/ws/public . If you're a RISC-V member then you should be able to log in. I can't find the platform spec group, though, so I may be screwing something up... > The list [1] seems to be for this purpose, but it is not hosted @ > groups.riscv.org so I'm not so sure. > > [1]: linux-riscv@lists.infradead.org That's the Linux kernel mailing list for RISC-V. It's CC'd here because users on it may be interested in the platform specification, but it's not the platform specification mailing list. > > Best regards, > > On Tue, Apr 2, 2019 at 9:50 AM Palmer Dabbelt <palmer@sifive.com> wrote: > >> Atish and I have approval from the RISC-V technical committee and board to >> start a group to manage the UNIX-class platform specification. This >> working >> group will start by defining a subset of this platform specification that >> both >> allows compatibility with existing implementations and extensibility for >> the >> future needs. The contents of this first platform specification will >> include: >> >> * A versioning scheme for future versions of the UNIX-class platform >> specification. >> * A specification for a platform-level interrupt controller that is >> compatible >> with existing implementations of SiFive's PLIC. >> * A specification for a standard SBI that is compatible with the current >> implementation in Linux as well being extensible for future needs. >> * An SBI extension for CPU power management. >> * A specification of the interface between a bootloader and >> supervisor-mode >> software. >> >> Since this working group mostly consists of standardizing existing >> implementations, I hope it can progress quickly. As such, I'd like to set >> a >> 6-month deadline between when the working group is started (ie, today) and >> when >> a specification enters the 45-day review period. >> >> -- >> You received this message because you are subscribed to the Google Groups >> "RISC-V ISA Dev" group. >> To unsubscribe from this group and stop receiving emails from it, send an >> email to isa-dev+unsubscribe@groups.riscv.org. >> To post to this group, send email to isa-dev@groups.riscv.org. >> Visit this group at >> https://groups.google.com/a/groups.riscv.org/group/isa-dev/. >> To view this discussion on the web visit >> https://groups.google.com/a/groups.riscv.org/d/msgid/isa-dev/mhng-99966160-5466-4cfc-b3d8-48ad48d3dc74%40palmer-si-x1c4 >> . >> _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [isa-dev] UNIX-Class Platform Specification Working Group 2019-04-03 1:53 ` Palmer Dabbelt @ 2019-04-03 2:39 ` Luke Kenneth Casson Leighton 0 siblings, 0 replies; 12+ messages in thread From: Luke Kenneth Casson Leighton @ 2019-04-03 2:39 UTC (permalink / raw) To: Palmer Dabbelt Cc: RISC-V ISA Dev, Gurjeet Singh, Atish Patra, RISC-V SW Dev, RISC-V HW Dev, linux-riscv On Wed, Apr 3, 2019 at 2:53 AM Palmer Dabbelt <palmer@sifive.com> wrote: > On Tue, 02 Apr 2019 16:42:30 PDT (-0700), gurjeet@singh.im wrote: > > Not that I'm interested in participating, but just curious as to how these > > officially approved groups work. Is there a mailing list for this group? Is > > it open to public? How does one request to participate in these lists? How > > does one follow along in these conversations, that is, where are the > > mailing list archives for this group? > > There is (or will soon be) an internal RISC-V foundation mailing list. You > sign up for it via your RISC-V foundation account so that it is perfectly clear to all who may wish (or need) to participate (1) what are the terms and conditions under which a "RISC-V foundation account" may be obtained (2) are the archives of the "internal RISC-V foundation mailing list" to be made public and transparent so that businesses who have mandatory transparency and third party audit and accountability requirements are not seen to be "hiding something" by participating? l. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
[parent not found: <CANs6eMn4+6XGaSOGyWoD5RK2DjQo2SUUHphqmL_dwQD-Xu-omQ@mail.gmail.com>]
* Re: [isa-dev] Re: UNIX-Class Platform Specification Working Group [not found] ` <CANs6eMn4+6XGaSOGyWoD5RK2DjQo2SUUHphqmL_dwQD-Xu-omQ@mail.gmail.com> @ 2019-04-07 7:36 ` Christoph Hellwig 2019-04-07 15:30 ` Jim Wilson 2019-04-08 6:50 ` Atish Patra 0 siblings, 2 replies; 12+ messages in thread From: Christoph Hellwig @ 2019-04-07 7:36 UTC (permalink / raw) To: sw-dev, palmer, linux-riscv, hw-dev, isa-dev; +Cc: Atish Patra On Fri, 2019-04-05 at 08:43 -0700, Palmer Dabbelt wrote: > Sorry for the delay, but it appears we now have a mailing list set > up! I managed to announce the group right in the middle of the > workspace -> groups.io transition, which means we're the first group > to try out the new infrastructure. As a result there may be some > wrinkles, but at least a handful of us can get into the group so with > any luck it'll work for anyone else. > > You should be able to join here: > https://lists.risc-v.org/g/tech-unixplatformspec/topics . Just like > the other RISC-V specs, you'll need to be a member of the RISC-V > foundation to contribute to the platform specification -- sorry if > there was some confusion in my original email. So in the past the way to join was through workspace.riscv.org - but login in there just returns an internal server error. Has lists.risc- v.org replaced the above infrastructure or is it in addition? > > On Tue, Apr 2, 2019 at 9:50 AM Palmer Dabbelt <palmer@sifive.com> > wrote: > > Atish and I have approval from the RISC-V technical committee and > > board to > > start a group to manage the UNIX-class platform specification. > > This working > > group will start by defining a subset of this platform > > specification that both > > allows compatibility with existing implementations and > > extensibility for the > > future needs. The contents of this first platform specification > > will include: > > > > * A versioning scheme for future versions of the UNIX-class > > platform > > specification. > > * A specification for a platform-level interrupt controller that is > > compatible > > with existing implementations of SiFive's PLIC. > > * A specification for a standard SBI that is compatible with the > > current > > implementation in Linux as well being extensible for future > > needs. > > * An SBI extension for CPU power management. > > * A specification of the interface between a bootloader and > > supervisor-mode > > software. > > > > Since this working group mostly consists of standardizing existing > > implementations, I hope it can progress quickly. As such, I'd like > > to set a > > 6-month deadline between when the working group is started (ie, > > today) and when > > a specification enters the 45-day review period. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [isa-dev] Re: UNIX-Class Platform Specification Working Group 2019-04-07 7:36 ` [isa-dev] " Christoph Hellwig @ 2019-04-07 15:30 ` Jim Wilson 2019-04-08 6:50 ` Atish Patra 1 sibling, 0 replies; 12+ messages in thread From: Jim Wilson @ 2019-04-07 15:30 UTC (permalink / raw) To: Christoph Hellwig Cc: isa-dev, palmer, Atish Patra, sw-dev, hw-dev, linux-riscv On Sun, Apr 7, 2019 at 12:36 AM Christoph Hellwig <Christoph.Hellwig@wdc.com> wrote: > So in the past the way to join was through workspace.riscv.org - but > login in there just returns an internal server error. Has lists.risc- > v.org replaced the above infrastructure or is it in addition? Ignore the server error. You are actually logged in, and can click on the groups or projects links to continue to the workspace site. Jim _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [isa-dev] Re: UNIX-Class Platform Specification Working Group 2019-04-07 7:36 ` [isa-dev] " Christoph Hellwig 2019-04-07 15:30 ` Jim Wilson @ 2019-04-08 6:50 ` Atish Patra 1 sibling, 0 replies; 12+ messages in thread From: Atish Patra @ 2019-04-08 6:50 UTC (permalink / raw) To: Christoph Hellwig, sw-dev, palmer, linux-riscv, hw-dev, isa-dev On 4/7/19 12:36 AM, Christoph Hellwig wrote: > On Fri, 2019-04-05 at 08:43 -0700, Palmer Dabbelt wrote: >> Sorry for the delay, but it appears we now have a mailing list set >> up! I managed to announce the group right in the middle of the >> workspace -> groups.io transition, which means we're the first group >> to try out the new infrastructure. As a result there may be some >> wrinkles, but at least a handful of us can get into the group so with >> any luck it'll work for anyone else. >> >> You should be able to join here: >> https://lists.risc-v.org/g/tech-unixplatformspec/topics . Just like >> the other RISC-V specs, you'll need to be a member of the RISC-V >> foundation to contribute to the platform specification -- sorry if >> there was some confusion in my original email. > > So in the past the way to join was through workspace.riscv.org - but > login in there just returns an internal server error. Has lists.risc- > v.org replaced the above infrastructure or is it in addition? > IIRC, workspace.riscv.org is going to be replaced with lists.risc- v.org which will managed by Jeff. Platform Spec group just happened to be the fist one to deal with it. There won't be a platform spec group in workspace.riscv.org. Regards, Atish >> >> On Tue, Apr 2, 2019 at 9:50 AM Palmer Dabbelt <palmer@sifive.com> >> wrote: >>> Atish and I have approval from the RISC-V technical committee and >>> board to >>> start a group to manage the UNIX-class platform specification. >>> This working >>> group will start by defining a subset of this platform >>> specification that both >>> allows compatibility with existing implementations and >>> extensibility for the >>> future needs. The contents of this first platform specification >>> will include: >>> >>> * A versioning scheme for future versions of the UNIX-class >>> platform >>> specification. >>> * A specification for a platform-level interrupt controller that is >>> compatible >>> with existing implementations of SiFive's PLIC. >>> * A specification for a standard SBI that is compatible with the >>> current >>> implementation in Linux as well being extensible for future >>> needs. >>> * An SBI extension for CPU power management. >>> * A specification of the interface between a bootloader and >>> supervisor-mode >>> software. >>> >>> Since this working group mostly consists of standardizing existing >>> implementations, I hope it can progress quickly. As such, I'd like >>> to set a >>> 6-month deadline between when the working group is started (ie, >>> today) and when >>> a specification enters the 45-day review period. > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2019-04-08 6:51 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-04-02 16:50 UNIX-Class Platform Specification Working Group Palmer Dabbelt 2019-04-02 17:38 ` [isa-dev] " Luke Kenneth Casson Leighton [not found] ` <CABwTF4UW8YePYr9Ad65VSvef4-Y42VEvNUs=hPWyWcyH295zCw@mail.gmail.com> 2019-04-03 0:31 ` [hw-dev] " Luke Kenneth Casson Leighton 2019-04-03 2:43 ` Palmer Dabbelt 2019-04-03 3:34 ` Luke Kenneth Casson Leighton 2019-04-03 4:13 ` Luke Kenneth Casson Leighton 2019-04-03 4:48 ` Luke Kenneth Casson Leighton 2019-04-03 1:53 ` Palmer Dabbelt 2019-04-03 2:39 ` Luke Kenneth Casson Leighton [not found] ` <CANs6eMn4+6XGaSOGyWoD5RK2DjQo2SUUHphqmL_dwQD-Xu-omQ@mail.gmail.com> 2019-04-07 7:36 ` [isa-dev] " Christoph Hellwig 2019-04-07 15:30 ` Jim Wilson 2019-04-08 6:50 ` Atish Patra
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