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* Re: [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110
       [not found] <20091229222006.1ddb28a4@feng-desktop>
@ 2009-12-29 14:59 ` Baruch Siach
  2009-12-29 16:05   ` Tang, Feng
  2009-12-29 15:02 ` Alan Cox
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 35+ messages in thread
From: Baruch Siach @ 2009-12-29 14:59 UTC (permalink / raw)
  To: Feng Tang
  Cc: Greg Kroah-Hartman, David Brownell, Grant Likely, spi-devel-list,
	linux-serial, alan, Andrew Morton

Hi Feng,

On Tue, Dec 29, 2009 at 10:20:06PM +0800, Feng Tang wrote:
> Here is a driver for Maxim 3110 SPI-UART device, please help to review.

Is this 3110 device so significantly different from the MAX3100 driver that's 
already in the mainline kernel (drivers/serial/max3100.c), to require a whole 
new driver? 

> It has been validated with Designware SPI controller (drivers/spi: dw_spi.c 
> & dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
> provides a console.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110
       [not found] <20091229222006.1ddb28a4@feng-desktop>
  2009-12-29 14:59 ` [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110 Baruch Siach
@ 2009-12-29 15:02 ` Alan Cox
  2010-02-08  8:59 ` [RFC][PATCH v2] " Feng Tang
       [not found] ` <20100208165946.0e4dde83@feng-i7>
  3 siblings, 0 replies; 35+ messages in thread
From: Alan Cox @ 2009-12-29 15:02 UTC (permalink / raw)
  To: Feng Tang
  Cc: David Brownell, Greg Kroah-Hartman,
	linux-serial-u79uwXL29TY76Z2rM5mHXA, spi-devel-list,
	Andrew Morton

> As a RFC, the driver doesn't have a valid UART port type yet, but borrow
> PORT_PXA. I would apply one if there is no main objection for it.

Please just add a new uart type for it.

> +config MAX3110_DESIGNWARE
> +	boolean "Enable Max3110 to work with Designware controller"
> +	default y
> +	depends on SERIAL_MAX3110
> +
> +config MAX3110_IRQ
> +	boolean "Enable IRQ for Max3110"
> +	default n
> +	depends on SERIAL_MAX3110
> +

These should be runtime


> +int max3110_write_then_read(struct uart_max3110 *max,
> +		const u8 *txbuf, u8 *rxbuf, unsigned len, int always_fast)
> +{
> +	struct spi_device *spi = max->spi;
> +	struct spi_message	message;
> +	struct spi_transfer	x;
> +	int ret;
> +
> +	if (!txbuf || !rxbuf)
> +		return -EINVAL;

How can the above occur - it seems no user triggered event can cause it
and almost all the paths then lose the error before userspace gets it
(and silently).


> +	if (len > MAX_READ_LEN) {
> +		pr_err(PR_FMT "read len %d is too large\n", len);
> +		return 0;
> +	}

Ditto


> +	while (len) {
> +		usable = tty_buffer_request_room(tty, len);
> +		if (usable) {
> +			tty_insert_flip_string(tty, str, usable);
> +			str += usable;
> +			port->icount.rx += usable;
> +			tty_flip_buffer_push(tty);

You really only want to push once. tty_insert_flip_string also knows
about multiple blocks so all of this can be a single

	tty_insert_flip_string(tty, str, len);
	tty_flip_buffer_push(tty);


>
> +static void
> +serial_m3110_set_termios(struct uart_port *port, struct ktermios *termios,
> +		       struct ktermios *old)
> +{
> +	struct uart_max3110 *max =
> +		container_of(port, struct uart_max3110, port);
> +	unsigned char cval;
> +	unsigned int baud, parity = 0;
> +	int clk_div = -1;
> +	u16 new_conf = max->cur_conf;
> +
> +	switch (termios->c_cflag & CSIZE) {
> +	case CS7:
> +		cval = UART_LCR_WLEN7;
> +		new_conf |= WC_7BIT_WORD;
> +		break;
> +	default:
> +	case CS8:
> +		cval = UART_LCR_WLEN8;
> +		new_conf |= WC_8BIT_WORD;

If you can only do CS8 when asked for other values you need to update the
termios struct to report that

		termios->c_cflag &= ~CSIZE;
		termios->c_flag |= CS8;

> +	if (!(termios->c_cflag & PARODD))
> +		parity |= UART_LCR_EPAR;
> +	max->parity = parity;
> +
> +	uart_update_timeout(port, termios->c_cflag, baud);
> +
> +	new_conf |= WC_TAG;
> +	if (new_conf != max->cur_conf) {
> +		max3110_out(max, new_conf);
> +		max->cur_conf = new_conf;
> +		max->baud = baud;
> +	}

And as you don't support it

	termios->c_cflag &= ~CMSPAR;


I'll take a more serious look over it in the new year when I'm back at
work.


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^ permalink raw reply	[flat|nested] 35+ messages in thread

* RE: [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110
  2009-12-29 14:59 ` [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110 Baruch Siach
@ 2009-12-29 16:05   ` Tang, Feng
  2009-12-29 18:43     ` Erwin Authried
  0 siblings, 1 reply; 35+ messages in thread
From: Tang, Feng @ 2009-12-29 16:05 UTC (permalink / raw)
  To: Baruch Siach
  Cc: Greg Kroah-Hartman, David Brownell, Grant Likely, spi-devel-list,
	linux-serial, alan, Andrew Morton


>-----Original Message-----
>From: Baruch Siach [mailto:baruch@tkos.co.il]
>Sent: 2009年12月29日 23:00
>To: Tang, Feng
>Cc: Greg Kroah-Hartman; David Brownell; Grant Likely; spi-devel-list;
>linux-serial@vger.kernel.org; alan@lxorguk.ukuu.org.uk; Andrew Morton
>Subject: Re: [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for
>Maxim 3110
>
>Hi Feng,
>
>On Tue, Dec 29, 2009 at 10:20:06PM +0800, Feng Tang wrote:
>> Here is a driver for Maxim 3110 SPI-UART device, please help to review.
>
>Is this 3110 device so significantly different from the MAX3100 driver that's
>already in the mainline kernel (drivers/serial/max3100.c), to require a whole
>new driver?

Yes, I know this question will be asked :) I developed the max3110 before max3100
was posted in public, so the 2 designs differs a lot from the start. I think this driver
has 2 good points:
1. It provides a console, which is the main reason that our platform use max3110
2. It utilizes the RX buffer of max3110 that it can reads up to 8 characters in one
spi_transfer, and its Tx function can transmit up to 128 chars in one spi_transfer
which will save much system load comparing to 1 char per spi transfer

Current max3100.c also has its advantage, like good support in CTS/RTS control,
and I think these 2 can merge in the future.

Thanks,
Feng 
>
>> It has been validated with Designware SPI controller (drivers/spi: dw_spi.c
>> & dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
>> provides a console.
>
>baruch
>
>--
>                                                     ~. .~   Tk Open
>Systems
>=}------------------------------------------------ooO--U--Ooo------------{=
>   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110
  2009-12-29 16:05   ` Tang, Feng
@ 2009-12-29 18:43     ` Erwin Authried
  2009-12-30  1:54       ` Feng Tang
  2010-02-25  4:47       ` David Brownell
  0 siblings, 2 replies; 35+ messages in thread
From: Erwin Authried @ 2009-12-29 18:43 UTC (permalink / raw)
  To: Tang, Feng
  Cc: Baruch Siach, David Brownell, Greg Kroah-Hartman, linux-serial,
	spi-devel-list, Andrew Morton, alan

Am Mittwoch, den 30.12.2009, 00:05 +0800 schrieb Tang, Feng:
> >-----Original Message-----
> >From: Baruch Siach [mailto:baruch@tkos.co.il]
> >Sent: 2009年12月29日 23:00
> >To: Tang, Feng
> >Cc: Greg Kroah-Hartman; David Brownell; Grant Likely; spi-devel-list;
> >linux-serial@vger.kernel.org; alan@lxorguk.ukuu.org.uk; Andrew Morton
> >Subject: Re: [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for
> >Maxim 3110
> >
> >Hi Feng,
> >
> >On Tue, Dec 29, 2009 at 10:20:06PM +0800, Feng Tang wrote:
> >> Here is a driver for Maxim 3110 SPI-UART device, please help to review.
> >
> >Is this 3110 device so significantly different from the MAX3100 driver that's
> >already in the mainline kernel (drivers/serial/max3100.c), to require a whole
> >new driver?
> 
> Yes, I know this question will be asked :) I developed the max3110 before max3100
> was posted in public, so the 2 designs differs a lot from the start. I think this driver
> has 2 good points:
> 1. It provides a console, which is the main reason that our platform use max3110
> 2. It utilizes the RX buffer of max3110 that it can reads up to 8 characters in one
> spi_transfer, and its Tx function can transmit up to 128 chars in one spi_transfer
> which will save much system load comparing to 1 char per spi transfer
> 
> Current max3100.c also has its advantage, like good support in CTS/RTS control,
> and I think these 2 can merge in the future.
> 
> Thanks,
> Feng 
> >
> >> It has been validated with Designware SPI controller (drivers/spi: dw_spi.c
> >> & dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
> >> provides a console.
> >
> >baruch
> >
> >--

Hi,

looking at your driver, there are several points that make me doubt that
it is working at all:

* The MAX3110 requires CS going low at the start of each 16-bit
transfer, if you look at the datasheet. 

* in max3110_read_multi, it looks to me that this will work for
big-endian architectures only.

* I can't see how send_circ_buf() should work at all. You are just
sending a burst of characters to the MAX3110 without checking the
transmit buffer status at all. The MAX3110 has a single TX buffer only,
so that will cause transmit characters to be lost.

I think there's no need for a MAX3100 **and** a MAX3110 driver, this is
just confusing. The MAX3110 driver is identical to the MAX3100 from the
software view, it is simply a MAX3100 with transceivers added to the
chip. If there's any improvement, that should be merged into the
existing MAX3100 driver.

-Erwin


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^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110
  2009-12-29 18:43     ` Erwin Authried
@ 2009-12-30  1:54       ` Feng Tang
  2010-02-25  4:47       ` David Brownell
  1 sibling, 0 replies; 35+ messages in thread
From: Feng Tang @ 2009-12-30  1:54 UTC (permalink / raw)
  To: Erwin Authried
  Cc: Baruch Siach, David Brownell, Greg Kroah-Hartman, linux-serial,
	spi-devel-list, Andrew Morton, alan

On Wed, 30 Dec 2009 02:43:48 +0800
Erwin Authried <eauth@softsys.co.at> wrote:


Hi Erwin,

Thanks for the comments.
> 
> Hi,
> 
> looking at your driver, there are several points that make me doubt
> that it is working at all:
You can trust me on this point:) it has worked reliably on our HW platform
for long time. I don't know if Alan has played with the platform, but
David Woodhouse has, max3110's console is one of the main debug methods
for developers.

Actually it can co-work well with other SPI devices connecting to the
same SPI controller(our platform use a Designware core based controller)
> 
> * The MAX3110 requires CS going low at the start of each 16-bit
> transfer, if you look at the datasheet. 
Our SPI controller can handle this (drivers/spi/dw_spi.c), it has a
dedicated chip select register for handling chip select. And this part
is transparent for all SPI slave devices connecting to the controller 

> 
> * in max3110_read_multi, it looks to me that this will work for
> big-endian architectures only.
We are running on x86 architecture, with little endian. But endian issue is
a good point

> 
> * I can't see how send_circ_buf() should work at all. You are just
> sending a burst of characters to the MAX3110 without checking the
> transmit buffer status at all. The MAX3110 has a single TX buffer
> only, so that will cause transmit characters to be lost.
Yes, I let the SPI controller driver handle this, which has a rather
big FIFO. And structure spi_transfer has a member "speed_hz", this driver
set it according to current UART baud rate, then SPI controller driver will
adjust the bus frequency between controller and 3110 accordingly to prevent
its overflow, which will avoid explicit delay in driver

> 
> I think there's no need for a MAX3100 **and** a MAX3110 driver, this
> is just confusing. The MAX3110 driver is identical to the MAX3100
> from the software view, it is simply a MAX3100 with transceivers
> added to the chip. If there's any improvement, that should be merged
> into the existing MAX3100 driver.
I agree there should not be 2 drivers cover 1 family of HW, so this is a RFC.
I've thinked about merge with current 3100 code, but it depends on one char
per spi_transfer, while my driver relys on batch data transfer for efficiency.
Another key point is the console, SPI UART can't be directly accessed by
CPU, so every spi_transfer will go through tasklet/workqueue, which makes
supporting printk a big part of my driver.


Thanks,
Feng  

> 
> -Erwin
> 
> 

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [RFC][PATCH v2] serial: spi: add spi-uart driver for Maxim 3110
       [not found] <20091229222006.1ddb28a4@feng-desktop>
  2009-12-29 14:59 ` [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110 Baruch Siach
  2009-12-29 15:02 ` Alan Cox
@ 2010-02-08  8:59 ` Feng Tang
       [not found] ` <20100208165946.0e4dde83@feng-i7>
  3 siblings, 0 replies; 35+ messages in thread
From: Feng Tang @ 2010-02-08  8:59 UTC (permalink / raw)
  To: Greg Kroah-Hartman, David Brownell, Grant Likely, spi-devel-list

Hi All,

Here is a driver for Maxim 3110 SPI-UART device, please help to review.

It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
provides a console.

change since v1:
	* Address comments from Alan Cox
	* Use a "use_irq" module parameter to runtime check whether
	  to use IRQ mode
	* Add the suspend/resume implementation

Thanks!
Feng

>From 6d14c5d68cdae8d48b6d8a00b6653022f2b100d0 Mon Sep 17 00:00:00 2001
From: Feng Tang <feng.tang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Date: Mon, 8 Feb 2010 16:02:59 +0800
Subject: [PATCH] serial: spi: add spi-uart driver for Maxim 3110

This is the driver for Max3110 SPI-UART device, which connect
to host with SPI interface. It supports baud rates from 300 to
230400, and supports both polling and IRQ mode, as well as
providing a console for system use

Its datasheet could be found here:
http://datasheets.maxim-ic.com/en/ds/MAX3110E-MAX3111E.pdf

Signed-off-by: Feng Tang <feng.tang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
---
 drivers/serial/Kconfig      |   12 +
 drivers/serial/max3110.c    |  848 +++++++++++++++++++++++++++++++++++++++++++
 drivers/serial/max3110.h    |   59 +++
 include/linux/serial_core.h |    3 +
 4 files changed, 922 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/max3110.c
 create mode 100644 drivers/serial/max3110.h

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 9ff47db..f7daf2f 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -688,6 +688,18 @@ config SERIAL_SA1100_CONSOLE
 	  your boot loader (lilo or loadlin) about how to pass options to the
 	  kernel at boot time.)
 
+config SERIAL_MAX3110
+	tristate "SPI UART driver for Max3110"
+	select SERIAL_CORE
+	select SERIAL_CORE_CONSOLE
+	help
+	  This is the UART protocol driver for MAX3110 device
+
+config MAX3110_DESIGNWARE
+	boolean "Enable Max3110 to work with Designware controller"
+	default y
+	depends on SERIAL_MAX3110
+
 config SERIAL_BFIN
 	tristate "Blackfin serial port support"
 	depends on BLACKFIN
diff --git a/drivers/serial/max3110.c b/drivers/serial/max3110.c
new file mode 100644
index 0000000..c7c012b
--- /dev/null
+++ b/drivers/serial/max3110.c
@@ -0,0 +1,848 @@
+/*
+ * max3110.c - spi uart protocol driver for Maxim 3110
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+/*
+ * Note:
+ * * From Max3110 spec, the Rx FIFO has 8 words, while the Tx FIFO only has
+ *   1 word. If SPI master controller doesn't support sclk frequency change,
+ *   then the char need be sent out one by one with some delay
+ *
+ * * Currently only RX availabe interrrupt is used
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/platform_device.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+
+#include <linux/kthread.h>
+#include <linux/delay.h>
+#include <asm/atomic.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/dw_spi.h>
+
+#include "max3110.h"
+
+#define PR_FMT	"max3110: "
+
+struct uart_max3110 {
+	struct uart_port port;
+	struct spi_device *spi;
+	char *name;
+
+	wait_queue_head_t wq;
+	struct task_struct *main_thread;
+	struct task_struct *read_thread;
+	int mthread_up;
+	spinlock_t lock;
+
+	u32 baud;
+	u16 cur_conf;
+	u8 clock;
+	u8 parity, word_7bits;
+
+	atomic_t uart_tx_need;
+
+	/* console related */
+	struct circ_buf con_xmit;
+	atomic_t con_tx_need;
+
+	/* irq related */
+	u16 irq;
+	atomic_t irq_pending;
+};
+
+static struct uart_max3110 *pmax;
+
+static int use_irq = 1;
+module_param(use_irq, int, 0444);
+MODULE_PARM_DESC(use_irq, "Whether using Max3110's IRQ capability");
+
+static void receive_chars(struct uart_max3110 *max,
+				unsigned char *str, int len);
+static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf);
+static void max3110_con_receive(struct uart_max3110 *max);
+
+int max3110_write_then_read(struct uart_max3110 *max,
+		const u8 *txbuf, u8 *rxbuf, unsigned len, int always_fast)
+{
+	struct spi_device *spi = max->spi;
+	struct spi_message	message;
+	struct spi_transfer	x;
+	int ret;
+
+	spi_message_init(&message);
+	memset(&x, 0, sizeof x);
+	x.len = len;
+	x.tx_buf = txbuf;
+	x.rx_buf = rxbuf;
+	spi_message_add_tail(&x, &message);
+
+	if (always_fast)
+		x.speed_hz = spi->max_speed_hz;
+	else if (max->baud)
+		x.speed_hz = max->baud;
+
+	/* Do the i/o */
+	ret = spi_sync(spi, &message);
+	return ret;
+}
+
+/* Write a u16 to the device, and return one u16 read back */
+int max3110_out(struct uart_max3110 *max, const u16 out)
+{
+	u16 tmp;
+	int ret;
+
+	ret = max3110_write_then_read(max, (u8 *)&out, (u8 *)&tmp, 2, 1);
+	if (ret)
+		return ret;
+
+	/* If some valid data is read back */
+	if (tmp & MAX3110_READ_DATA_AVAILABLE) {
+		tmp &= 0xff;
+		receive_chars(max, (unsigned char *)&tmp, 1);
+	}
+
+	return ret;
+}
+
+#define MAX_READ_LEN	20
+/*
+ * This is usually used to read data from SPIC RX FIFO, which doesn't
+ * need any delay like flushing character out.
+ * Returns how many valide bytes are read back
+ */
+static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf)
+{
+	u16 out[MAX_READ_LEN], in[MAX_READ_LEN];
+	u8 *pbuf, valid_str[MAX_READ_LEN];
+	int i, j, bytelen;
+
+	bytelen = len * 2;
+	memset(out, 0, bytelen);
+	memset(in, 0, bytelen);
+
+	if (max3110_write_then_read(max, (u8 *)out, (u8 *)in, bytelen, 1))
+		return 0;
+
+	/* If caller doesn't provide a buffer, then handle received char */
+	pbuf = buf ? buf : valid_str;
+
+	for (i = 0, j = 0; i < len; i++) {
+		if (in[i] & MAX3110_READ_DATA_AVAILABLE)
+			pbuf[j++] = (u8)(in[i] & 0xff);
+	}
+
+	if (j && (pbuf == valid_str))
+		receive_chars(max, valid_str, j);
+
+	return j;
+}
+
+static void serial_m3110_con_putchar(struct uart_port *port, int ch)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	struct circ_buf *xmit = &max->con_xmit;
+
+	if (uart_circ_chars_free(xmit)) {
+		xmit->buf[xmit->head] = (char)ch;
+		xmit->head = (xmit->head + 1) & (PAGE_SIZE - 1);
+	}
+
+	if (!atomic_read(&max->con_tx_need)) {
+		atomic_set(&max->con_tx_need, 1);
+		wake_up_process(max->main_thread);
+	}
+}
+
+/*
+ * Print a string to the serial port trying not to disturb
+ * any possible real use of the port...
+ *
+ *	The console_lock must be held when we get here.
+ */
+static void serial_m3110_con_write(struct console *co,
+				const char *s, unsigned int count)
+{
+	if (!pmax)
+		return;
+
+	uart_console_write(&pmax->port, s, count, serial_m3110_con_putchar);
+}
+
+static int __init
+serial_m3110_con_setup(struct console *co, char *options)
+{
+	struct uart_max3110 *max = pmax;
+	int baud = 115200;
+	int bits = 8;
+	int parity = 'n';
+	int flow = 'n';
+
+	pr_info(PR_FMT "setting up console\n");
+
+	if (!max) {
+		pr_err(PR_FMT "pmax is NULL, return");
+		return -ENODEV;
+	}
+
+	if (options)
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+	return uart_set_options(&max->port, co, baud, parity, bits, flow);
+}
+
+static struct tty_driver *serial_m3110_con_device(struct console *co,
+							int *index)
+{
+	struct uart_driver *p = co->data;
+	*index = co->index;
+	return p->tty_driver;
+}
+
+static struct uart_driver serial_m3110_reg;
+static struct console serial_m3110_console = {
+	.name		= "ttyS",
+	.write		= serial_m3110_con_write,
+	.device		= serial_m3110_con_device,
+	.setup		= serial_m3110_con_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+	.data		= &serial_m3110_reg,
+};
+
+#define MRST_CONSOLE	(&serial_m3110_console)
+
+static unsigned int serial_m3110_tx_empty(struct uart_port *port)
+{
+	return 1;
+}
+
+static void serial_m3110_stop_tx(struct uart_port *port)
+{
+	return;
+}
+
+static void serial_m3110_stop_rx(struct uart_port *port)
+{
+	return;
+}
+
+#define WORDS_PER_XFER	128
+static inline void send_circ_buf(struct uart_max3110 *max,
+				struct circ_buf *xmit)
+{
+	int len, left = 0;
+	u16 obuf[WORDS_PER_XFER], ibuf[WORDS_PER_XFER];
+	u8 valid_str[WORDS_PER_XFER];
+	int i, j;
+
+	while (!uart_circ_empty(xmit)) {
+		left = uart_circ_chars_pending(xmit);
+		while (left) {
+			len = (left >= WORDS_PER_XFER) ? WORDS_PER_XFER : left;
+
+			memset(obuf, 0, len * 2);
+			memset(ibuf, 0, len * 2);
+			for (i = 0; i < len; i++) {
+				obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG;
+				xmit->tail = (xmit->tail + 1) &
+						(UART_XMIT_SIZE - 1);
+			}
+			max3110_write_then_read(max, (u8 *)obuf,
+						(u8 *)ibuf, len * 2, 0);
+
+			for (i = 0, j = 0; i < len; i++) {
+				if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
+					valid_str[j++] = (u8)(ibuf[i] & 0xff);
+			}
+
+			if (j)
+				receive_chars(max, valid_str, j);
+
+			max->port.icount.tx += len;
+			left -= len;
+		}
+	}
+}
+
+static void transmit_char(struct uart_max3110 *max)
+{
+	struct uart_port *port = &max->port;
+	struct circ_buf *xmit = &port->state->xmit;
+
+	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
+		return;
+
+	send_circ_buf(max, xmit);
+
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+		uart_write_wakeup(port);
+}
+
+/*
+ * This will be called by uart_write() and tty_write, can't
+ * go to sleep
+ */
+static void serial_m3110_start_tx(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+
+	if (!atomic_read(&max->uart_tx_need)) {
+		atomic_set(&max->uart_tx_need, 1);
+		wake_up_process(max->main_thread);
+	}
+}
+
+static void receive_chars(struct uart_max3110 *max, unsigned char *str, int len)
+{
+	struct uart_port *port = &max->port;
+	struct tty_struct *tty;
+	int usable;
+
+	/* If uart is not opened, just return */
+	if (!port->state)
+		return;
+
+	tty = port->state->port.tty;
+	if (!tty)
+		return;
+
+	while (len) {
+		usable = tty_buffer_request_room(tty, len);
+		if (usable) {
+			tty_insert_flip_string(tty, str, usable);
+			str += usable;
+			port->icount.rx += usable;
+		}
+		len -= usable;
+	}
+	tty_flip_buffer_push(tty);
+}
+
+static void max3110_con_receive(struct uart_max3110 *max)
+{
+	int loop = 1, num, total = 0;
+	u8 recv_buf[512], *pbuf;
+
+	pbuf = recv_buf;
+	do {
+		/* 3110 RX buffer is 8 words */
+		num = max3110_read_multi(max, 8, pbuf);
+
+		if (num) {
+			loop = 5;
+			pbuf += num;
+			total += num;
+
+			if (total >= 500) {
+				receive_chars(max, recv_buf, total);
+				pbuf = recv_buf;
+				total = 0;
+			}
+		}
+	} while (--loop);
+
+	if (total)
+		receive_chars(max, recv_buf, total);
+}
+
+static int max3110_main_thread(void *_max)
+{
+	struct uart_max3110 *max = _max;
+	wait_queue_head_t *wq = &max->wq;
+	int ret = 0;
+	struct circ_buf *xmit = &max->con_xmit;
+
+	init_waitqueue_head(wq);
+	pr_info(PR_FMT "start main thread\n");
+
+	do {
+		wait_event_interruptible(*wq, (atomic_read(&max->irq_pending) ||
+					       atomic_read(&max->con_tx_need) ||
+					     atomic_read(&max->uart_tx_need)) ||
+					     kthread_should_stop());
+		max->mthread_up = 1;
+
+		if (use_irq && atomic_read(&max->irq_pending)) {
+			max3110_con_receive(max);
+			atomic_set(&max->irq_pending, 0);
+		}
+
+		/* First handle console output */
+		if (atomic_read(&max->con_tx_need)) {
+			send_circ_buf(max, xmit);
+			atomic_set(&max->con_tx_need, 0);
+		}
+
+		/* Handle uart output */
+		if (atomic_read(&max->uart_tx_need)) {
+			transmit_char(max);
+			atomic_set(&max->uart_tx_need, 0);
+		}
+		max->mthread_up = 0;
+	} while (!kthread_should_stop());
+
+	return ret;
+}
+
+irqreturn_t static serial_m3110_irq(int irq, void *dev_id)
+{
+	struct uart_max3110 *max = dev_id;
+
+	/* max3110's irq is a falling edge, not level triggered,
+	 * so no need to disable the irq */
+	if (!atomic_read(&max->irq_pending)) {
+		atomic_inc(&max->irq_pending);
+		wake_up_process(max->main_thread);
+	}
+	return IRQ_HANDLED;
+}
+
+/* If don't use RX IRQ, then need a thread to polling read */
+static int max3110_read_thread(void *_max)
+{
+	struct uart_max3110 *max = _max;
+
+	pr_info(PR_FMT "start read thread\n");
+	do {
+		if (!max->mthread_up)
+			max3110_con_receive(max);
+
+		set_current_state(TASK_INTERRUPTIBLE);
+		schedule_timeout(HZ / 20);
+	} while (!kthread_should_stop());
+
+	return 0;
+}
+
+static int serial_m3110_startup(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	u16 config = 0;
+	int ret = 0;
+
+	if (port->line != 0)
+		pr_err(PR_FMT "uart port startup failed\n");
+
+	/* Firstly disable all IRQ and config it to 115200, 8n1 */
+	config = WC_TAG | WC_FIFO_ENABLE
+			| WC_1_STOPBITS
+			| WC_8BIT_WORD
+			| WC_BAUD_DR2;
+	ret = max3110_out(max, config);
+
+	/* As we use thread to handle tx/rx, need set low latency */
+	port->state->port.tty->low_latency = 1;
+
+	if (use_irq) {
+		ret = request_irq(max->irq, serial_m3110_irq,
+					IRQ_TYPE_EDGE_FALLING, "max3110", max);
+		if (ret)
+			return ret;
+
+		/* Enable RX IRQ only */
+		config |= WC_RXA_IRQ_ENABLE;
+		max3110_out(max, config);
+	} else {
+		/* if IRQ is disabled, start a read thread for input data */
+		max->read_thread =
+			kthread_run(max3110_read_thread, max, "max3110_read");
+	}
+
+	max->cur_conf = config;
+	return 0;
+}
+
+static void serial_m3110_shutdown(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	u16 config;
+
+	if (max->read_thread) {
+		kthread_stop(max->read_thread);
+		max->read_thread = NULL;
+	}
+
+	if (use_irq)
+		free_irq(max->irq, max);
+
+	/* Disable interrupts from this port */
+	config = WC_TAG | WC_SW_SHDI;
+	max3110_out(max, config);
+}
+
+static void serial_m3110_release_port(struct uart_port *port)
+{
+}
+
+static int serial_m3110_request_port(struct uart_port *port)
+{
+	return 0;
+}
+
+static void serial_m3110_config_port(struct uart_port *port, int flags)
+{
+	port->type = PORT_MAX3110;
+}
+
+static int
+serial_m3110_verify_port(struct uart_port *port, struct serial_struct *ser)
+{
+	/* We don't want the core code to modify any port params */
+	return -EINVAL;
+}
+
+
+static const char *serial_m3110_type(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	return max->name;
+}
+
+static void
+serial_m3110_set_termios(struct uart_port *port, struct ktermios *termios,
+		       struct ktermios *old)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	unsigned char cval;
+	unsigned int baud, parity = 0;
+	int clk_div = -1;
+	u16 new_conf = max->cur_conf;
+
+	switch (termios->c_cflag & CSIZE) {
+	case CS7:
+		cval = UART_LCR_WLEN7;
+		new_conf |= WC_7BIT_WORD;
+		break;
+	default:
+		/* We only support CS7 & CS8 */
+		termios->c_cflag &= ~CSIZE;
+		termios->c_cflag |= CS8;
+	case CS8:
+		cval = UART_LCR_WLEN8;
+		new_conf |= WC_8BIT_WORD;
+		break;
+	}
+
+	baud = uart_get_baud_rate(port, termios, old, 0, 230400);
+
+	/* First calc the div for 1.8MHZ clock case */
+	switch (baud) {
+	case 300:
+		clk_div = WC_BAUD_DR384;
+		break;
+	case 600:
+		clk_div = WC_BAUD_DR192;
+		break;
+	case 1200:
+		clk_div = WC_BAUD_DR96;
+		break;
+	case 2400:
+		clk_div = WC_BAUD_DR48;
+		break;
+	case 4800:
+		clk_div = WC_BAUD_DR24;
+		break;
+	case 9600:
+		clk_div = WC_BAUD_DR12;
+		break;
+	case 19200:
+		clk_div = WC_BAUD_DR6;
+		break;
+	case 38400:
+		clk_div = WC_BAUD_DR3;
+		break;
+	case 57600:
+		clk_div = WC_BAUD_DR2;
+		break;
+	case 115200:
+		clk_div = WC_BAUD_DR1;
+		break;
+	case 230400:
+		if (max->clock & MAX3110_HIGH_CLK)
+			break;
+	default:
+		/* Pick the previous baud rate */
+		baud = max->baud;
+		clk_div = max->cur_conf & WC_BAUD_DIV_MASK;
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	if (max->clock & MAX3110_HIGH_CLK) {
+		clk_div += 1;
+		/* High clk version max3110 doesn't support B300 */
+		if (baud == 300)
+			baud = 600;
+		if (baud == 230400)
+			clk_div = WC_BAUD_DR1;
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	new_conf = (new_conf & ~WC_BAUD_DIV_MASK) | clk_div;
+
+	if (unlikely(termios->c_cflag & CMSPAR))
+		termios->c_cflag &= ~CMSPAR;
+
+	if (termios->c_cflag & CSTOPB)
+		new_conf |= WC_2_STOPBITS;
+	else
+		new_conf &= ~WC_2_STOPBITS;
+
+	if (termios->c_cflag & PARENB) {
+		new_conf |= WC_PARITY_ENABLE;
+		parity |= UART_LCR_PARITY;
+	} else
+		new_conf &= ~WC_PARITY_ENABLE;
+
+	if (!(termios->c_cflag & PARODD))
+		parity |= UART_LCR_EPAR;
+	max->parity = parity;
+
+	uart_update_timeout(port, termios->c_cflag, baud);
+
+	new_conf |= WC_TAG;
+	if (new_conf != max->cur_conf) {
+		max3110_out(max, new_conf);
+		max->cur_conf = new_conf;
+		max->baud = baud;
+	}
+}
+
+/* Don't handle hw handshaking */
+static unsigned int serial_m3110_get_mctrl(struct uart_port *port)
+{
+	return TIOCM_DSR | TIOCM_CAR | TIOCM_DSR;
+}
+
+static void serial_m3110_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+}
+
+static void serial_m3110_break_ctl(struct uart_port *port, int break_state)
+{
+}
+
+static void serial_m3110_pm(struct uart_port *port, unsigned int state,
+			unsigned int oldstate)
+{
+}
+
+static void serial_m3110_enable_ms(struct uart_port *port)
+{
+}
+
+struct uart_ops serial_m3110_ops = {
+	.tx_empty	= serial_m3110_tx_empty,
+	.set_mctrl	= serial_m3110_set_mctrl,
+	.get_mctrl	= serial_m3110_get_mctrl,
+	.stop_tx	= serial_m3110_stop_tx,
+	.start_tx	= serial_m3110_start_tx,
+	.stop_rx	= serial_m3110_stop_rx,
+	.enable_ms	= serial_m3110_enable_ms,
+	.break_ctl	= serial_m3110_break_ctl,
+	.startup	= serial_m3110_startup,
+	.shutdown	= serial_m3110_shutdown,
+	.set_termios	= serial_m3110_set_termios,
+	.pm		= serial_m3110_pm,
+	.type		= serial_m3110_type,
+	.release_port	= serial_m3110_release_port,
+	.request_port	= serial_m3110_request_port,
+	.config_port	= serial_m3110_config_port,
+	.verify_port	= serial_m3110_verify_port,
+};
+
+static struct uart_driver serial_m3110_reg = {
+	.owner		= THIS_MODULE,
+	.driver_name	= "Maxim 3110",
+	.dev_name	= "ttyS",
+	.major		= TTY_MAJOR,
+	.minor		= 64,
+	.nr		= 1,
+	.cons		= MRST_CONSOLE,
+};
+
+#ifdef CONFIG_PM
+static int serial_m3110_suspend(struct spi_device *spi, pm_message_t state)
+{
+	disable_irq(pmax->irq);
+	uart_suspend_port(&serial_m3110_reg, &pmax->port);
+	max3110_out(pmax, pmax->cur_conf | WC_SW_SHDI);
+	return 0;
+}
+
+static int serial_m3110_resume(struct spi_device *spi)
+{
+	max3110_out(pmax, pmax->cur_conf);
+	uart_resume_port(&serial_m3110_reg, &pmax->port);
+	enable_irq(pmax->irq);
+	return 0;
+}
+#else
+#define serial_m3110_suspend	NULL
+#define serial_m3110_resume	NULL
+#endif
+
+#ifdef CONFIG_MAX3110_DESIGNWARE
+static struct dw_spi_chip spi_uart = {
+	.poll_mode = 1,
+	.enable_dma = 0,
+	.type = SPI_FRF_SPI,
+};
+#endif
+
+static int serial_m3110_probe(struct spi_device *spi)
+{
+	struct uart_max3110 *max;
+	int ret;
+	unsigned char *buffer;
+
+	max = kzalloc(sizeof(*max), GFP_KERNEL);
+	if (!max)
+		return -ENOMEM;
+
+	/* set spi info */
+	spi->mode = SPI_MODE_0;
+	spi->bits_per_word = 16;
+#ifdef CONFIG_MAX3110_DESIGNWARE
+	spi->controller_data = &spi_uart;
+#endif
+	spi_setup(spi);
+
+	max->clock = MAX3110_HIGH_CLK;
+	max->port.type = PORT_MAX3110;
+	max->port.fifosize = 2;		/* only have 16b buffer */
+	max->port.ops = &serial_m3110_ops;
+	max->port.line = 0;
+	max->port.dev = &spi->dev;
+	max->port.uartclk = 115200;
+
+	max->spi = spi;
+	max->name = spi->modalias;	/* use spi name as the name */
+	max->irq = (u16)spi->irq;
+
+	spin_lock_init(&max->lock);
+
+	max->word_7bits = 0;
+	max->parity = 0;
+	max->baud = 0;
+
+	max->cur_conf = 0;
+	atomic_set(&max->irq_pending, 0);
+
+	buffer = (unsigned char *)__get_free_page(GFP_KERNEL);
+	if (!buffer) {
+		ret = -ENOMEM;
+		goto err_get_page;
+	}
+	max->con_xmit.buf = (unsigned char *)buffer;
+	max->con_xmit.head = max->con_xmit.tail = 0;
+
+	max->main_thread = kthread_run(max3110_main_thread,
+					max, "max3110_main");
+	if (IS_ERR(max->main_thread)) {
+		ret = PTR_ERR(max->main_thread);
+		goto err_kthread;
+	}
+
+	pmax = max;
+	/* Give membase a psudo value to pass serial_core's check */
+	max->port.membase = (void *)0xff110000;
+	uart_add_one_port(&serial_m3110_reg, &max->port);
+
+	return 0;
+
+err_kthread:
+	free_page((unsigned long)buffer);
+err_get_page:
+	pmax = NULL;
+	kfree(max);
+	return ret;
+}
+
+static int max3110_remove(struct spi_device *dev)
+{
+	struct uart_max3110 *max = pmax;
+
+	if (!pmax)
+		return 0;
+
+	pmax = NULL;
+	uart_remove_one_port(&serial_m3110_reg, &max->port);
+
+	free_page((unsigned long)max->con_xmit.buf);
+
+	if (max->main_thread)
+		kthread_stop(max->main_thread);
+
+	kfree(max);
+	return 0;
+}
+
+static struct spi_driver uart_max3110_driver = {
+	.driver = {
+			.name	= "spi_max3111",
+			.bus	= &spi_bus_type,
+			.owner	= THIS_MODULE,
+	},
+	.probe		= serial_m3110_probe,
+	.remove		= __devexit_p(max3110_remove),
+	.suspend	= serial_m3110_suspend,
+	.resume		= serial_m3110_resume,
+};
+
+int __init serial_m3110_init(void)
+{
+	int ret = 0;
+
+	ret = uart_register_driver(&serial_m3110_reg);
+	if (ret)
+		return ret;
+
+	ret = spi_register_driver(&uart_max3110_driver);
+	if (ret)
+		uart_unregister_driver(&serial_m3110_reg);
+
+	return ret;
+}
+
+void __exit serial_m3110_exit(void)
+{
+	spi_unregister_driver(&uart_max3110_driver);
+	uart_unregister_driver(&serial_m3110_reg);
+}
+
+module_init(serial_m3110_init);
+module_exit(serial_m3110_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("max3110-uart");
+MODULE_AUTHOR("Feng Tang <feng.tang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>");
diff --git a/drivers/serial/max3110.h b/drivers/serial/max3110.h
new file mode 100644
index 0000000..eae93bd
--- /dev/null
+++ b/drivers/serial/max3110.h
@@ -0,0 +1,59 @@
+#ifndef _MAX3110_HEAD_FILE_
+#define _MAX3110_HEAD_FILE_
+
+#define MAX3110_HIGH_CLK	0x1	/* 3.6864 MHZ */
+#define MAX3110_LOW_CLK		0x0	/* 1.8432 MHZ */
+
+/* status bits for all 4 MAX3110 operate modes */
+#define MAX3110_READ_DATA_AVAILABLE	(1 << 15)
+#define MAX3110_WRITE_BUF_EMPTY		(1 << 14)
+
+#define WC_TAG			(3 << 14)
+#define RC_TAG			(1 << 14)
+#define WD_TAG			(2 << 14)
+#define RD_TAG			(0 << 14)
+
+/* bits def for write configuration */
+#define WC_FIFO_ENABLE_MASK	(1 << 13)
+#define WC_FIFO_ENABLE		(0 << 13)
+
+#define WC_SW_SHDI		(1 << 12)
+
+#define WC_IRQ_MASK		(0xF << 8)
+#define WC_TXE_IRQ_ENABLE	(1 << 11)	/* TX empty irq */
+#define WC_RXA_IRQ_ENABLE	(1 << 10)	/* RX availabe irq */
+#define WC_PAR_HIGH_IRQ_ENABLE	(1 << 9)
+#define WC_REC_ACT_IRQ_ENABLE	(1 << 8)
+
+#define WC_IRDA_ENABLE		(1 << 7)
+
+#define WC_STOPBITS_MASK	(1 << 6)
+#define WC_2_STOPBITS		(1 << 6)
+#define WC_1_STOPBITS		(0 << 6)
+
+#define WC_PARITY_ENABLE_MASK	(1 << 5)
+#define WC_PARITY_ENABLE	(1 << 5)
+
+#define WC_WORDLEN_MASK		(1 << 4)
+#define WC_7BIT_WORD		(1 << 4)
+#define WC_8BIT_WORD		(0 << 4)
+
+#define WC_BAUD_DIV_MASK	(0xF)
+#define WC_BAUD_DR1		(0x0)
+#define WC_BAUD_DR2		(0x1)
+#define WC_BAUD_DR4		(0x2)
+#define WC_BAUD_DR8		(0x3)
+#define WC_BAUD_DR16		(0x4)
+#define WC_BAUD_DR32		(0x5)
+#define WC_BAUD_DR64		(0x6)
+#define WC_BAUD_DR128		(0x7)
+#define WC_BAUD_DR3		(0x8)
+#define WC_BAUD_DR6		(0x9)
+#define WC_BAUD_DR12		(0xA)
+#define WC_BAUD_DR24		(0xB)
+#define WC_BAUD_DR48		(0xC)
+#define WC_BAUD_DR96		(0xD)
+#define WC_BAUD_DR192		(0xE)
+#define WC_BAUD_DR384		(0xF)
+
+#endif
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 8c3dd36..119ba73 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -182,6 +182,9 @@
 /* Aeroflex Gaisler GRLIB APBUART */
 #define PORT_APBUART    90
 
+/* Maxim M3110 */
+#define PORT_MAX3110	91
+
 #ifdef __KERNEL__
 
 #include <linux/compiler.h>
-- 
1.6.3.3

------------------------------------------------------------------------------
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^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v2] serial: spi: add spi-uart driver for Maxim 3110
       [not found] ` <20100208165946.0e4dde83@feng-i7>
@ 2010-02-09  0:20   ` Andrew Morton
  2010-02-09  0:26     ` Grant Likely
  2010-02-09  9:25     ` [RFC][PATCH v2] " Alan Cox
  2010-03-03  2:57   ` [PATCH v5] " Feng Tang
  1 sibling, 2 replies; 35+ messages in thread
From: Andrew Morton @ 2010-02-09  0:20 UTC (permalink / raw)
  To: Feng Tang
  Cc: Greg Kroah-Hartman, David Brownell, Grant Likely, spi-devel-list,
	linux-serial, alan, Greg KH

On Mon, 8 Feb 2010 16:59:46 +0800
Feng Tang <feng.tang@intel.com> wrote:

> Hi All,
> 
> Here is a driver for Maxim 3110 SPI-UART device, please help to review.
> 
> It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
> dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
> provides a console.
> 
> change since v1:
> 	* Address comments from Alan Cox
> 	* Use a "use_irq" module parameter to runtime check whether
> 	  to use IRQ mode
> 	* Add the suspend/resume implementation
> 
> Thanks!
> Feng
> 
> >From 6d14c5d68cdae8d48b6d8a00b6653022f2b100d0 Mon Sep 17 00:00:00 2001
> From: Feng Tang <feng.tang@intel.com>
> Date: Mon, 8 Feb 2010 16:02:59 +0800
> Subject: [PATCH] serial: spi: add spi-uart driver for Maxim 3110
> 
> This is the driver for Max3110 SPI-UART device, which connect
> to host with SPI interface. It supports baud rates from 300 to
> 230400, and supports both polling and IRQ mode, as well as
> providing a console for system use
> 
> Its datasheet could be found here:
> http://datasheets.maxim-ic.com/en/ds/MAX3110E-MAX3111E.pdf
> 

I wonder if this is an "spi" subsystem thing or a "serial" subsystem
thing.  It looks more like a serial driver to me.

> ---
>  drivers/serial/Kconfig      |   12 +
>  drivers/serial/max3110.c    |  848 +++++++++++++++++++++++++++++++++++++++++++
>  drivers/serial/max3110.h    |   59 +++
>  include/linux/serial_core.h |    3 +


> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 9ff47db..f7daf2f 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
>
> ...
>
> +static int use_irq = 1;
> +module_param(use_irq, int, 0444);
> +MODULE_PARM_DESC(use_irq, "Whether using Max3110's IRQ capability");
> +
> +static void receive_chars(struct uart_max3110 *max,
> +				unsigned char *str, int len);
> +static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf);
> +static void max3110_con_receive(struct uart_max3110 *max);
> +
> +int max3110_write_then_read(struct uart_max3110 *max,
> +		const u8 *txbuf, u8 *rxbuf, unsigned len, int always_fast)

The driver has a number of identifiers which have global scope,
apparently unnecessarily.  Please review all such identifiers, see if
they can be made static.

> +{
> +	struct spi_device *spi = max->spi;
> +	struct spi_message	message;
> +	struct spi_transfer	x;
> +	int ret;
> +
> +	spi_message_init(&message);
> +	memset(&x, 0, sizeof x);
> +	x.len = len;
> +	x.tx_buf = txbuf;
> +	x.rx_buf = rxbuf;
> +	spi_message_add_tail(&x, &message);
> +
> +	if (always_fast)
> +		x.speed_hz = spi->max_speed_hz;
> +	else if (max->baud)
> +		x.speed_hz = max->baud;
> +
> +	/* Do the i/o */
> +	ret = spi_sync(spi, &message);
> +	return ret;
> +}
> +
> +/* Write a u16 to the device, and return one u16 read back */
> +int max3110_out(struct uart_max3110 *max, const u16 out)

Another.

> +{
> +	u16 tmp;
> +	int ret;
> +
> +	ret = max3110_write_then_read(max, (u8 *)&out, (u8 *)&tmp, 2, 1);

Something nasty is happening here.  Modifying a u16 via a u8* is to
assume a certain endianness, surely.  Will the driver break when used
on other-endian architectures?

> +	if (ret)
> +		return ret;
> +
> +	/* If some valid data is read back */
> +	if (tmp & MAX3110_READ_DATA_AVAILABLE) {
> +		tmp &= 0xff;
> +		receive_chars(max, (unsigned char *)&tmp, 1);
> +	}
> +
> +	return ret;
> +}
> +
> +#define MAX_READ_LEN	20
> +/*
> + * This is usually used to read data from SPIC RX FIFO, which doesn't
> + * need any delay like flushing character out.
> + * Returns how many valide bytes are read back
> + */
> +static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf)
> +{
> +	u16 out[MAX_READ_LEN], in[MAX_READ_LEN];
> +	u8 *pbuf, valid_str[MAX_READ_LEN];
> +	int i, j, bytelen;
> +
> +	bytelen = len * 2;
> +	memset(out, 0, bytelen);
> +	memset(in, 0, bytelen);
> +
> +	if (max3110_write_then_read(max, (u8 *)out, (u8 *)in, bytelen, 1))
> +		return 0;
>

max3110_write_then_read() can return an error code (from spi_async()). 
But here that error code simply gets lost.  It should be reported to
higher-level code somehow?

> +	/* If caller doesn't provide a buffer, then handle received char */
> +	pbuf = buf ? buf : valid_str;
> +
> +	for (i = 0, j = 0; i < len; i++) {
> +		if (in[i] & MAX3110_READ_DATA_AVAILABLE)
> +			pbuf[j++] = (u8)(in[i] & 0xff);
> +	}
> +
> +	if (j && (pbuf == valid_str))
> +		receive_chars(max, valid_str, j);
> +
> +	return j;
> +}
> +
> +static void serial_m3110_con_putchar(struct uart_port *port, int ch)
> +{
> +	struct uart_max3110 *max =
> +		container_of(port, struct uart_max3110, port);
> +	struct circ_buf *xmit = &max->con_xmit;
> +
> +	if (uart_circ_chars_free(xmit)) {
> +		xmit->buf[xmit->head] = (char)ch;
> +		xmit->head = (xmit->head + 1) & (PAGE_SIZE - 1);
> +	}
> +
> +	if (!atomic_read(&max->con_tx_need)) {
> +		atomic_set(&max->con_tx_need, 1);

This manipulation of con_tx_need looks racy on SMP or preempt.

> +		wake_up_process(max->main_thread);
> +	}
> +}
> +
>
> ...
>
> +#define WORDS_PER_XFER	128
> +static inline void send_circ_buf(struct uart_max3110 *max,
> +				struct circ_buf *xmit)

I suggest that the `inline' be removed.  Modern gcc will take care of
this, if it is of benefit.

> +{
> +	int len, left = 0;
> +	u16 obuf[WORDS_PER_XFER], ibuf[WORDS_PER_XFER];
> +	u8 valid_str[WORDS_PER_XFER];
> +	int i, j;
> +
> +	while (!uart_circ_empty(xmit)) {
> +		left = uart_circ_chars_pending(xmit);
> +		while (left) {
> +			len = (left >= WORDS_PER_XFER) ? WORDS_PER_XFER : left;

Use

			len = min(left, WORDS_PER_XFER);

> +
> +			memset(obuf, 0, len * 2);
> +			memset(ibuf, 0, len * 2);

Using

			memset(obuf, 0, sizeof(obuf));

would remove the assumptions that a) obuf is of type u16 and b) that
sizeof(u16)==2.


> +			for (i = 0; i < len; i++) {
> +				obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG;
> +				xmit->tail = (xmit->tail + 1) &
> +						(UART_XMIT_SIZE - 1);

Could this driver use include/linux/kfifo.h, rather than open-coding it?

> +			}
> +			max3110_write_then_read(max, (u8 *)obuf,
> +						(u8 *)ibuf, len * 2, 0);

Error codes are ignored.

> +			for (i = 0, j = 0; i < len; i++) {
> +				if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
> +					valid_str[j++] = (u8)(ibuf[i] & 0xff);
> +			}
> +
> +			if (j)
> +				receive_chars(max, valid_str, j);
> +
> +			max->port.icount.tx += len;
> +			left -= len;
> +		}
> +	}
> +}
> +
>
> ...
>
> +static void max3110_con_receive(struct uart_max3110 *max)
> +{
> +	int loop = 1, num, total = 0;
> +	u8 recv_buf[512], *pbuf;
> +
> +	pbuf = recv_buf;
> +	do {
> +		/* 3110 RX buffer is 8 words */
> +		num = max3110_read_multi(max, 8, pbuf);
> +
> +		if (num) {
> +			loop = 5;
> +			pbuf += num;
> +			total += num;
> +
> +			if (total >= 500) {
> +				receive_chars(max, recv_buf, total);
> +				pbuf = recv_buf;
> +				total = 0;
> +			}
> +		}

hm, what do all the magic numbers do?  Some comments explaining them
would be good.

> +	} while (--loop);
> +
> +	if (total)
> +		receive_chars(max, recv_buf, total);
> +}
> +
> +static int max3110_main_thread(void *_max)
> +{
> +	struct uart_max3110 *max = _max;
> +	wait_queue_head_t *wq = &max->wq;
> +	int ret = 0;
> +	struct circ_buf *xmit = &max->con_xmit;
> +
> +	init_waitqueue_head(wq);
> +	pr_info(PR_FMT "start main thread\n");
> +
> +	do {
> +		wait_event_interruptible(*wq, (atomic_read(&max->irq_pending) ||
> +					       atomic_read(&max->con_tx_need) ||
> +					     atomic_read(&max->uart_tx_need)) ||
> +					     kthread_should_stop());
> +		max->mthread_up = 1;
> +
> +		if (use_irq && atomic_read(&max->irq_pending)) {
> +			max3110_con_receive(max);
> +			atomic_set(&max->irq_pending, 0);
> +		}

The manipulation of irq_pending looks racy.  Perhaps something list
test_and_clear_bit() would fix that.


> +		/* First handle console output */
> +		if (atomic_read(&max->con_tx_need)) {
> +			send_circ_buf(max, xmit);
> +			atomic_set(&max->con_tx_need, 0);
> +		}

Ditto.

> +		/* Handle uart output */
> +		if (atomic_read(&max->uart_tx_need)) {
> +			transmit_char(max);
> +			atomic_set(&max->uart_tx_need, 0);
> +		}

Ditto.

> +		max->mthread_up = 0;
> +	} while (!kthread_should_stop());
> +
> +	return ret;
> +}
> +
> +irqreturn_t static serial_m3110_irq(int irq, void *dev_id)

`static irqreturn_t' would be more typical.

> +{
> +	struct uart_max3110 *max = dev_id;
> +
> +	/* max3110's irq is a falling edge, not level triggered,
> +	 * so no need to disable the irq */
> +	if (!atomic_read(&max->irq_pending)) {
> +		atomic_inc(&max->irq_pending);

racy?

> +		wake_up_process(max->main_thread);
> +	}
> +	return IRQ_HANDLED;
> +}
> +
> +/* If don't use RX IRQ, then need a thread to polling read */
> +static int max3110_read_thread(void *_max)
> +{
> +	struct uart_max3110 *max = _max;
> +
> +	pr_info(PR_FMT "start read thread\n");
> +	do {
> +		if (!max->mthread_up)
> +			max3110_con_receive(max);
> +
> +		set_current_state(TASK_INTERRUPTIBLE);
> +		schedule_timeout(HZ / 20);

Use schedule_timeout_interruptible()

> +	} while (!kthread_should_stop());
> +
> +	return 0;
> +}
> +
> +static int serial_m3110_startup(struct uart_port *port)
> +{
> +	struct uart_max3110 *max =
> +		container_of(port, struct uart_max3110, port);
> +	u16 config = 0;
> +	int ret = 0;
> +
> +	if (port->line != 0)
> +		pr_err(PR_FMT "uart port startup failed\n");
> +
> +	/* Firstly disable all IRQ and config it to 115200, 8n1 */
> +	config = WC_TAG | WC_FIFO_ENABLE
> +			| WC_1_STOPBITS
> +			| WC_8BIT_WORD
> +			| WC_BAUD_DR2;
> +	ret = max3110_out(max, config);
> +
> +	/* As we use thread to handle tx/rx, need set low latency */
> +	port->state->port.tty->low_latency = 1;
> +
> +	if (use_irq) {
> +		ret = request_irq(max->irq, serial_m3110_irq,
> +					IRQ_TYPE_EDGE_FALLING, "max3110", max);
> +		if (ret)
> +			return ret;
> +
> +		/* Enable RX IRQ only */
> +		config |= WC_RXA_IRQ_ENABLE;
> +		max3110_out(max, config);
> +	} else {
> +		/* if IRQ is disabled, start a read thread for input data */
> +		max->read_thread =
> +			kthread_run(max3110_read_thread, max, "max3110_read");

Check for kthread_run() failure?

> +	}
> +
> +	max->cur_conf = config;
> +	return 0;
> +}
> +
>
> ...
>
> +static int serial_m3110_probe(struct spi_device *spi)

Should this be __init or __devinit?

> +{
> +	struct uart_max3110 *max;
> +	int ret;
> +	unsigned char *buffer;
> +
> +	max = kzalloc(sizeof(*max), GFP_KERNEL);
> +	if (!max)
> +		return -ENOMEM;
> +
> +	/* set spi info */
> +	spi->mode = SPI_MODE_0;
> +	spi->bits_per_word = 16;
> +#ifdef CONFIG_MAX3110_DESIGNWARE
> +	spi->controller_data = &spi_uart;
> +#endif
> +	spi_setup(spi);
> +
> +	max->clock = MAX3110_HIGH_CLK;
> +	max->port.type = PORT_MAX3110;
> +	max->port.fifosize = 2;		/* only have 16b buffer */
> +	max->port.ops = &serial_m3110_ops;
> +	max->port.line = 0;
> +	max->port.dev = &spi->dev;
> +	max->port.uartclk = 115200;
> +
> +	max->spi = spi;
> +	max->name = spi->modalias;	/* use spi name as the name */
> +	max->irq = (u16)spi->irq;
> +
> +	spin_lock_init(&max->lock);
> +
> +	max->word_7bits = 0;
> +	max->parity = 0;
> +	max->baud = 0;
> +
> +	max->cur_conf = 0;
> +	atomic_set(&max->irq_pending, 0);
> +
> +	buffer = (unsigned char *)__get_free_page(GFP_KERNEL);
> +	if (!buffer) {
> +		ret = -ENOMEM;
> +		goto err_get_page;
> +	}
> +	max->con_xmit.buf = (unsigned char *)buffer;
> +	max->con_xmit.head = max->con_xmit.tail = 0;
> +
> +	max->main_thread = kthread_run(max3110_main_thread,
> +					max, "max3110_main");
> +	if (IS_ERR(max->main_thread)) {
> +		ret = PTR_ERR(max->main_thread);
> +		goto err_kthread;
> +	}
> +
> +	pmax = max;
> +	/* Give membase a psudo value to pass serial_core's check */
> +	max->port.membase = (void *)0xff110000;
> +	uart_add_one_port(&serial_m3110_reg, &max->port);
> +
> +	return 0;
> +
> +err_kthread:
> +	free_page((unsigned long)buffer);
> +err_get_page:
> +	pmax = NULL;
> +	kfree(max);
> +	return ret;
> +}
> +
>
> ...
>
> +static struct spi_driver uart_max3110_driver = {
> +	.driver = {
> +			.name	= "spi_max3111",
> +			.bus	= &spi_bus_type,
> +			.owner	= THIS_MODULE,
> +	},
> +	.probe		= serial_m3110_probe,
> +	.remove		= __devexit_p(max3110_remove),
> +	.suspend	= serial_m3110_suspend,
> +	.resume		= serial_m3110_resume,
> +};
> +
> +int __init serial_m3110_init(void)

static?

> +{
> +	int ret = 0;
> +
> +	ret = uart_register_driver(&serial_m3110_reg);
> +	if (ret)
> +		return ret;
> +
> +	ret = spi_register_driver(&uart_max3110_driver);
> +	if (ret)
> +		uart_unregister_driver(&serial_m3110_reg);
> +
> +	return ret;
> +}
> +
> +void __exit serial_m3110_exit(void)

static?

> +{
> +	spi_unregister_driver(&uart_max3110_driver);
> +	uart_unregister_driver(&serial_m3110_reg);
> +}
> +
>
> ...
>


^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v2] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-09  0:20   ` Andrew Morton
@ 2010-02-09  0:26     ` Grant Likely
  2010-02-09  1:36       ` Feng Tang
  2010-02-09  9:25     ` [RFC][PATCH v2] " Alan Cox
  1 sibling, 1 reply; 35+ messages in thread
From: Grant Likely @ 2010-02-09  0:26 UTC (permalink / raw)
  To: Andrew Morton
  Cc: Feng Tang, Greg Kroah-Hartman, David Brownell, spi-devel-list,
	linux-serial, alan, Greg KH

On Mon, Feb 8, 2010 at 5:20 PM, Andrew Morton <akpm@linux-foundation.org> wrote:
> On Mon, 8 Feb 2010 16:59:46 +0800
> Feng Tang <feng.tang@intel.com> wrote:
>
>> Hi All,
>>
>> Here is a driver for Maxim 3110 SPI-UART device, please help to review.
>>
>> It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
>> dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
>> provides a console.
>>
>> change since v1:
>>       * Address comments from Alan Cox
>>       * Use a "use_irq" module parameter to runtime check whether
>>         to use IRQ mode
>>       * Add the suspend/resume implementation
>>
>> Thanks!
>> Feng
>>
>> >From 6d14c5d68cdae8d48b6d8a00b6653022f2b100d0 Mon Sep 17 00:00:00 2001
>> From: Feng Tang <feng.tang@intel.com>
>> Date: Mon, 8 Feb 2010 16:02:59 +0800
>> Subject: [PATCH] serial: spi: add spi-uart driver for Maxim 3110
>>
>> This is the driver for Max3110 SPI-UART device, which connect
>> to host with SPI interface. It supports baud rates from 300 to
>> 230400, and supports both polling and IRQ mode, as well as
>> providing a console for system use
>>
>> Its datasheet could be found here:
>> http://datasheets.maxim-ic.com/en/ds/MAX3110E-MAX3111E.pdf
>>
>
> I wonder if this is an "spi" subsystem thing or a "serial" subsystem
> thing.  It looks more like a serial driver to me.

I'm assuming serial; and hence I haven't picked it up into my tree.

g.
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^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v2] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-09  0:26     ` Grant Likely
@ 2010-02-09  1:36       ` Feng Tang
  2010-02-17 22:58         ` Greg KH
  0 siblings, 1 reply; 35+ messages in thread
From: Feng Tang @ 2010-02-09  1:36 UTC (permalink / raw)
  To: Grant Likely
  Cc: Andrew Morton, Greg Kroah-Hartman, David Brownell,
	spi-devel-list, linux-serial, alan, Greg KH

On Tue, 9 Feb 2010 08:26:35 +0800
Grant Likely <grant.likely@secretlab.ca> wrote:

> On Mon, Feb 8, 2010 at 5:20 PM, Andrew Morton
> <akpm@linux-foundation.org> wrote:
> > On Mon, 8 Feb 2010 16:59:46 +0800
> > Feng Tang <feng.tang@intel.com> wrote:
> >
> >> Hi All,
> >>
> >> Here is a driver for Maxim 3110 SPI-UART device, please help to
> >> review.
> >>
> >> It has been validated with Designware SPI controller (drivers/spi:
> >> dw_spi.c & dw_spi_pci.c). It supports polling and IRQ mode,
> >> supports batch read, and provides a console.
> >>

> > I wonder if this is an "spi" subsystem thing or a "serial" subsystem
> > thing.  It looks more like a serial driver to me.
> 
> I'm assuming serial; and hence I haven't picked it up into my tree.
> 
> g.

Yes, it's more related to serial stuff, and thus I put them into
drivers/serial

Thanks,
Feng
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^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v2] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-09  0:20   ` Andrew Morton
  2010-02-09  0:26     ` Grant Likely
@ 2010-02-09  9:25     ` Alan Cox
  1 sibling, 0 replies; 35+ messages in thread
From: Alan Cox @ 2010-02-09  9:25 UTC (permalink / raw)
  To: Andrew Morton
  Cc: Feng Tang, Greg Kroah-Hartman, David Brownell, Grant Likely,
	spi-devel-list, linux-serial, Greg KH

> > +			for (i = 0; i < len; i++) {
> > +				obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG;
> > +				xmit->tail = (xmit->tail + 1) &
> > +						(UART_XMIT_SIZE - 1);
> 
> Could this driver use include/linux/kfifo.h, rather than open-coding it?

The circ buffer stuff comes from the serial layer. The whole serial layer
wants switching to kfifo (as and when we know why the kfifo changes seem
to have broken USB serial) but the driver can't do that itself and use
the serial core code until then.

(Actually most of the serial_core code wants a rewrite but having had a
couple of goes at doing it I've not figured out any way to do it without
simply breaking all sorts of embedded platform serial drivers that need
specific hardware to fix).

> > +			}
> > +			max3110_write_then_read(max, (u8 *)obuf,
> > +						(u8 *)ibuf, len * 2, 0);
> 
> Error codes are ignored.

The drivers/serial midlayer has no provision for reporting them.

Alan

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v2] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-09  1:36       ` Feng Tang
@ 2010-02-17 22:58         ` Greg KH
  2010-02-24  5:11           ` [RFC][PATCH v3] " Feng Tang
  0 siblings, 1 reply; 35+ messages in thread
From: Greg KH @ 2010-02-17 22:58 UTC (permalink / raw)
  To: Feng Tang
  Cc: David Brownell, Greg Kroah-Hartman,
	linux-serial-u79uwXL29TY76Z2rM5mHXA, spi-devel-list,
	Andrew Morton, alan-qBU/x9rampVanCEyBjwyrvXRex20P6io

On Tue, Feb 09, 2010 at 09:36:44AM +0800, Feng Tang wrote:
> On Tue, 9 Feb 2010 08:26:35 +0800
> Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> wrote:
> 
> > On Mon, Feb 8, 2010 at 5:20 PM, Andrew Morton
> > <akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org> wrote:
> > > On Mon, 8 Feb 2010 16:59:46 +0800
> > > Feng Tang <feng.tang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> wrote:
> > >
> > >> Hi All,
> > >>
> > >> Here is a driver for Maxim 3110 SPI-UART device, please help to
> > >> review.
> > >>
> > >> It has been validated with Designware SPI controller (drivers/spi:
> > >> dw_spi.c & dw_spi_pci.c). It supports polling and IRQ mode,
> > >> supports batch read, and provides a console.
> > >>
> 
> > > I wonder if this is an "spi" subsystem thing or a "serial" subsystem
> > > thing.  It looks more like a serial driver to me.
> > 
> > I'm assuming serial; and hence I haven't picked it up into my tree.
> > 
> > g.
> 
> Yes, it's more related to serial stuff, and thus I put them into
> drivers/serial

That's fine.  Care to address Andrew's issues and resend the patch?

thanks,

greg k-h

------------------------------------------------------------------------------
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^ permalink raw reply	[flat|nested] 35+ messages in thread

* [RFC][PATCH v3] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-17 22:58         ` Greg KH
@ 2010-02-24  5:11           ` Feng Tang
  2010-02-24 10:44             ` Alan Cox
                               ` (4 more replies)
  0 siblings, 5 replies; 35+ messages in thread
From: Feng Tang @ 2010-02-24  5:11 UTC (permalink / raw)
  To: Greg KH
  Cc: Grant Likely, Andrew Morton, Greg Kroah-Hartman, David Brownell,
	spi-devel-list, linux-serial, alan

Hi All,

Here is a driver for Maxim 3110 SPI-UART device, please help to review.

It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
provides a console.

change log:
 since v2:
	* Address comments from Andrew Morton
	* Use test/set_bit to avoid race condition for SMP/preempt case
	* Fix bug related with endian order

 since v1:
        * Address comments from Alan Cox
        * Use a "use_irq" module parameter to runtime check whether
          to use IRQ mode
        * Add the suspend/resume implementation

Thanks!
Feng

>From 93455ea6fbf0bfb6494b88ea83296f26f29f7eee Mon Sep 17 00:00:00 2001
From: Feng Tang <feng.tang@intel.com>
Date: Tue, 23 Feb 2010 17:52:00 +0800
Subject: [PATCH] serial: spi: add spi-uart driver for Maxim 3110

This is the driver for Max3110 SPI-UART device, which connect
to host with SPI interface. It supports baud rates from 300 to
230400, and supports both polling and IRQ mode, as well as
providing a console for system use

Its datasheet could be found here:
http://datasheets.maxim-ic.com/en/ds/MAX3110E-MAX3111E.pdf

Signed-off-by: Feng Tang <feng.tang@intel.com>
---
 drivers/serial/Kconfig      |   12 +
 drivers/serial/max3110.c    |  879 +++++++++++++++++++++++++++++++++++++++++++
 drivers/serial/max3110.h    |   60 +++
 include/linux/serial_core.h |    3 +
 4 files changed, 954 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/max3110.c
 create mode 100644 drivers/serial/max3110.h

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 9ff47db..f7daf2f 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -688,6 +688,18 @@ config SERIAL_SA1100_CONSOLE
 	  your boot loader (lilo or loadlin) about how to pass options to the
 	  kernel at boot time.)
 
+config SERIAL_MAX3110
+	tristate "SPI UART driver for Max3110"
+	select SERIAL_CORE
+	select SERIAL_CORE_CONSOLE
+	help
+	  This is the UART protocol driver for MAX3110 device
+
+config MAX3110_DESIGNWARE
+	boolean "Enable Max3110 to work with Designware controller"
+	default y
+	depends on SERIAL_MAX3110
+
 config SERIAL_BFIN
 	tristate "Blackfin serial port support"
 	depends on BLACKFIN
diff --git a/drivers/serial/max3110.c b/drivers/serial/max3110.c
new file mode 100644
index 0000000..e8c44fa
--- /dev/null
+++ b/drivers/serial/max3110.c
@@ -0,0 +1,879 @@
+/*
+ * max3110.c - spi uart protocol driver for Maxim 3110
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+/*
+ * Note:
+ * * From Max3110 spec, the Rx FIFO has 8 words, while the Tx FIFO only has
+ *   1 word. If SPI master controller doesn't support sclk frequency change,
+ *   then the char need be sent out one by one with some delay
+ *
+ * * Currently only RX availabe interrrupt is used
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/platform_device.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+
+#include <linux/kthread.h>
+#include <linux/delay.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/dw_spi.h>
+
+#include "max3110.h"
+
+#define PR_FMT	"max3110: "
+
+struct uart_max3110 {
+	struct uart_port port;
+	struct spi_device *spi;
+	char *name;
+
+	wait_queue_head_t wq;
+	struct task_struct *main_thread;
+	struct task_struct *read_thread;
+	spinlock_t lock;
+
+	u32 baud;
+	u16 cur_conf;
+	u8 clock;
+	u8 parity, word_7bits;
+	u16 irq;
+
+	/* bit map for UART status */
+	unsigned long flags;
+#define M3110_CON_TX_NEED	0
+#define M3110_UART_TX_NEED	1
+#define M3110_IRQ_PENDING	2
+	unsigned long mthread_up;
+
+	/* console buffer */
+	struct circ_buf con_xmit;
+};
+
+static struct uart_max3110 *pmax;
+
+static int use_irq = 1;
+module_param(use_irq, int, 0444);
+MODULE_PARM_DESC(use_irq, "Whether using Max3110's IRQ capability");
+
+static void receive_chars(struct uart_max3110 *max,
+				unsigned char *str, int len);
+static int max3110_read_multi(struct uart_max3110 *max, u8 *buf);
+static void max3110_con_receive(struct uart_max3110 *max);
+
+static int max3110_write_then_read(struct uart_max3110 *max,
+		const void *txbuf, void *rxbuf, unsigned len, int always_fast)
+{
+	struct spi_device *spi = max->spi;
+	struct spi_message	message;
+	struct spi_transfer	x;
+	int ret;
+
+	spi_message_init(&message);
+	memset(&x, 0, sizeof x);
+	x.len = len;
+	x.tx_buf = txbuf;
+	x.rx_buf = rxbuf;
+	spi_message_add_tail(&x, &message);
+
+	if (always_fast)
+		x.speed_hz = spi->max_speed_hz;
+	else if (max->baud)
+		x.speed_hz = max->baud;
+
+	/* Do the i/o */
+	ret = spi_sync(spi, &message);
+	return ret;
+}
+
+/* Write a u16 to the device, and return one u16 read back */
+static int max3110_out(struct uart_max3110 *max, const u16 out)
+{
+	u16 tmp;
+	u8  ch;
+	int ret;
+
+	ret = max3110_write_then_read(max, &out, &tmp, 2, 1);
+	if (ret) {
+		pr_warning(PR_FMT "%s(): get err msg %d when sending 0x%x\n",
+				__func__, ret, out);
+		return ret;
+	}
+
+	/* If some valid data is read back */
+	if (tmp & MAX3110_READ_DATA_AVAILABLE) {
+		ch = tmp & 0xff;
+		receive_chars(max, &ch, 1);
+	}
+
+	return ret;
+}
+
+/*
+ * This is usually used to read data from SPIC RX FIFO, which doesn't
+ * need any delay like flushing character out.
+ *
+ * Return how many valide bytes are read back
+ */
+static int max3110_read_multi(struct uart_max3110 *max, u8 *buf)
+{
+	u16 obuf[M3110_RX_FIFO_DEPTH], ibuf[M3110_RX_FIFO_DEPTH];
+	u8 *pbuf, valid_str[M3110_RX_FIFO_DEPTH];
+	int i, j;
+
+	memset(obuf, 0, sizeof(obuf));
+	memset(obuf, 0, sizeof(ibuf));
+
+	if (max3110_write_then_read(max, obuf, ibuf,
+				M3110_RX_FIFO_DEPTH * 2, 1))
+		return 0;
+
+	/* If caller doesn't provide a buffer, then handle received char */
+	pbuf = buf ? buf : valid_str;
+
+	for (i = 0, j = 0; i < M3110_RX_FIFO_DEPTH; i++) {
+		if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
+			pbuf[j++] = ibuf[i] & 0xff;
+	}
+
+	if (j && (pbuf == valid_str))
+		receive_chars(max, valid_str, j);
+
+	return j;
+}
+
+static void serial_m3110_con_putchar(struct uart_port *port, int ch)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	struct circ_buf *xmit = &max->con_xmit;
+
+	if (uart_circ_chars_free(xmit)) {
+		xmit->buf[xmit->head] = (char)ch;
+		xmit->head = (xmit->head + 1) & (PAGE_SIZE - 1);
+	}
+
+	set_bit(M3110_CON_TX_NEED, &max->flags);
+	if (!test_bit(0, &max->mthread_up))
+		wake_up_process(max->main_thread);
+}
+
+/*
+ * Print a string to the serial port trying not to disturb
+ * any possible real use of the port...
+ *
+ *	The console_lock must be held when we get here.
+ */
+static void serial_m3110_con_write(struct console *co,
+				const char *s, unsigned int count)
+{
+	if (!pmax)
+		return;
+
+	uart_console_write(&pmax->port, s, count, serial_m3110_con_putchar);
+}
+
+static int __init
+serial_m3110_con_setup(struct console *co, char *options)
+{
+	struct uart_max3110 *max = pmax;
+	int baud = 115200;
+	int bits = 8;
+	int parity = 'n';
+	int flow = 'n';
+
+	pr_info(PR_FMT "setting up console\n");
+
+	if (!max) {
+		pr_err(PR_FMT "pmax is NULL, return");
+		return -ENODEV;
+	}
+
+	if (options)
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+	return uart_set_options(&max->port, co, baud, parity, bits, flow);
+}
+
+static struct tty_driver *serial_m3110_con_device(struct console *co,
+							int *index)
+{
+	struct uart_driver *p = co->data;
+	*index = co->index;
+	return p->tty_driver;
+}
+
+static struct uart_driver serial_m3110_reg;
+static struct console serial_m3110_console = {
+	.name		= "ttyS",
+	.write		= serial_m3110_con_write,
+	.device		= serial_m3110_con_device,
+	.setup		= serial_m3110_con_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+	.data		= &serial_m3110_reg,
+};
+
+#define MRST_CONSOLE	(&serial_m3110_console)
+
+static unsigned int serial_m3110_tx_empty(struct uart_port *port)
+{
+	return 1;
+}
+
+static void serial_m3110_stop_tx(struct uart_port *port)
+{
+	return;
+}
+
+static void serial_m3110_stop_rx(struct uart_port *port)
+{
+	return;
+}
+
+#define WORDS_PER_XFER	128
+static void send_circ_buf(struct uart_max3110 *max,
+				struct circ_buf *xmit)
+{
+	int len, blen, left = 0;
+	u16 obuf[WORDS_PER_XFER], ibuf[WORDS_PER_XFER];
+	u8 valid_str[WORDS_PER_XFER];
+	int i, j;
+	int ret = 0;
+
+	while (!uart_circ_empty(xmit)) {
+		left = uart_circ_chars_pending(xmit);
+		while (left) {
+			len = min(left, WORDS_PER_XFER);
+			blen = len * sizeof(u16);
+			memset(obuf, 0, blen);
+			memset(ibuf, 0, blen);
+
+			for (i = 0; i < len; i++) {
+				obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG;
+				xmit->tail = (xmit->tail + 1) &
+						(UART_XMIT_SIZE - 1);
+			}
+
+			/* Fail to send msg to console is not very critical */
+			ret = max3110_write_then_read(max, obuf, ibuf, blen, 0);
+			if (ret)
+				pr_warning(PR_FMT "%s(): get err msg %d\n",
+						__func__, ret);
+
+			for (i = 0, j = 0; i < len; i++) {
+				if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
+					valid_str[j++] = ibuf[i] & 0xff;
+			}
+
+			if (j)
+				receive_chars(max, valid_str, j);
+
+			max->port.icount.tx += len;
+			left -= len;
+		}
+	}
+}
+
+static void transmit_char(struct uart_max3110 *max)
+{
+	struct uart_port *port = &max->port;
+	struct circ_buf *xmit = &port->state->xmit;
+
+	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
+		return;
+
+	send_circ_buf(max, xmit);
+
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+		uart_write_wakeup(port);
+}
+
+/*
+ * This will be called by uart_write() and tty_write, can't
+ * go to sleep
+ */
+static void serial_m3110_start_tx(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+
+	set_bit(M3110_UART_TX_NEED, &max->flags);
+	if (!test_bit(0, &max->mthread_up))
+		wake_up_process(max->main_thread);
+}
+
+static void receive_chars(struct uart_max3110 *max, unsigned char *str, int len)
+{
+	struct uart_port *port = &max->port;
+	struct tty_struct *tty;
+	int usable;
+
+	/* If uart is not opened, just return */
+	if (!port->state)
+		return;
+
+	tty = port->state->port.tty;
+	if (!tty)
+		return;
+
+	while (len) {
+		usable = tty_buffer_request_room(tty, len);
+		if (usable) {
+			tty_insert_flip_string(tty, str, usable);
+			str += usable;
+			port->icount.rx += usable;
+		}
+		len -= usable;
+	}
+	tty_flip_buffer_push(tty);
+}
+
+/*
+ * This routine will be used in read_thread or RX IRQ handling,
+ * it will first do one round buffer read(8 words), if there is some
+ * valid RX data, will try to read 5 more rounds till all data
+ * is read out.
+ *
+ * Use stack space as data buffer to save some system load, and chose
+ * 504 Btyes as a threadhold to do a bulk push to upper tty layer when
+ * receiving bulk data, a much bigger buffer may cause stack overflow
+ */
+static void max3110_con_receive(struct uart_max3110 *max)
+{
+	int loop = 1, num, total = 0;
+	u8 recv_buf[512], *pbuf;
+
+	pbuf = recv_buf;
+	do {
+		num = max3110_read_multi(max, pbuf);
+
+		if (num) {
+			loop = 5;
+			pbuf += num;
+			total += num;
+
+			if (total >= 504) {
+				receive_chars(max, recv_buf, total);
+				pbuf = recv_buf;
+				total = 0;
+			}
+		}
+	} while (--loop);
+
+	if (total)
+		receive_chars(max, recv_buf, total);
+}
+
+static int max3110_main_thread(void *_max)
+{
+	struct uart_max3110 *max = _max;
+	wait_queue_head_t *wq = &max->wq;
+	int ret = 0;
+	struct circ_buf *xmit = &max->con_xmit;
+
+	init_waitqueue_head(wq);
+	pr_info(PR_FMT "start main thread\n");
+
+	do {
+		wait_event_interruptible(*wq,
+				max->flags || kthread_should_stop());
+		set_bit(0, &max->mthread_up);
+
+		if (use_irq && test_bit(M3110_IRQ_PENDING, &max->flags)) {
+			max3110_con_receive(max);
+			clear_bit(M3110_IRQ_PENDING, &max->flags);
+		}
+
+		/* First handle console output */
+		if (test_bit(M3110_CON_TX_NEED, &max->flags)) {
+			send_circ_buf(max, xmit);
+			clear_bit(M3110_CON_TX_NEED, &max->flags);
+		}
+
+		/* Handle uart output */
+		if (test_bit(M3110_UART_TX_NEED, &max->flags)) {
+			transmit_char(max);
+			clear_bit(M3110_UART_TX_NEED, &max->flags);
+		}
+		clear_bit(0, &max->mthread_up);
+	} while (!kthread_should_stop());
+
+	return ret;
+}
+
+static irqreturn_t serial_m3110_irq(int irq, void *dev_id)
+{
+	struct uart_max3110 *max = dev_id;
+
+	/* max3110's irq is a falling edge, not level triggered,
+	 * so no need to disable the irq */
+	set_bit(M3110_IRQ_PENDING, &max->flags);
+
+	if (!test_bit(0, &max->mthread_up))
+		wake_up_process(max->main_thread);
+
+	return IRQ_HANDLED;
+}
+
+/* If don't use RX IRQ, then need a thread to polling read */
+static int max3110_read_thread(void *_max)
+{
+	struct uart_max3110 *max = _max;
+
+	pr_info(PR_FMT "start read thread\n");
+	do {
+		if (!test_bit(0, &max->mthread_up))
+			max3110_con_receive(max);
+
+		set_current_state(TASK_INTERRUPTIBLE);
+		schedule_timeout_interruptible(HZ / 20);
+	} while (!kthread_should_stop());
+
+	return 0;
+}
+
+static int serial_m3110_startup(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	u16 config = 0;
+	int ret = 0;
+
+	if (port->line != 0) {
+		pr_err(PR_FMT "uart port startup failed\n");
+		return -1;
+	}
+
+	/* Disable all IRQ and config it to 115200, 8n1 */
+	config = WC_TAG | WC_FIFO_ENABLE
+			| WC_1_STOPBITS
+			| WC_8BIT_WORD
+			| WC_BAUD_DR2;
+
+	/* As we use thread to handle tx/rx, need set low latency */
+	port->state->port.tty->low_latency = 1;
+
+	if (use_irq) {
+		ret = request_irq(max->irq, serial_m3110_irq,
+					IRQ_TYPE_EDGE_FALLING, "max3110", max);
+		if (ret)
+			return ret;
+
+		/* Enable RX IRQ only */
+		config |= WC_RXA_IRQ_ENABLE;
+	} else {
+		/* If IRQ is disabled, start a read thread for input data */
+		max->read_thread =
+			kthread_run(max3110_read_thread, max, "max3110_read");
+		if (IS_ERR(max->read_thread)) {
+			ret = PTR_ERR(max->read_thread);
+			max->read_thread = 0;
+			pr_err(PR_FMT "Can't create read thread!");
+			return ret;
+		}
+	}
+
+	ret = max3110_out(max, config);
+	if (ret) {
+		if (use_irq)
+			free_irq(max->irq, max);
+		else
+			kthread_stop(max->read_thread);
+
+		return ret;
+	}
+
+	max->cur_conf = config;
+	return 0;
+}
+
+static void serial_m3110_shutdown(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	u16 config;
+
+	if (max->read_thread) {
+		kthread_stop(max->read_thread);
+		max->read_thread = NULL;
+	}
+
+	if (use_irq)
+		free_irq(max->irq, max);
+
+	/* Disable interrupts from this port */
+	config = WC_TAG | WC_SW_SHDI;
+	max3110_out(max, config);
+}
+
+static void serial_m3110_release_port(struct uart_port *port)
+{
+}
+
+static int serial_m3110_request_port(struct uart_port *port)
+{
+	return 0;
+}
+
+static void serial_m3110_config_port(struct uart_port *port, int flags)
+{
+	port->type = PORT_MAX3110;
+}
+
+static int
+serial_m3110_verify_port(struct uart_port *port, struct serial_struct *ser)
+{
+	/* We don't want the core code to modify any port params */
+	return -EINVAL;
+}
+
+
+static const char *serial_m3110_type(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	return max->name;
+}
+
+static void
+serial_m3110_set_termios(struct uart_port *port, struct ktermios *termios,
+		       struct ktermios *old)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	unsigned char cval;
+	unsigned int baud, parity = 0;
+	int clk_div = -1;
+	u16 new_conf = max->cur_conf;
+
+	switch (termios->c_cflag & CSIZE) {
+	case CS7:
+		cval = UART_LCR_WLEN7;
+		new_conf |= WC_7BIT_WORD;
+		break;
+	default:
+		/* We only support CS7 & CS8 */
+		termios->c_cflag &= ~CSIZE;
+		termios->c_cflag |= CS8;
+	case CS8:
+		cval = UART_LCR_WLEN8;
+		new_conf |= WC_8BIT_WORD;
+		break;
+	}
+
+	baud = uart_get_baud_rate(port, termios, old, 0, 230400);
+
+	/* First calc the div for 1.8MHZ clock case */
+	switch (baud) {
+	case 300:
+		clk_div = WC_BAUD_DR384;
+		break;
+	case 600:
+		clk_div = WC_BAUD_DR192;
+		break;
+	case 1200:
+		clk_div = WC_BAUD_DR96;
+		break;
+	case 2400:
+		clk_div = WC_BAUD_DR48;
+		break;
+	case 4800:
+		clk_div = WC_BAUD_DR24;
+		break;
+	case 9600:
+		clk_div = WC_BAUD_DR12;
+		break;
+	case 19200:
+		clk_div = WC_BAUD_DR6;
+		break;
+	case 38400:
+		clk_div = WC_BAUD_DR3;
+		break;
+	case 57600:
+		clk_div = WC_BAUD_DR2;
+		break;
+	case 115200:
+		clk_div = WC_BAUD_DR1;
+		break;
+	case 230400:
+		if (max->clock & MAX3110_HIGH_CLK)
+			break;
+	default:
+		/* Pick the previous baud rate */
+		baud = max->baud;
+		clk_div = max->cur_conf & WC_BAUD_DIV_MASK;
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	if (max->clock & MAX3110_HIGH_CLK) {
+		clk_div += 1;
+		/* High clk version max3110 doesn't support B300 */
+		if (baud == 300)
+			baud = 600;
+		if (baud == 230400)
+			clk_div = WC_BAUD_DR1;
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	new_conf = (new_conf & ~WC_BAUD_DIV_MASK) | clk_div;
+
+	if (unlikely(termios->c_cflag & CMSPAR))
+		termios->c_cflag &= ~CMSPAR;
+
+	if (termios->c_cflag & CSTOPB)
+		new_conf |= WC_2_STOPBITS;
+	else
+		new_conf &= ~WC_2_STOPBITS;
+
+	if (termios->c_cflag & PARENB) {
+		new_conf |= WC_PARITY_ENABLE;
+		parity |= UART_LCR_PARITY;
+	} else
+		new_conf &= ~WC_PARITY_ENABLE;
+
+	if (!(termios->c_cflag & PARODD))
+		parity |= UART_LCR_EPAR;
+	max->parity = parity;
+
+	uart_update_timeout(port, termios->c_cflag, baud);
+
+	new_conf |= WC_TAG;
+	if (new_conf != max->cur_conf) {
+		if (!max3110_out(max, new_conf)) {
+			max->cur_conf = new_conf;
+			max->baud = baud;
+		}
+	}
+}
+
+/* Don't handle hw handshaking */
+static unsigned int serial_m3110_get_mctrl(struct uart_port *port)
+{
+	return TIOCM_DSR | TIOCM_CAR | TIOCM_DSR;
+}
+
+static void serial_m3110_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+}
+
+static void serial_m3110_break_ctl(struct uart_port *port, int break_state)
+{
+}
+
+static void serial_m3110_pm(struct uart_port *port, unsigned int state,
+			unsigned int oldstate)
+{
+}
+
+static void serial_m3110_enable_ms(struct uart_port *port)
+{
+}
+
+struct uart_ops serial_m3110_ops = {
+	.tx_empty	= serial_m3110_tx_empty,
+	.set_mctrl	= serial_m3110_set_mctrl,
+	.get_mctrl	= serial_m3110_get_mctrl,
+	.stop_tx	= serial_m3110_stop_tx,
+	.start_tx	= serial_m3110_start_tx,
+	.stop_rx	= serial_m3110_stop_rx,
+	.enable_ms	= serial_m3110_enable_ms,
+	.break_ctl	= serial_m3110_break_ctl,
+	.startup	= serial_m3110_startup,
+	.shutdown	= serial_m3110_shutdown,
+	.set_termios	= serial_m3110_set_termios,
+	.pm		= serial_m3110_pm,
+	.type		= serial_m3110_type,
+	.release_port	= serial_m3110_release_port,
+	.request_port	= serial_m3110_request_port,
+	.config_port	= serial_m3110_config_port,
+	.verify_port	= serial_m3110_verify_port,
+};
+
+static struct uart_driver serial_m3110_reg = {
+	.owner		= THIS_MODULE,
+	.driver_name	= "Maxim 3110",
+	.dev_name	= "ttyS",
+	.major		= TTY_MAJOR,
+	.minor		= 64,
+	.nr		= 1,
+	.cons		= MRST_CONSOLE,
+};
+
+#ifdef CONFIG_PM
+static int serial_m3110_suspend(struct spi_device *spi, pm_message_t state)
+{
+	disable_irq(pmax->irq);
+	uart_suspend_port(&serial_m3110_reg, &pmax->port);
+	max3110_out(pmax, pmax->cur_conf | WC_SW_SHDI);
+	return 0;
+}
+
+static int serial_m3110_resume(struct spi_device *spi)
+{
+	max3110_out(pmax, pmax->cur_conf);
+	uart_resume_port(&serial_m3110_reg, &pmax->port);
+	enable_irq(pmax->irq);
+	return 0;
+}
+#else
+#define serial_m3110_suspend	NULL
+#define serial_m3110_resume	NULL
+#endif
+
+#ifdef CONFIG_MAX3110_DESIGNWARE
+static struct dw_spi_chip spi_uart = {
+	.poll_mode = 1,
+	.enable_dma = 0,
+	.type = SPI_FRF_SPI,
+};
+#endif
+
+static int __devinit serial_m3110_probe(struct spi_device *spi)
+{
+	struct uart_max3110 *max;
+	int ret;
+	void *buffer;
+
+	max = kzalloc(sizeof(*max), GFP_KERNEL);
+	if (!max)
+		return -ENOMEM;
+
+	/* set spi info */
+	spi->mode = SPI_MODE_0;
+	spi->bits_per_word = 16;
+#ifdef CONFIG_MAX3110_DESIGNWARE
+	spi->controller_data = &spi_uart;
+#endif
+	spi_setup(spi);
+
+	max->clock = MAX3110_HIGH_CLK;
+	max->port.type = PORT_MAX3110;
+	max->port.fifosize = 2;		/* only have 16b buffer */
+	max->port.ops = &serial_m3110_ops;
+	max->port.line = 0;
+	max->port.dev = &spi->dev;
+	max->port.uartclk = 115200;
+
+	max->spi = spi;
+	max->name = spi->modalias;	/* use spi name as the name */
+	max->irq = (u16)spi->irq;
+	spin_lock_init(&max->lock);
+
+	max->word_7bits = 0;
+	max->parity = 0;
+	max->baud = 0;
+
+	max->cur_conf = 0;
+	max->flags = 0;
+
+	buffer = (void *)__get_free_page(GFP_KERNEL);
+	if (!buffer) {
+		ret = -ENOMEM;
+		goto err_get_page;
+	}
+	max->con_xmit.buf = buffer;
+	max->con_xmit.head = max->con_xmit.tail = 0;
+
+	max->main_thread = kthread_run(max3110_main_thread,
+					max, "max3110_main");
+	if (IS_ERR(max->main_thread)) {
+		ret = PTR_ERR(max->main_thread);
+		goto err_kthread;
+	}
+
+	pmax = max;
+	/* Give membase a psudo value to pass serial_core's check */
+	max->port.membase = buffer;
+	uart_add_one_port(&serial_m3110_reg, &max->port);
+
+	return 0;
+
+err_kthread:
+	free_page((unsigned long)buffer);
+err_get_page:
+	pmax = NULL;
+	kfree(max);
+	return ret;
+}
+
+static int __devexit max3110_remove(struct spi_device *dev)
+{
+	struct uart_max3110 *max = pmax;
+
+	if (!pmax)
+		return 0;
+
+	pmax = NULL;
+	uart_remove_one_port(&serial_m3110_reg, &max->port);
+
+	free_page((unsigned long)max->con_xmit.buf);
+
+	if (max->main_thread)
+		kthread_stop(max->main_thread);
+
+	kfree(max);
+	return 0;
+}
+
+static struct spi_driver uart_max3110_driver = {
+	.driver = {
+			.name	= "spi_max3111",
+			.bus	= &spi_bus_type,
+			.owner	= THIS_MODULE,
+	},
+	.probe		= serial_m3110_probe,
+	.remove		= __devexit_p(max3110_remove),
+	.suspend	= serial_m3110_suspend,
+	.resume		= serial_m3110_resume,
+};
+
+static int __init serial_m3110_init(void)
+{
+	int ret = 0;
+
+	ret = uart_register_driver(&serial_m3110_reg);
+	if (ret)
+		return ret;
+
+	ret = spi_register_driver(&uart_max3110_driver);
+	if (ret)
+		uart_unregister_driver(&serial_m3110_reg);
+
+	return ret;
+}
+
+static void __exit serial_m3110_exit(void)
+{
+	spi_unregister_driver(&uart_max3110_driver);
+	uart_unregister_driver(&serial_m3110_reg);
+}
+
+module_init(serial_m3110_init);
+module_exit(serial_m3110_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("max3110-uart");
+MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
diff --git a/drivers/serial/max3110.h b/drivers/serial/max3110.h
new file mode 100644
index 0000000..e5a2882
--- /dev/null
+++ b/drivers/serial/max3110.h
@@ -0,0 +1,60 @@
+#ifndef _MAX3110_HEAD_FILE_
+#define _MAX3110_HEAD_FILE_
+
+#define MAX3110_HIGH_CLK	0x1	/* 3.6864 MHZ */
+#define MAX3110_LOW_CLK		0x0	/* 1.8432 MHZ */
+
+/* status bits for all 4 MAX3110 operate modes */
+#define MAX3110_READ_DATA_AVAILABLE	(1 << 15)
+#define MAX3110_WRITE_BUF_EMPTY		(1 << 14)
+
+#define WC_TAG			(3 << 14)
+#define RC_TAG			(1 << 14)
+#define WD_TAG			(2 << 14)
+#define RD_TAG			(0 << 14)
+
+/* bits def for write configuration */
+#define WC_FIFO_ENABLE_MASK	(1 << 13)
+#define WC_FIFO_ENABLE		(0 << 13)
+
+#define WC_SW_SHDI		(1 << 12)
+
+#define WC_IRQ_MASK		(0xF << 8)
+#define WC_TXE_IRQ_ENABLE	(1 << 11)	/* TX empty irq */
+#define WC_RXA_IRQ_ENABLE	(1 << 10)	/* RX availabe irq */
+#define WC_PAR_HIGH_IRQ_ENABLE	(1 << 9)
+#define WC_REC_ACT_IRQ_ENABLE	(1 << 8)
+
+#define WC_IRDA_ENABLE		(1 << 7)
+
+#define WC_STOPBITS_MASK	(1 << 6)
+#define WC_2_STOPBITS		(1 << 6)
+#define WC_1_STOPBITS		(0 << 6)
+
+#define WC_PARITY_ENABLE_MASK	(1 << 5)
+#define WC_PARITY_ENABLE	(1 << 5)
+
+#define WC_WORDLEN_MASK		(1 << 4)
+#define WC_7BIT_WORD		(1 << 4)
+#define WC_8BIT_WORD		(0 << 4)
+
+#define WC_BAUD_DIV_MASK	(0xF)
+#define WC_BAUD_DR1		(0x0)
+#define WC_BAUD_DR2		(0x1)
+#define WC_BAUD_DR4		(0x2)
+#define WC_BAUD_DR8		(0x3)
+#define WC_BAUD_DR16		(0x4)
+#define WC_BAUD_DR32		(0x5)
+#define WC_BAUD_DR64		(0x6)
+#define WC_BAUD_DR128		(0x7)
+#define WC_BAUD_DR3		(0x8)
+#define WC_BAUD_DR6		(0x9)
+#define WC_BAUD_DR12		(0xA)
+#define WC_BAUD_DR24		(0xB)
+#define WC_BAUD_DR48		(0xC)
+#define WC_BAUD_DR96		(0xD)
+#define WC_BAUD_DR192		(0xE)
+#define WC_BAUD_DR384		(0xF)
+
+#define M3110_RX_FIFO_DEPTH	8
+#endif
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 8c3dd36..119ba73 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -182,6 +182,9 @@
 /* Aeroflex Gaisler GRLIB APBUART */
 #define PORT_APBUART    90
 
+/* Maxim M3110 */
+#define PORT_MAX3110	91
+
 #ifdef __KERNEL__
 
 #include <linux/compiler.h>
-- 
1.6.3.3

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v3] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-24  5:11           ` [RFC][PATCH v3] " Feng Tang
@ 2010-02-24 10:44             ` Alan Cox
  2010-02-24 14:25               ` Grant Likely
  2010-02-24 23:18             ` Andrew Morton
                               ` (3 subsequent siblings)
  4 siblings, 1 reply; 35+ messages in thread
From: Alan Cox @ 2010-02-24 10:44 UTC (permalink / raw)
  To: Feng Tang
  Cc: Greg KH, Grant Likely, Andrew Morton, Greg Kroah-Hartman,
	David Brownell, spi-devel-list, linux-serial

On Wed, 24 Feb 2010 13:11:30 +0800
Feng Tang <feng.tang@intel.com> wrote:

> Hi All,
> 
> Here is a driver for Maxim 3110 SPI-UART device, please help to review.
> 
> It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
> dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
> provides a console.

Ack for the serial side

Acked-by: Alan Cox <alan@linux.intel.com>


^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v3] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-24 10:44             ` Alan Cox
@ 2010-02-24 14:25               ` Grant Likely
  0 siblings, 0 replies; 35+ messages in thread
From: Grant Likely @ 2010-02-24 14:25 UTC (permalink / raw)
  To: Alan Cox
  Cc: Feng Tang, Greg KH, Andrew Morton, Greg Kroah-Hartman,
	David Brownell, spi-devel-list, linux-serial

On Wed, Feb 24, 2010 at 3:44 AM, Alan Cox <alan@lxorguk.ukuu.org.uk> wrote:
> On Wed, 24 Feb 2010 13:11:30 +0800
> Feng Tang <feng.tang@intel.com> wrote:
>
>> Hi All,
>>
>> Here is a driver for Maxim 3110 SPI-UART device, please help to review.
>>
>> It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
>> dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
>> provides a console.
>
> Ack for the serial side
>
> Acked-by: Alan Cox <alan@linux.intel.com>

Ack for the SPI side

Acked-by: Grant Likely <grant.likely@secretlab.ca>

g.

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v3] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-24  5:11           ` [RFC][PATCH v3] " Feng Tang
  2010-02-24 10:44             ` Alan Cox
@ 2010-02-24 23:18             ` Andrew Morton
  2010-02-25  6:39               ` Feng Tang
  2010-02-25  4:43             ` David Brownell
                               ` (2 subsequent siblings)
  4 siblings, 1 reply; 35+ messages in thread
From: Andrew Morton @ 2010-02-24 23:18 UTC (permalink / raw)
  To: Feng Tang
  Cc: Greg KH, Grant Likely, Greg Kroah-Hartman, David Brownell,
	spi-devel-list, linux-serial, alan

On Wed, 24 Feb 2010 13:11:30 +0800 Feng Tang <feng.tang@intel.com> wrote:

> Hi All,
> 
> Here is a driver for Maxim 3110 SPI-UART device, please help to review.
> 
> It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
> dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
> provides a console.
> 
> change log:
>  since v2:
> 	* Address comments from Andrew Morton
> 	* Use test/set_bit to avoid race condition for SMP/preempt case
> 	* Fix bug related with endian order
> 
>  since v1:
>         * Address comments from Alan Cox
>         * Use a "use_irq" module parameter to runtime check whether
>           to use IRQ mode
>         * Add the suspend/resume implementation
> 
> Thanks!
> Feng
> 
> >From 93455ea6fbf0bfb6494b88ea83296f26f29f7eee Mon Sep 17 00:00:00 2001
> From: Feng Tang <feng.tang@intel.com>
> Date: Tue, 23 Feb 2010 17:52:00 +0800
> Subject: [PATCH] serial: spi: add spi-uart driver for Maxim 3110
> 
> This is the driver for Max3110 SPI-UART device, which connect
> to host with SPI interface. It supports baud rates from 300 to
> 230400, and supports both polling and IRQ mode, as well as
> providing a console for system use
> 
> Its datasheet could be found here:
> http://datasheets.maxim-ic.com/en/ds/MAX3110E-MAX3111E.pdf
> 
> ...
>
> +static int max3110_main_thread(void *_max)
> +{
> +	struct uart_max3110 *max = _max;
> +	wait_queue_head_t *wq = &max->wq;
> +	int ret = 0;
> +	struct circ_buf *xmit = &max->con_xmit;
> +
> +	init_waitqueue_head(wq);
> +	pr_info(PR_FMT "start main thread\n");
> +
> +	do {
> +		wait_event_interruptible(*wq,
> +				max->flags || kthread_should_stop());
> +		set_bit(0, &max->mthread_up);
> +
> +		if (use_irq && test_bit(M3110_IRQ_PENDING, &max->flags)) {
> +			max3110_con_receive(max);
> +			clear_bit(M3110_IRQ_PENDING, &max->flags);
> +		}
> +
> +		/* First handle console output */
> +		if (test_bit(M3110_CON_TX_NEED, &max->flags)) {
> +			send_circ_buf(max, xmit);
> +			clear_bit(M3110_CON_TX_NEED, &max->flags);
> +		}
> +
> +		/* Handle uart output */
> +		if (test_bit(M3110_UART_TX_NEED, &max->flags)) {
> +			transmit_char(max);
> +			clear_bit(M3110_UART_TX_NEED, &max->flags);
> +		}
> +		clear_bit(0, &max->mthread_up);
> +	} while (!kthread_should_stop());
> +
> +	return ret;
> +}
> +
> +static irqreturn_t serial_m3110_irq(int irq, void *dev_id)
> +{
> +	struct uart_max3110 *max = dev_id;
> +
> +	/* max3110's irq is a falling edge, not level triggered,
> +	 * so no need to disable the irq */
> +	set_bit(M3110_IRQ_PENDING, &max->flags);
> +
> +	if (!test_bit(0, &max->mthread_up))
> +		wake_up_process(max->main_thread);
> +
> +	return IRQ_HANDLED;
> +}

The manipulation of mthread_up here (and in several other places) is
clearly quite racy.  If you hit that race, the thread will not wake up
and the driver will sit there not doing anything until some other event
happens.

This is perhaps fixable with test_and_set_bit() and
test_and_clear_bit() (need to think about that) or, of course, by
adding locking.

But a simpler fix is just to delete mthread_up altogether.  wake_up_process()
on a running process is an OK thing to do and hopefully isn't terribly slow.

> +/* If don't use RX IRQ, then need a thread to polling read */
> +static int max3110_read_thread(void *_max)
> +{
> +	struct uart_max3110 *max = _max;
> +
> +	pr_info(PR_FMT "start read thread\n");
> +	do {
> +		if (!test_bit(0, &max->mthread_up))
> +			max3110_con_receive(max);
> +
> +		set_current_state(TASK_INTERRUPTIBLE);
> +		schedule_timeout_interruptible(HZ / 20);

The set_current_state(TASK_INTERRUPTIBLE) is unneeded.

> +	} while (!kthread_should_stop());
> +
> +	return 0;
> +}


^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v3] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-24  5:11           ` [RFC][PATCH v3] " Feng Tang
  2010-02-24 10:44             ` Alan Cox
  2010-02-24 23:18             ` Andrew Morton
@ 2010-02-25  4:43             ` David Brownell
  2010-02-25  7:44               ` Feng Tang
  2010-02-26  3:47             ` [PATCH v4] " Feng Tang
       [not found]             ` <20100226114729.679bb933@feng-i7>
  4 siblings, 1 reply; 35+ messages in thread
From: David Brownell @ 2010-02-25  4:43 UTC (permalink / raw)
  To: Feng Tang
  Cc: Greg KH, Grant Likely, Andrew Morton, Greg Kroah-Hartman,
	spi-devel-list, linux-serial, alan

On Tuesday 23 February 2010, Feng Tang wrote:
> 
> +config SERIAL_MAX3110
> +       tristate "SPI UART driver for Max3110"
> +       select SERIAL_CORE
> +       select SERIAL_CORE_CONSOLE

Shouldn't that depend on SPI_MASTER?  As it stands, you're
permitting it to build on systems that you *know* don't have
a prayer of running this code ... or often, even finishing
the build.


> +       help
> +         This is the UART protocol driver for MAX3110 device
> +
> +config MAX3110_DESIGNWARE

Having this depend on a specific underlying SPI master controller
is not a good thing.  It should instead be written so that it
runs correctly on *any* controller which exports the standard SPI
programming interface.



> +       boolean "Enable Max3110 to work with Designware controller"
> +       default y
> +       depends on SERIAL_MAX3110
> +

That is, stuff like this, from your max3110 driver:

> +
> +#ifdef CONFIG_MAX3110_DESIGNWARE
> +static struct dw_spi_chip spi_uart = {
> +       .poll_mode = 1,
> +       .enable_dma = 0,
> +       .type = SPI_FRF_SPI,
> +};
> +#endif

Is completely irrelevant for other hardware ... or else
(as with DMA, which should be "enabled by default") is
relevant, but shouldn't be parameterized.


> +       spi->mode = SPI_MODE_0;
> +       spi->bits_per_word = 16;
> +#ifdef CONFIG_MAX3110_DESIGNWARE
> +       spi->controller_data = &spi_uart;
> +#endif

That all looks fishy too.  SPI_MODE should have
been set up as part of device creation.  Ditto
any spi->controller_data ... normally, that all
gets set up as part of board-specific setup.

Normally one goes to a lot of effort to keep
such board-specific code out of drivers.

- Dave

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^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110
  2009-12-29 18:43     ` Erwin Authried
  2009-12-30  1:54       ` Feng Tang
@ 2010-02-25  4:47       ` David Brownell
  2010-02-25  7:49         ` Feng Tang
  1 sibling, 1 reply; 35+ messages in thread
From: David Brownell @ 2010-02-25  4:47 UTC (permalink / raw)
  To: Erwin Authried
  Cc: Tang, Feng, Baruch Siach, Greg Kroah-Hartman, linux-serial,
	spi-devel-list, Andrew Morton, alan

On Tuesday 29 December 2009, Erwin Authried wrote:
> I think there's no need for a MAX3100 **and** a MAX3110 driver, this is
> just confusing. The MAX3110 driver is identical to the MAX3100 from the
> software view, it is simply a MAX3100 with transceivers added to the
> chip. If there's any improvement, that should be merged into the
> existing MAX3100 driver.

Assuming that's true ... who will resolve the issue?


^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v3] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-24 23:18             ` Andrew Morton
@ 2010-02-25  6:39               ` Feng Tang
  0 siblings, 0 replies; 35+ messages in thread
From: Feng Tang @ 2010-02-25  6:39 UTC (permalink / raw)
  To: Andrew Morton
  Cc: Greg KH, Grant Likely, Greg Kroah-Hartman, David Brownell,
	spi-devel-list, linux-serial, alan

On Thu, 25 Feb 2010 07:18:32 +0800
Andrew Morton <akpm@linux-foundation.org> wrote:

> > ...
> >
> > +static int max3110_main_thread(void *_max)
> > +{
> > +	struct uart_max3110 *max = _max;
> > +	wait_queue_head_t *wq = &max->wq;
> > +	int ret = 0;
> > +	struct circ_buf *xmit = &max->con_xmit;
> > +
> > +	init_waitqueue_head(wq);
> > +	pr_info(PR_FMT "start main thread\n");
> > +
> > +	do {
> > +		wait_event_interruptible(*wq,
> > +				max->flags ||
> > kthread_should_stop());
> > +		set_bit(0, &max->mthread_up);
> > +
> > +		if (use_irq && test_bit(M3110_IRQ_PENDING,
> > &max->flags)) {
> > +			max3110_con_receive(max);
> > +			clear_bit(M3110_IRQ_PENDING, &max->flags);
> > +		}
> > +
> > +		/* First handle console output */
> > +		if (test_bit(M3110_CON_TX_NEED, &max->flags)) {
> > +			send_circ_buf(max, xmit);
> > +			clear_bit(M3110_CON_TX_NEED, &max->flags);
> > +		}
> > +
> > +		/* Handle uart output */
> > +		if (test_bit(M3110_UART_TX_NEED, &max->flags)) {
> > +			transmit_char(max);
> > +			clear_bit(M3110_UART_TX_NEED, &max->flags);
> > +		}
> > +		clear_bit(0, &max->mthread_up);
> > +	} while (!kthread_should_stop());
> > +
> > +	return ret;
> > +}
> > +
> > +static irqreturn_t serial_m3110_irq(int irq, void *dev_id)
> > +{
> > +	struct uart_max3110 *max = dev_id;
> > +
> > +	/* max3110's irq is a falling edge, not level triggered,
> > +	 * so no need to disable the irq */
> > +	set_bit(M3110_IRQ_PENDING, &max->flags);
> > +
> > +	if (!test_bit(0, &max->mthread_up))
> > +		wake_up_process(max->main_thread);
> > +
> > +	return IRQ_HANDLED;
> > +}
> 
> The manipulation of mthread_up here (and in several other places) is
> clearly quite racy.  If you hit that race, the thread will not wake up
> and the driver will sit there not doing anything until some other
> event happens.
> 
> This is perhaps fixable with test_and_set_bit() and
> test_and_clear_bit() (need to think about that) or, of course, by
> adding locking.
> 
> But a simpler fix is just to delete mthread_up altogether.
> wake_up_process() on a running process is an OK thing to do and
> hopefully isn't terribly slow.

Yes, wake_up_process won't harm a running process, our driver's case
is a little special, the console's write() func may call
wake_up_process() for every character in the buffer, thus we will
try to avoid to call it. mthread_up can't be removed as it is also
referenced in read_thread.

I prefer to use the test_and_set/clear_bit for "mthread_up".

Thanks,
Feng

diff --git a/drivers/serial/max3110.c b/drivers/serial/max3110.c
index e8c44fa..d5bd71f 100644
--- a/drivers/serial/max3110.c
+++ b/drivers/serial/max3110.c
@@ -400,7 +400,7 @@ static int max3110_main_thread(void *_max)
 	do {
 		wait_event_interruptible(*wq,
 				max->flags || kthread_should_stop());
-		set_bit(0, &max->mthread_up);
+		test_and_set_bit(0, &max->mthread_up);
 
 		if (use_irq && test_bit(M3110_IRQ_PENDING, &max->flags)) {
 			max3110_con_receive(max);
@@ -418,7 +418,7 @@ static int max3110_main_thread(void *_max)
 			transmit_char(max);
 			clear_bit(M3110_UART_TX_NEED, &max->flags);
 		}
-		clear_bit(0, &max->mthread_up);
+		test_and_clear_bit(0, &max->mthread_up);
 	} while (!kthread_should_stop());
 
 	return ret;


^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v3] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-25  4:43             ` David Brownell
@ 2010-02-25  7:44               ` Feng Tang
  2010-02-25  8:11                 ` David Brownell
  0 siblings, 1 reply; 35+ messages in thread
From: Feng Tang @ 2010-02-25  7:44 UTC (permalink / raw)
  To: David Brownell
  Cc: Greg KH, Grant Likely, Andrew Morton, Greg Kroah-Hartman,
	spi-devel-list, linux-serial, alan

On Thu, 25 Feb 2010 12:43:14 +0800
David Brownell <david-b@pacbell.net> wrote:

> On Tuesday 23 February 2010, Feng Tang wrote:
> > 
> > +config SERIAL_MAX3110
> > +       tristate "SPI UART driver for Max3110"
> > +       select SERIAL_CORE
> > +       select SERIAL_CORE_CONSOLE
> 
> Shouldn't that depend on SPI_MASTER?  As it stands, you're
> permitting it to build on systems that you *know* don't have
> a prayer of running this code ... or often, even finishing
> the build.
> 
> 
> > +       help
> > +         This is the UART protocol driver for MAX3110 device
> > +
> > +config MAX3110_DESIGNWARE
> 
> Having this depend on a specific underlying SPI master controller
> is not a good thing.  It should instead be written so that it
> runs correctly on *any* controller which exports the standard SPI
> programming interface.
> 
> 
> 
> > +       boolean "Enable Max3110 to work with Designware controller"
> > +       default y
> > +       depends on SERIAL_MAX3110
> > +
> 
> That is, stuff like this, from your max3110 driver:
> 
> > +
> > +#ifdef CONFIG_MAX3110_DESIGNWARE
> > +static struct dw_spi_chip spi_uart = {
> > +       .poll_mode = 1,
> > +       .enable_dma = 0,
> > +       .type = SPI_FRF_SPI,
> > +};
> > +#endif
> 
> Is completely irrelevant for other hardware ... or else
> (as with DMA, which should be "enabled by default") is
> relevant, but shouldn't be parameterized.
> 
> 
> > +       spi->mode = SPI_MODE_0;
> > +       spi->bits_per_word = 16;
> > +#ifdef CONFIG_MAX3110_DESIGNWARE
> > +       spi->controller_data = &spi_uart;
> > +#endif
> 
> That all looks fishy too.  SPI_MODE should have
> been set up as part of device creation.  Ditto
> any spi->controller_data ... normally, that all
> gets set up as part of board-specific setup.
> 
> Normally one goes to a lot of effort to keep
> such board-specific code out of drivers.

Good point about the DW controller specific data, I'll remove them.
For those "bits_per_word" setting, I think we can put it here instead of
the board initialization code, as many types of boards can leverage the
setting here as it only works in 16b mode.

Thanks,
Feng

> 
> - Dave
> 
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To unsubscribe from this list: send the line "unsubscribe linux-serial" in
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^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-25  4:47       ` David Brownell
@ 2010-02-25  7:49         ` Feng Tang
  0 siblings, 0 replies; 35+ messages in thread
From: Feng Tang @ 2010-02-25  7:49 UTC (permalink / raw)
  To: David Brownell
  Cc: Erwin Authried, Baruch Siach, Greg Kroah-Hartman, linux-serial,
	spi-devel-list, Andrew Morton, alan

On Thu, 25 Feb 2010 12:47:13 +0800
David Brownell <david-b@pacbell.net> wrote:

> On Tuesday 29 December 2009, Erwin Authried wrote:
> > I think there's no need for a MAX3100 **and** a MAX3110 driver,
> > this is just confusing. The MAX3110 driver is identical to the
> > MAX3100 from the software view, it is simply a MAX3100 with
> > transceivers added to the chip. If there's any improvement, that
> > should be merged into the existing MAX3100 driver.
> 
> Assuming that's true ... who will resolve the issue?
> 
Hi David,

I've answered Erwin's comments before in v1 submission cycle, following
is the quote:

"I agree there should not be 2 drivers cover 1 family of HW, so this is a RFC.
I've thinked about merge with current 3100 code, but it depends on one char
per spi_transfer, while my driver relys on batch data transfer for efficiency.
Another key point is the console, SPI UART can't be directly accessed by
CPU, so every spi_transfer will go through tasklet/workqueue, which makes
supporting printk a big part of my driver."

I really did consider about that, but has no good clue, so I think better to
shape my driver first.

Thanks,
Feng

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [RFC][PATCH v3] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-25  7:44               ` Feng Tang
@ 2010-02-25  8:11                 ` David Brownell
  0 siblings, 0 replies; 35+ messages in thread
From: David Brownell @ 2010-02-25  8:11 UTC (permalink / raw)
  To: Feng Tang
  Cc: Greg KH, Grant Likely, Andrew Morton, Greg Kroah-Hartman,
	spi-devel-list, linux-serial, alan

On Wednesday 24 February 2010, Feng Tang wrote:
> Good point about the DW controller specific data, I'll remove them.

Good.


> For those "bits_per_word" setting, I think we can put it here instead of
> the board initialization code, as many types of boards can leverage the
> setting here as it only works in 16b mode.

Yes.  The bits-per-word setting is mostly driver-specific, so
that's appropriate as something the driver updates.

- Dave


^ permalink raw reply	[flat|nested] 35+ messages in thread

* [PATCH v4] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-24  5:11           ` [RFC][PATCH v3] " Feng Tang
                               ` (2 preceding siblings ...)
  2010-02-25  4:43             ` David Brownell
@ 2010-02-26  3:47             ` Feng Tang
       [not found]             ` <20100226114729.679bb933@feng-i7>
  4 siblings, 0 replies; 35+ messages in thread
From: Feng Tang @ 2010-02-26  3:47 UTC (permalink / raw)
  To: Greg KH, David Brownell, linux-serial-u79uwXL29TY76Z2rM5mHXA,
	spi-devel-list

Hi All,

Here is a driver for Maxim 3110 SPI-UART device, please help to review.

It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
provides a console.

change log:
 since v3:
        * Remove the Designware controller related stuff
        * Remove some initialization code which should be done in the platform
          setup code 
        * Add a missing change for drivers/serial/Makefile        
 
 since v2:
        * Address comments from Andrew Morton
        * Use test/set_bit to avoid race condition for SMP/preempt case
        * Fix bug related with endian order

 since v1:
        * Address comments from Alan Cox
        * Use a "use_irq" module parameter to runtime check whether
          to use IRQ mode
        * Add the suspend/resume implementation

Thanks!
Feng


>From 4c4fef8784c38e72f6a4578d48688388a426fe67 Mon Sep 17 00:00:00 2001
From: Feng Tang <feng.tang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Date: Fri, 26 Feb 2010 11:37:29 +0800
Subject: [PATCH] serial: spi: add spi-uart driver for Maxim 3110

This is the driver for Max3110 SPI-UART device, which connect
to host with SPI interface. It supports baud rates from 300 to
230400, and supports both polling and IRQ mode, as well as
providing a console for system use

Its datasheet could be found here:
http://datasheets.maxim-ic.com/en/ds/MAX3110E-MAX3111E.pdf

Signed-off-by: Feng Tang <feng.tang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
---
 drivers/serial/Kconfig      |    8 +
 drivers/serial/Makefile     |    1 +
 drivers/serial/max3110.c    |  862 +++++++++++++++++++++++++++++++++++++++++++
 drivers/serial/max3110.h    |   60 +++
 include/linux/serial_core.h |    3 +
 5 files changed, 934 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/max3110.c
 create mode 100644 drivers/serial/max3110.h

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 9ff47db..94aa282 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -688,6 +688,14 @@ config SERIAL_SA1100_CONSOLE
 	  your boot loader (lilo or loadlin) about how to pass options to the
 	  kernel at boot time.)
 
+config SERIAL_MAX3110
+	tristate "SPI UART driver for Max3110"
+	depends on SPI_MASTER
+	select SERIAL_CORE
+	select SERIAL_CORE_CONSOLE
+	help
+	  This is the UART protocol driver for MAX3110 device
+
 config SERIAL_BFIN
 	tristate "Blackfin serial port support"
 	depends on BLACKFIN
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 5548fe7..b93d8a0 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
 obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
 obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o
 obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
+obj-$(CONFIG_SERIAL_MAX3110) += max3110.o
 obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
 obj-$(CONFIG_SERIAL_MUX) += mux.o
 obj-$(CONFIG_SERIAL_68328) += 68328serial.o
diff --git a/drivers/serial/max3110.c b/drivers/serial/max3110.c
new file mode 100644
index 0000000..3283ba6
--- /dev/null
+++ b/drivers/serial/max3110.c
@@ -0,0 +1,862 @@
+/*
+ * max3110.c - spi uart protocol driver for Maxim 3110
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+/*
+ * Note:
+ * * From Max3110 spec, the Rx FIFO has 8 words, while the Tx FIFO only has
+ *   1 word. If SPI master controller doesn't support sclk frequency change,
+ *   then the char need be sent out one by one with some delay
+ *
+ * * Currently only RX availabe interrrupt is used
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+
+#include <linux/kthread.h>
+#include <linux/delay.h>
+#include <linux/spi/spi.h>
+
+#include "max3110.h"
+
+#define PR_FMT	"max3110: "
+
+struct uart_max3110 {
+	struct uart_port port;
+	struct spi_device *spi;
+	char *name;
+
+	wait_queue_head_t wq;
+	struct task_struct *main_thread;
+	struct task_struct *read_thread;
+	spinlock_t lock;
+
+	u32 baud;
+	u16 cur_conf;
+	u8 clock;
+	u8 parity, word_7bits;
+	u16 irq;
+
+	/* bit map for UART status */
+	unsigned long flags;
+#define M3110_CON_TX_NEED	0
+#define M3110_UART_TX_NEED	1
+#define M3110_IRQ_PENDING	2
+	unsigned long mthread_up;
+
+	/* console buffer */
+	struct circ_buf con_xmit;
+};
+
+static struct uart_max3110 *pmax;
+
+static int use_irq = 1;
+module_param(use_irq, int, 0444);
+MODULE_PARM_DESC(use_irq, "Whether using Max3110's IRQ capability");
+
+static void receive_chars(struct uart_max3110 *max,
+				unsigned char *str, int len);
+static int max3110_read_multi(struct uart_max3110 *max, u8 *buf);
+static void max3110_con_receive(struct uart_max3110 *max);
+
+static int max3110_write_then_read(struct uart_max3110 *max,
+		const void *txbuf, void *rxbuf, unsigned len, int always_fast)
+{
+	struct spi_device *spi = max->spi;
+	struct spi_message	message;
+	struct spi_transfer	x;
+	int ret;
+
+	spi_message_init(&message);
+	memset(&x, 0, sizeof x);
+	x.len = len;
+	x.tx_buf = txbuf;
+	x.rx_buf = rxbuf;
+	spi_message_add_tail(&x, &message);
+
+	if (always_fast)
+		x.speed_hz = spi->max_speed_hz;
+	else if (max->baud)
+		x.speed_hz = max->baud;
+
+	/* Do the i/o */
+	ret = spi_sync(spi, &message);
+	return ret;
+}
+
+/* Write a u16 to the device, and return one u16 read back */
+static int max3110_out(struct uart_max3110 *max, const u16 out)
+{
+	u16 tmp;
+	u8  ch;
+	int ret;
+
+	ret = max3110_write_then_read(max, &out, &tmp, 2, 1);
+	if (ret) {
+		pr_warning(PR_FMT "%s(): get err msg %d when sending 0x%x\n",
+				__func__, ret, out);
+		return ret;
+	}
+
+	/* If some valid data is read back */
+	if (tmp & MAX3110_READ_DATA_AVAILABLE) {
+		ch = tmp & 0xff;
+		receive_chars(max, &ch, 1);
+	}
+
+	return ret;
+}
+
+/*
+ * This is usually used to read data from SPIC RX FIFO, which doesn't
+ * need any delay like flushing character out.
+ *
+ * Return how many valide bytes are read back
+ */
+static int max3110_read_multi(struct uart_max3110 *max, u8 *buf)
+{
+	u16 obuf[M3110_RX_FIFO_DEPTH], ibuf[M3110_RX_FIFO_DEPTH];
+	u8 *pbuf, valid_str[M3110_RX_FIFO_DEPTH];
+	int i, j;
+
+	memset(obuf, 0, sizeof(obuf));
+	memset(obuf, 0, sizeof(ibuf));
+
+	if (max3110_write_then_read(max, obuf, ibuf,
+				M3110_RX_FIFO_DEPTH * 2, 1))
+		return 0;
+
+	/* If caller doesn't provide a buffer, then handle received char */
+	pbuf = buf ? buf : valid_str;
+
+	for (i = 0, j = 0; i < M3110_RX_FIFO_DEPTH; i++) {
+		if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
+			pbuf[j++] = ibuf[i] & 0xff;
+	}
+
+	if (j && (pbuf == valid_str))
+		receive_chars(max, valid_str, j);
+
+	return j;
+}
+
+static void serial_m3110_con_putchar(struct uart_port *port, int ch)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	struct circ_buf *xmit = &max->con_xmit;
+
+	if (uart_circ_chars_free(xmit)) {
+		xmit->buf[xmit->head] = (char)ch;
+		xmit->head = (xmit->head + 1) & (PAGE_SIZE - 1);
+	}
+
+	set_bit(M3110_CON_TX_NEED, &max->flags);
+	if (!test_bit(0, &max->mthread_up))
+		wake_up_process(max->main_thread);
+}
+
+/*
+ * Print a string to the serial port trying not to disturb
+ * any possible real use of the port...
+ *
+ *	The console_lock must be held when we get here.
+ */
+static void serial_m3110_con_write(struct console *co,
+				const char *s, unsigned int count)
+{
+	if (!pmax)
+		return;
+
+	uart_console_write(&pmax->port, s, count, serial_m3110_con_putchar);
+}
+
+static int __init
+serial_m3110_con_setup(struct console *co, char *options)
+{
+	struct uart_max3110 *max = pmax;
+	int baud = 115200;
+	int bits = 8;
+	int parity = 'n';
+	int flow = 'n';
+
+	pr_info(PR_FMT "setting up console\n");
+
+	if (!max) {
+		pr_err(PR_FMT "pmax is NULL, return");
+		return -ENODEV;
+	}
+
+	if (options)
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+	return uart_set_options(&max->port, co, baud, parity, bits, flow);
+}
+
+static struct tty_driver *serial_m3110_con_device(struct console *co,
+							int *index)
+{
+	struct uart_driver *p = co->data;
+	*index = co->index;
+	return p->tty_driver;
+}
+
+static struct uart_driver serial_m3110_reg;
+static struct console serial_m3110_console = {
+	.name		= "ttyS",
+	.write		= serial_m3110_con_write,
+	.device		= serial_m3110_con_device,
+	.setup		= serial_m3110_con_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+	.data		= &serial_m3110_reg,
+};
+
+
+static unsigned int serial_m3110_tx_empty(struct uart_port *port)
+{
+	return 1;
+}
+
+static void serial_m3110_stop_tx(struct uart_port *port)
+{
+	return;
+}
+
+static void serial_m3110_stop_rx(struct uart_port *port)
+{
+	return;
+}
+
+#define WORDS_PER_XFER	128
+static void send_circ_buf(struct uart_max3110 *max,
+				struct circ_buf *xmit)
+{
+	int len, blen, left = 0;
+	u16 obuf[WORDS_PER_XFER], ibuf[WORDS_PER_XFER];
+	u8 valid_str[WORDS_PER_XFER];
+	int i, j;
+	int ret = 0;
+
+	while (!uart_circ_empty(xmit)) {
+		left = uart_circ_chars_pending(xmit);
+		while (left) {
+			len = min(left, WORDS_PER_XFER);
+			blen = len * sizeof(u16);
+			memset(obuf, 0, blen);
+			memset(ibuf, 0, blen);
+
+			for (i = 0; i < len; i++) {
+				obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG;
+				xmit->tail = (xmit->tail + 1) &
+						(UART_XMIT_SIZE - 1);
+			}
+
+			/* Fail to send msg to console is not very critical */
+			ret = max3110_write_then_read(max, obuf, ibuf, blen, 0);
+			if (ret)
+				pr_warning(PR_FMT "%s(): get err msg %d\n",
+						__func__, ret);
+
+			for (i = 0, j = 0; i < len; i++) {
+				if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
+					valid_str[j++] = ibuf[i] & 0xff;
+			}
+
+			if (j)
+				receive_chars(max, valid_str, j);
+
+			max->port.icount.tx += len;
+			left -= len;
+		}
+	}
+}
+
+static void transmit_char(struct uart_max3110 *max)
+{
+	struct uart_port *port = &max->port;
+	struct circ_buf *xmit = &port->state->xmit;
+
+	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
+		return;
+
+	send_circ_buf(max, xmit);
+
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+		uart_write_wakeup(port);
+}
+
+/*
+ * This will be called by uart_write() and tty_write, can't
+ * go to sleep
+ */
+static void serial_m3110_start_tx(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+
+	set_bit(M3110_UART_TX_NEED, &max->flags);
+	if (!test_bit(0, &max->mthread_up))
+		wake_up_process(max->main_thread);
+}
+
+static void receive_chars(struct uart_max3110 *max, unsigned char *str, int len)
+{
+	struct uart_port *port = &max->port;
+	struct tty_struct *tty;
+	int usable;
+
+	/* If uart is not opened, just return */
+	if (!port->state)
+		return;
+
+	tty = port->state->port.tty;
+	if (!tty)
+		return;
+
+	while (len) {
+		usable = tty_buffer_request_room(tty, len);
+		if (usable) {
+			tty_insert_flip_string(tty, str, usable);
+			str += usable;
+			port->icount.rx += usable;
+		}
+		len -= usable;
+	}
+	tty_flip_buffer_push(tty);
+}
+
+/*
+ * This routine will be used in read_thread or RX IRQ handling,
+ * it will first do one round buffer read(8 words), if there is some
+ * valid RX data, will try to read 5 more rounds till all data
+ * is read out.
+ *
+ * Use stack space as data buffer to save some system load, and chose
+ * 504 Btyes as a threadhold to do a bulk push to upper tty layer when
+ * receiving bulk data, a much bigger buffer may cause stack overflow
+ */
+static void max3110_con_receive(struct uart_max3110 *max)
+{
+	int loop = 1, num, total = 0;
+	u8 recv_buf[512], *pbuf;
+
+	pbuf = recv_buf;
+	do {
+		num = max3110_read_multi(max, pbuf);
+
+		if (num) {
+			loop = 5;
+			pbuf += num;
+			total += num;
+
+			if (total >= 504) {
+				receive_chars(max, recv_buf, total);
+				pbuf = recv_buf;
+				total = 0;
+			}
+		}
+	} while (--loop);
+
+	if (total)
+		receive_chars(max, recv_buf, total);
+}
+
+static int max3110_main_thread(void *_max)
+{
+	struct uart_max3110 *max = _max;
+	wait_queue_head_t *wq = &max->wq;
+	int ret = 0;
+	struct circ_buf *xmit = &max->con_xmit;
+
+	init_waitqueue_head(wq);
+	pr_info(PR_FMT "start main thread\n");
+
+	do {
+		wait_event_interruptible(*wq,
+				max->flags || kthread_should_stop());
+		test_and_set_bit(0, &max->mthread_up);
+
+		if (use_irq && test_bit(M3110_IRQ_PENDING, &max->flags)) {
+			max3110_con_receive(max);
+			clear_bit(M3110_IRQ_PENDING, &max->flags);
+		}
+
+		/* First handle console output */
+		if (test_bit(M3110_CON_TX_NEED, &max->flags)) {
+			send_circ_buf(max, xmit);
+			clear_bit(M3110_CON_TX_NEED, &max->flags);
+		}
+
+		/* Handle uart output */
+		if (test_bit(M3110_UART_TX_NEED, &max->flags)) {
+			transmit_char(max);
+			clear_bit(M3110_UART_TX_NEED, &max->flags);
+		}
+		test_and_clear_bit(0, &max->mthread_up);
+	} while (!kthread_should_stop());
+
+	return ret;
+}
+
+static irqreturn_t serial_m3110_irq(int irq, void *dev_id)
+{
+	struct uart_max3110 *max = dev_id;
+
+	/* max3110's irq is a falling edge, not level triggered,
+	 * so no need to disable the irq */
+	set_bit(M3110_IRQ_PENDING, &max->flags);
+
+	if (!test_bit(0, &max->mthread_up))
+		wake_up_process(max->main_thread);
+
+	return IRQ_HANDLED;
+}
+
+/* If don't use RX IRQ, then need a thread to polling read */
+static int max3110_read_thread(void *_max)
+{
+	struct uart_max3110 *max = _max;
+
+	pr_info(PR_FMT "start read thread\n");
+	do {
+		if (!test_bit(0, &max->mthread_up))
+			max3110_con_receive(max);
+
+		schedule_timeout_interruptible(HZ / 20);
+	} while (!kthread_should_stop());
+
+	return 0;
+}
+
+static int serial_m3110_startup(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	u16 config = 0;
+	int ret = 0;
+
+	if (port->line != 0) {
+		pr_err(PR_FMT "uart port startup failed\n");
+		return -1;
+	}
+
+	/* Disable all IRQ and config it to 115200, 8n1 */
+	config = WC_TAG | WC_FIFO_ENABLE
+			| WC_1_STOPBITS
+			| WC_8BIT_WORD
+			| WC_BAUD_DR2;
+
+	/* As we use thread to handle tx/rx, need set low latency */
+	port->state->port.tty->low_latency = 1;
+
+	if (use_irq) {
+		ret = request_irq(max->irq, serial_m3110_irq,
+					IRQ_TYPE_EDGE_FALLING, "max3110", max);
+		if (ret)
+			return ret;
+
+		/* Enable RX IRQ only */
+		config |= WC_RXA_IRQ_ENABLE;
+	} else {
+		/* If IRQ is disabled, start a read thread for input data */
+		max->read_thread =
+			kthread_run(max3110_read_thread, max, "max3110_read");
+		if (IS_ERR(max->read_thread)) {
+			ret = PTR_ERR(max->read_thread);
+			max->read_thread = 0;
+			pr_err(PR_FMT "Can't create read thread!");
+			return ret;
+		}
+	}
+
+	ret = max3110_out(max, config);
+	if (ret) {
+		if (use_irq)
+			free_irq(max->irq, max);
+		else
+			kthread_stop(max->read_thread);
+
+		return ret;
+	}
+
+	max->cur_conf = config;
+	return 0;
+}
+
+static void serial_m3110_shutdown(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	u16 config;
+
+	if (max->read_thread) {
+		kthread_stop(max->read_thread);
+		max->read_thread = NULL;
+	}
+
+	if (use_irq)
+		free_irq(max->irq, max);
+
+	/* Disable interrupts from this port */
+	config = WC_TAG | WC_SW_SHDI;
+	max3110_out(max, config);
+}
+
+static void serial_m3110_release_port(struct uart_port *port)
+{
+}
+
+static int serial_m3110_request_port(struct uart_port *port)
+{
+	return 0;
+}
+
+static void serial_m3110_config_port(struct uart_port *port, int flags)
+{
+	port->type = PORT_MAX3110;
+}
+
+static int
+serial_m3110_verify_port(struct uart_port *port, struct serial_struct *ser)
+{
+	/* We don't want the core code to modify any port params */
+	return -EINVAL;
+}
+
+
+static const char *serial_m3110_type(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	return max->name;
+}
+
+static void
+serial_m3110_set_termios(struct uart_port *port, struct ktermios *termios,
+		       struct ktermios *old)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	unsigned char cval;
+	unsigned int baud, parity = 0;
+	int clk_div = -1;
+	u16 new_conf = max->cur_conf;
+
+	switch (termios->c_cflag & CSIZE) {
+	case CS7:
+		cval = UART_LCR_WLEN7;
+		new_conf |= WC_7BIT_WORD;
+		break;
+	default:
+		/* We only support CS7 & CS8 */
+		termios->c_cflag &= ~CSIZE;
+		termios->c_cflag |= CS8;
+	case CS8:
+		cval = UART_LCR_WLEN8;
+		new_conf |= WC_8BIT_WORD;
+		break;
+	}
+
+	baud = uart_get_baud_rate(port, termios, old, 0, 230400);
+
+	/* First calc the div for 1.8MHZ clock case */
+	switch (baud) {
+	case 300:
+		clk_div = WC_BAUD_DR384;
+		break;
+	case 600:
+		clk_div = WC_BAUD_DR192;
+		break;
+	case 1200:
+		clk_div = WC_BAUD_DR96;
+		break;
+	case 2400:
+		clk_div = WC_BAUD_DR48;
+		break;
+	case 4800:
+		clk_div = WC_BAUD_DR24;
+		break;
+	case 9600:
+		clk_div = WC_BAUD_DR12;
+		break;
+	case 19200:
+		clk_div = WC_BAUD_DR6;
+		break;
+	case 38400:
+		clk_div = WC_BAUD_DR3;
+		break;
+	case 57600:
+		clk_div = WC_BAUD_DR2;
+		break;
+	case 115200:
+		clk_div = WC_BAUD_DR1;
+		break;
+	case 230400:
+		if (max->clock & MAX3110_HIGH_CLK)
+			break;
+	default:
+		/* Pick the previous baud rate */
+		baud = max->baud;
+		clk_div = max->cur_conf & WC_BAUD_DIV_MASK;
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	if (max->clock & MAX3110_HIGH_CLK) {
+		clk_div += 1;
+		/* High clk version max3110 doesn't support B300 */
+		if (baud == 300)
+			baud = 600;
+		if (baud == 230400)
+			clk_div = WC_BAUD_DR1;
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	new_conf = (new_conf & ~WC_BAUD_DIV_MASK) | clk_div;
+
+	if (unlikely(termios->c_cflag & CMSPAR))
+		termios->c_cflag &= ~CMSPAR;
+
+	if (termios->c_cflag & CSTOPB)
+		new_conf |= WC_2_STOPBITS;
+	else
+		new_conf &= ~WC_2_STOPBITS;
+
+	if (termios->c_cflag & PARENB) {
+		new_conf |= WC_PARITY_ENABLE;
+		parity |= UART_LCR_PARITY;
+	} else
+		new_conf &= ~WC_PARITY_ENABLE;
+
+	if (!(termios->c_cflag & PARODD))
+		parity |= UART_LCR_EPAR;
+	max->parity = parity;
+
+	uart_update_timeout(port, termios->c_cflag, baud);
+
+	new_conf |= WC_TAG;
+	if (new_conf != max->cur_conf) {
+		if (!max3110_out(max, new_conf)) {
+			max->cur_conf = new_conf;
+			max->baud = baud;
+		}
+	}
+}
+
+/* Don't handle hw handshaking */
+static unsigned int serial_m3110_get_mctrl(struct uart_port *port)
+{
+	return TIOCM_DSR | TIOCM_CAR | TIOCM_DSR;
+}
+
+static void serial_m3110_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+}
+
+static void serial_m3110_break_ctl(struct uart_port *port, int break_state)
+{
+}
+
+static void serial_m3110_pm(struct uart_port *port, unsigned int state,
+			unsigned int oldstate)
+{
+}
+
+static void serial_m3110_enable_ms(struct uart_port *port)
+{
+}
+
+struct uart_ops serial_m3110_ops = {
+	.tx_empty	= serial_m3110_tx_empty,
+	.set_mctrl	= serial_m3110_set_mctrl,
+	.get_mctrl	= serial_m3110_get_mctrl,
+	.stop_tx	= serial_m3110_stop_tx,
+	.start_tx	= serial_m3110_start_tx,
+	.stop_rx	= serial_m3110_stop_rx,
+	.enable_ms	= serial_m3110_enable_ms,
+	.break_ctl	= serial_m3110_break_ctl,
+	.startup	= serial_m3110_startup,
+	.shutdown	= serial_m3110_shutdown,
+	.set_termios	= serial_m3110_set_termios,
+	.pm		= serial_m3110_pm,
+	.type		= serial_m3110_type,
+	.release_port	= serial_m3110_release_port,
+	.request_port	= serial_m3110_request_port,
+	.config_port	= serial_m3110_config_port,
+	.verify_port	= serial_m3110_verify_port,
+};
+
+static struct uart_driver serial_m3110_reg = {
+	.owner		= THIS_MODULE,
+	.driver_name	= "Maxim 3110",
+	.dev_name	= "ttyS",
+	.major		= TTY_MAJOR,
+	.minor		= 64,
+	.nr		= 1,
+	.cons		= &serial_m3110_console,
+};
+
+#ifdef CONFIG_PM
+static int serial_m3110_suspend(struct spi_device *spi, pm_message_t state)
+{
+	disable_irq(pmax->irq);
+	uart_suspend_port(&serial_m3110_reg, &pmax->port);
+	max3110_out(pmax, pmax->cur_conf | WC_SW_SHDI);
+	return 0;
+}
+
+static int serial_m3110_resume(struct spi_device *spi)
+{
+	max3110_out(pmax, pmax->cur_conf);
+	uart_resume_port(&serial_m3110_reg, &pmax->port);
+	enable_irq(pmax->irq);
+	return 0;
+}
+#else
+#define serial_m3110_suspend	NULL
+#define serial_m3110_resume	NULL
+#endif
+
+static int __devinit serial_m3110_probe(struct spi_device *spi)
+{
+	struct uart_max3110 *max;
+	int ret;
+	void *buffer;
+
+	max = kzalloc(sizeof(*max), GFP_KERNEL);
+	if (!max)
+		return -ENOMEM;
+
+	spi->bits_per_word = 16;
+	spi_setup(spi);
+
+	max->clock = MAX3110_HIGH_CLK;
+	max->port.type = PORT_MAX3110;
+	max->port.fifosize = 2;		/* only have 16b buffer */
+	max->port.ops = &serial_m3110_ops;
+	max->port.line = 0;
+	max->port.dev = &spi->dev;
+	max->port.uartclk = 115200;
+
+	max->spi = spi;
+	max->name = spi->modalias;	/* use spi name as the name */
+	max->irq = (u16)spi->irq;
+	spin_lock_init(&max->lock);
+
+	max->word_7bits = 0;
+	max->parity = 0;
+	max->baud = 0;
+
+	max->cur_conf = 0;
+	max->flags = 0;
+
+	buffer = (void *)__get_free_page(GFP_KERNEL);
+	if (!buffer) {
+		ret = -ENOMEM;
+		goto err_get_page;
+	}
+	max->con_xmit.buf = buffer;
+	max->con_xmit.head = max->con_xmit.tail = 0;
+
+	max->main_thread = kthread_run(max3110_main_thread,
+					max, "max3110_main");
+	if (IS_ERR(max->main_thread)) {
+		ret = PTR_ERR(max->main_thread);
+		goto err_kthread;
+	}
+
+	pmax = max;
+	/* Give membase a psudo value to pass serial_core's check */
+	max->port.membase = buffer;
+	uart_add_one_port(&serial_m3110_reg, &max->port);
+
+	return 0;
+
+err_kthread:
+	free_page((unsigned long)buffer);
+err_get_page:
+	pmax = NULL;
+	kfree(max);
+	return ret;
+}
+
+static int __devexit max3110_remove(struct spi_device *dev)
+{
+	struct uart_max3110 *max = pmax;
+
+	if (!pmax)
+		return 0;
+
+	pmax = NULL;
+	uart_remove_one_port(&serial_m3110_reg, &max->port);
+
+	free_page((unsigned long)max->con_xmit.buf);
+
+	if (max->main_thread)
+		kthread_stop(max->main_thread);
+
+	kfree(max);
+	return 0;
+}
+
+static struct spi_driver uart_max3110_driver = {
+	.driver = {
+			.name	= "spi_max3110",
+			.bus	= &spi_bus_type,
+			.owner	= THIS_MODULE,
+	},
+	.probe		= serial_m3110_probe,
+	.remove		= __devexit_p(max3110_remove),
+	.suspend	= serial_m3110_suspend,
+	.resume		= serial_m3110_resume,
+};
+
+static int __init serial_m3110_init(void)
+{
+	int ret = 0;
+
+	ret = uart_register_driver(&serial_m3110_reg);
+	if (ret)
+		return ret;
+
+	ret = spi_register_driver(&uart_max3110_driver);
+	if (ret)
+		uart_unregister_driver(&serial_m3110_reg);
+
+	return ret;
+}
+
+static void __exit serial_m3110_exit(void)
+{
+	spi_unregister_driver(&uart_max3110_driver);
+	uart_unregister_driver(&serial_m3110_reg);
+}
+
+module_init(serial_m3110_init);
+module_exit(serial_m3110_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("max3110-uart");
+MODULE_AUTHOR("Feng Tang <feng.tang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>");
diff --git a/drivers/serial/max3110.h b/drivers/serial/max3110.h
new file mode 100644
index 0000000..e5a2882
--- /dev/null
+++ b/drivers/serial/max3110.h
@@ -0,0 +1,60 @@
+#ifndef _MAX3110_HEAD_FILE_
+#define _MAX3110_HEAD_FILE_
+
+#define MAX3110_HIGH_CLK	0x1	/* 3.6864 MHZ */
+#define MAX3110_LOW_CLK		0x0	/* 1.8432 MHZ */
+
+/* status bits for all 4 MAX3110 operate modes */
+#define MAX3110_READ_DATA_AVAILABLE	(1 << 15)
+#define MAX3110_WRITE_BUF_EMPTY		(1 << 14)
+
+#define WC_TAG			(3 << 14)
+#define RC_TAG			(1 << 14)
+#define WD_TAG			(2 << 14)
+#define RD_TAG			(0 << 14)
+
+/* bits def for write configuration */
+#define WC_FIFO_ENABLE_MASK	(1 << 13)
+#define WC_FIFO_ENABLE		(0 << 13)
+
+#define WC_SW_SHDI		(1 << 12)
+
+#define WC_IRQ_MASK		(0xF << 8)
+#define WC_TXE_IRQ_ENABLE	(1 << 11)	/* TX empty irq */
+#define WC_RXA_IRQ_ENABLE	(1 << 10)	/* RX availabe irq */
+#define WC_PAR_HIGH_IRQ_ENABLE	(1 << 9)
+#define WC_REC_ACT_IRQ_ENABLE	(1 << 8)
+
+#define WC_IRDA_ENABLE		(1 << 7)
+
+#define WC_STOPBITS_MASK	(1 << 6)
+#define WC_2_STOPBITS		(1 << 6)
+#define WC_1_STOPBITS		(0 << 6)
+
+#define WC_PARITY_ENABLE_MASK	(1 << 5)
+#define WC_PARITY_ENABLE	(1 << 5)
+
+#define WC_WORDLEN_MASK		(1 << 4)
+#define WC_7BIT_WORD		(1 << 4)
+#define WC_8BIT_WORD		(0 << 4)
+
+#define WC_BAUD_DIV_MASK	(0xF)
+#define WC_BAUD_DR1		(0x0)
+#define WC_BAUD_DR2		(0x1)
+#define WC_BAUD_DR4		(0x2)
+#define WC_BAUD_DR8		(0x3)
+#define WC_BAUD_DR16		(0x4)
+#define WC_BAUD_DR32		(0x5)
+#define WC_BAUD_DR64		(0x6)
+#define WC_BAUD_DR128		(0x7)
+#define WC_BAUD_DR3		(0x8)
+#define WC_BAUD_DR6		(0x9)
+#define WC_BAUD_DR12		(0xA)
+#define WC_BAUD_DR24		(0xB)
+#define WC_BAUD_DR48		(0xC)
+#define WC_BAUD_DR96		(0xD)
+#define WC_BAUD_DR192		(0xE)
+#define WC_BAUD_DR384		(0xF)
+
+#define M3110_RX_FIFO_DEPTH	8
+#endif
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 8c3dd36..119ba73 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -182,6 +182,9 @@
 /* Aeroflex Gaisler GRLIB APBUART */
 #define PORT_APBUART    90
 
+/* Maxim M3110 */
+#define PORT_MAX3110	91
+
 #ifdef __KERNEL__
 
 #include <linux/compiler.h>
-- 
1.6.3.3

------------------------------------------------------------------------------
Download Intel&#174; Parallel Studio Eval
Try the new software tools for yourself. Speed compiling, find bugs
proactively, and fine-tune applications for parallel performance.
See why Intel Parallel Studio got high marks during beta.
http://p.sf.net/sfu/intel-sw-dev

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v4] serial: spi: add spi-uart driver for Maxim 3110
       [not found]             ` <20100226114729.679bb933@feng-i7>
@ 2010-02-26  9:59               ` Masakazu Mokuno
  2010-02-26 19:41                 ` David Brownell
  2010-03-02  3:38                 ` Feng Tang
  0 siblings, 2 replies; 35+ messages in thread
From: Masakazu Mokuno @ 2010-02-26  9:59 UTC (permalink / raw)
  To: Feng Tang
  Cc: Greg KH, David Brownell, linux-serial, spi-devel-list,
	Andrew Morton, alan

Hi,

On Fri, 26 Feb 2010 11:47:29 +0800
Feng Tang <feng.tang@intel.com> wrote:

> Hi All,
> 
> Here is a driver for Maxim 3110 SPI-UART device, please help to review.

<snip>

> +/*
> + * This is usually used to read data from SPIC RX FIFO, which doesn't
> + * need any delay like flushing character out.
> + *
> + * Return how many valide bytes are read back
> + */
> +static int max3110_read_multi(struct uart_max3110 *max, u8 *buf)
> +{
> +	u16 obuf[M3110_RX_FIFO_DEPTH], ibuf[M3110_RX_FIFO_DEPTH];

Doing I/O on stack is guaranteed safe for spi functions?

> +	u8 *pbuf, valid_str[M3110_RX_FIFO_DEPTH];
> +	int i, j;
> +
> +	memset(obuf, 0, sizeof(obuf));
> +	memset(obuf, 0, sizeof(ibuf));

memset(ibuf, 0, sizeof(ibuf))?

> +
> +	if (max3110_write_then_read(max, obuf, ibuf,
> +				M3110_RX_FIFO_DEPTH * 2, 1))
> +		return 0;
> +
> +	/* If caller doesn't provide a buffer, then handle received char */
> +	pbuf = buf ? buf : valid_str;
> +
> +	for (i = 0, j = 0; i < M3110_RX_FIFO_DEPTH; i++) {
> +		if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
> +			pbuf[j++] = ibuf[i] & 0xff;
> +	}
> +
> +	if (j && (pbuf == valid_str))
> +		receive_chars(max, valid_str, j);
> +
> +	return j;

-- 
Masakazu Mokuno


^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v4] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-26  9:59               ` Masakazu Mokuno
@ 2010-02-26 19:41                 ` David Brownell
  2010-03-01  2:30                   ` Feng Tang
  2010-03-02  3:38                 ` Feng Tang
  1 sibling, 1 reply; 35+ messages in thread
From: David Brownell @ 2010-02-26 19:41 UTC (permalink / raw)
  To: Masakazu Mokuno
  Cc: Feng Tang, Greg KH, linux-serial, spi-devel-list, Andrew Morton, alan

On Friday 26 February 2010, Masakazu Mokuno wrote:
> > +static int max3110_read_multi(struct uart_max3110 *max, u8 *buf)
> > +{
> > +     u16 obuf[M3110_RX_FIFO_DEPTH], ibuf[M3110_RX_FIFO_DEPTH];
> 
> Doing I/O on stack is guaranteed safe for spi functions?

Good catch ...  no it's not safe.

No DMA-enabled programming interface allows it, including SPI.

The Documentation/PCI/PCI-DMA-mapping.txt file has a section with
the oddly punctuated title "What memory is DMA'able?".  That's
generic to all uses of DMA.  When it was moved to the PCI area,
that information became harder to find ... but no less true for
non-PCI contexts (sigh).  One relevant paragraph being:

  This rule also means that you may use neither kernel image addresses
  (items in data/text/bss segments), nor module image addresses, nor
  stack addresses for DMA.  These could all be mapped somewhere entirely
  different than the rest of physical memory.  Even if those classes of
  memory could physically work with DMA, you'd need to ensure the I/O
  buffers were cacheline-aligned.  Without that, you'd see cacheline
  sharing problems (data corruption) on CPUs with DMA-incoherent caches.
  (The CPU could write to one word, DMA would write to a different one
  in the same cache line, and one of them could be overwritten.)

Those cacheline sharing problems are particularly bad for the stack,
since the data corruption often includes return addresses.

In short, passing a stack-based I/O buffer could work on some machines,
but cause perplexing data corruption issues on others.  So don't try
to do it any driver that claims to be portable.

- Dave

--
To unsubscribe from this list: send the line "unsubscribe linux-serial" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v4] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-26 19:41                 ` David Brownell
@ 2010-03-01  2:30                   ` Feng Tang
  0 siblings, 0 replies; 35+ messages in thread
From: Feng Tang @ 2010-03-01  2:30 UTC (permalink / raw)
  To: David Brownell
  Cc: Masakazu Mokuno, Greg KH, linux-serial, spi-devel-list,
	Andrew Morton, alan

On Sat, 27 Feb 2010 03:41:42 +0800
David Brownell <david-b@pacbell.net> wrote:

> On Friday 26 February 2010, Masakazu Mokuno wrote:
> > > +static int max3110_read_multi(struct uart_max3110 *max, u8 *buf)
> > > +{
> > > +     u16 obuf[M3110_RX_FIFO_DEPTH], ibuf[M3110_RX_FIFO_DEPTH];
> > 
> > Doing I/O on stack is guaranteed safe for spi functions?
> 
> Good catch ...  no it's not safe.
> 
> No DMA-enabled programming interface allows it, including SPI.
Hi David,

I agree that DMA working mode must not use stack as IO buffer, and spi core
code(spi.c/spi.h) has clearly message stating that. But this driver doesn't
intend to use DMA by design. In early version of this patch there is some
controller specific data which show "enable_dma = 0".

The reason of not using DMA for Maxim 3110 is, it is a low speed SPI UART
device, which only has one word (16b) TX buffer and 8 words RX buffer, using
DMA may benefit in some use case but will be over-kill for others. This
driver implement a console,  take one example of editing a file on the console,
each char we input will be echoed back on screen, which will use a spi_message
and a spi_transfer, if using DMA, that DMA operation length will be 2 bytes,
if the file been edited has 4K characters, there will be 4K DMA transactions,
which will occupy quiet some system load. 

Also whether a 16b word could be DMAed is still a question for some types of
DMA controllers, I know some platform whose DMA controllers can only  or
configured to only work with data at least 32 bits aligned. 

So in this driver, it leverages some options provided by SPI controller drivers
(pxa2xx and Designware) to chose not using DMA. 

Thanks,
Feng

> 
> The Documentation/PCI/PCI-DMA-mapping.txt file has a section with
> the oddly punctuated title "What memory is DMA'able?".  That's
> generic to all uses of DMA.  When it was moved to the PCI area,
> that information became harder to find ... but no less true for
> non-PCI contexts (sigh).  One relevant paragraph being:
> 
>   This rule also means that you may use neither kernel image addresses
>   (items in data/text/bss segments), nor module image addresses, nor
>   stack addresses for DMA.  These could all be mapped somewhere
> entirely different than the rest of physical memory.  Even if those
> classes of memory could physically work with DMA, you'd need to
> ensure the I/O buffers were cacheline-aligned.  Without that, you'd
> see cacheline sharing problems (data corruption) on CPUs with
> DMA-incoherent caches. (The CPU could write to one word, DMA would
> write to a different one in the same cache line, and one of them
> could be overwritten.)
> 
> Those cacheline sharing problems are particularly bad for the stack,
> since the data corruption often includes return addresses.
> 
> In short, passing a stack-based I/O buffer could work on some
> machines, but cause perplexing data corruption issues on others.  So
> don't try to do it any driver that claims to be portable.
> 
> - Dave
> 
--
To unsubscribe from this list: send the line "unsubscribe linux-serial" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v4] serial: spi: add spi-uart driver for Maxim 3110
  2010-02-26  9:59               ` Masakazu Mokuno
  2010-02-26 19:41                 ` David Brownell
@ 2010-03-02  3:38                 ` Feng Tang
  1 sibling, 0 replies; 35+ messages in thread
From: Feng Tang @ 2010-03-02  3:38 UTC (permalink / raw)
  To: Masakazu Mokuno
  Cc: Greg KH, David Brownell, linux-serial, spi-devel-list,
	Andrew Morton, alan, Grant Likely

On Fri, 26 Feb 2010 17:59:38 +0800
Masakazu Mokuno <mokuno@sm.sony.co.jp> wrote:

> Hi,
> 
> > +	u8 *pbuf, valid_str[M3110_RX_FIFO_DEPTH];
> > +	int i, j;
> > +
> > +	memset(obuf, 0, sizeof(obuf));
> > +	memset(obuf, 0, sizeof(ibuf));
> 
> memset(ibuf, 0, sizeof(ibuf))?

thanks for the catch, here is a follow on patch


diff --git a/drivers/serial/max3110.c b/drivers/serial/max3110.c
index 3283ba6..3dd2082 100644
--- a/drivers/serial/max3110.c
+++ b/drivers/serial/max3110.c
@@ -142,7 +142,7 @@ static int max3110_read_multi(struct uart_max3110 *max, u8 *buf)
 	int i, j;
 
 	memset(obuf, 0, sizeof(obuf));
-	memset(obuf, 0, sizeof(ibuf));
+	memset(ibuf, 0, sizeof(ibuf));
 
 	if (max3110_write_then_read(max, obuf, ibuf,
 				M3110_RX_FIFO_DEPTH * 2, 1))

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [PATCH v5] serial: spi: add spi-uart driver for Maxim 3110
       [not found] ` <20100208165946.0e4dde83@feng-i7>
  2010-02-09  0:20   ` Andrew Morton
@ 2010-03-03  2:57   ` Feng Tang
  2010-03-03  3:59     ` Grant Likely
  2010-03-03  4:51     ` David Brownell
  1 sibling, 2 replies; 35+ messages in thread
From: Feng Tang @ 2010-03-03  2:57 UTC (permalink / raw)
  To: Andrew Morton, Greg KH, spi-devel-list, linux-serial
  Cc: David Brownell, Grant Likely, alan

Hi All,

Here is a driver for Maxim 3110 SPI-UART device, please help to review.

It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
provides a console.

change log:
 since v4:
        * Add explanation why not using DMA
        * Fix a bug in max3110_read_multi()
 since v3:
        * Remove the Designware controller related stuff
        * Remove some initialization code which should be done in the platform
          setup code
        * Add a missing change for drivers/serial/Makefile
 since v2:
        * Address comments from Andrew Morton
        * Use test/set_bit to avoid race condition for SMP/preempt case
        * Fix bug related with endian order
 since v1:
        * Address comments from Alan Cox
        * Use a "use_irq" module parameter to runtime check whether
          to use IRQ mode
        * Add the suspend/resume implementation

Thanks!
Feng


>From 6ea4918365f5eed04f82544f0da3efe93cb2cc20 Mon Sep 17 00:00:00 2001
From: Feng Tang <feng.tang@intel.com>
Date: Fri, 26 Feb 2010 11:37:29 +0800
Subject: [PATCH] serial: spi: add spi-uart driver for Maxim 3110

This is the driver for Max3110 SPI-UART device, which connect
to host with SPI interface. It supports baud rates from 300 to
230400, and supports both polling and IRQ mode, as well as
providing a console for system use

Its datasheet could be found here:
http://datasheets.maxim-ic.com/en/ds/MAX3110E-MAX3111E.pdf

Signed-off-by: Feng Tang <feng.tang@intel.com>
Cc: David Brownell <david-b@pacbell.net>
Cc: Greg KH <greg@kroah.com>
Acked-by: Alan Cox <alan@linux.intel.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
 drivers/serial/Kconfig      |    8 +
 drivers/serial/Makefile     |    1 +
 drivers/serial/max3110.c    |  875 +++++++++++++++++++++++++++++++++++++++++++
 drivers/serial/max3110.h    |   61 +++
 include/linux/serial_core.h |    3 +
 5 files changed, 948 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/max3110.c
 create mode 100644 drivers/serial/max3110.h

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 9ff47db..94aa282 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -688,6 +688,14 @@ config SERIAL_SA1100_CONSOLE
 	  your boot loader (lilo or loadlin) about how to pass options to the
 	  kernel at boot time.)
 
+config SERIAL_MAX3110
+	tristate "SPI UART driver for Max3110"
+	depends on SPI_MASTER
+	select SERIAL_CORE
+	select SERIAL_CORE_CONSOLE
+	help
+	  This is the UART protocol driver for MAX3110 device
+
 config SERIAL_BFIN
 	tristate "Blackfin serial port support"
 	depends on BLACKFIN
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 5548fe7..b93d8a0 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
 obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
 obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o
 obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
+obj-$(CONFIG_SERIAL_MAX3110) += max3110.o
 obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
 obj-$(CONFIG_SERIAL_MUX) += mux.o
 obj-$(CONFIG_SERIAL_68328) += 68328serial.o
diff --git a/drivers/serial/max3110.c b/drivers/serial/max3110.c
new file mode 100644
index 0000000..aff0465
--- /dev/null
+++ b/drivers/serial/max3110.c
@@ -0,0 +1,875 @@
+/*
+ * max3110.c - spi uart protocol driver for Maxim 3110
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+/*
+ * Note:
+ * 1. From Max3110 spec, the Rx FIFO has 8 words, while the Tx FIFO only has
+ *    1 word. If SPI master controller doesn't support sclk frequency change,
+ *    then the char need be sent out one by one with some delay
+ *
+ * 2. Currently only RX availabe interrrupt is used
+ *
+ * 3. This driver doesn't support work with a spi cotnroller in DMA mode, and
+ *    the reason for not using DMA is:
+ *    a) Maxim 3110 is a low speed UART device, whose tx/rx buffer are very few,
+ *    and using DMA may be over-killing when working as a system console(imaging
+ *    we edit a text file on it)
+ *    b) Handling only one 16b word transfer will be very common, but non-32b
+ *    aligned DMA operation is not supported by all kinds of DMA controllers
+ *
+ *    Some spi controller drivers like Pxa2xx, Designware have option for device
+ *    driver to chose to work in poll or DMA mode. And platform driver which
+ *    enumerates Max3110 device should leverage this option to not use DMA.
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+
+#include <linux/kthread.h>
+#include <linux/delay.h>
+#include <linux/spi/spi.h>
+
+#include "max3110.h"
+
+#define PR_FMT	"max3110: "
+
+struct uart_max3110 {
+	struct uart_port port;
+	struct spi_device *spi;
+	char *name;
+
+	wait_queue_head_t wq;
+	struct task_struct *main_thread;
+	struct task_struct *read_thread;
+	spinlock_t lock;
+
+	u32 baud;
+	u16 cur_conf;
+	u8 clock;
+	u8 parity, word_7bits;
+	u16 irq;
+
+	/* bit map for UART status */
+	unsigned long flags;
+#define M3110_CON_TX_NEED	0
+#define M3110_UART_TX_NEED	1
+#define M3110_IRQ_PENDING	2
+	unsigned long mthread_up;
+
+	/* console buffer */
+	struct circ_buf con_xmit;
+};
+
+static struct uart_max3110 *pmax;
+
+static int use_irq = 1;
+module_param(use_irq, int, 0444);
+MODULE_PARM_DESC(use_irq, "Whether using Max3110's IRQ capability");
+
+static void receive_chars(struct uart_max3110 *max,
+				unsigned char *str, int len);
+static int max3110_read_multi(struct uart_max3110 *max, u8 *buf);
+static void max3110_con_receive(struct uart_max3110 *max);
+
+static int max3110_write_then_read(struct uart_max3110 *max,
+		const void *txbuf, void *rxbuf, unsigned len, int always_fast)
+{
+	struct spi_device *spi = max->spi;
+	struct spi_message	message;
+	struct spi_transfer	x;
+	int ret;
+
+	spi_message_init(&message);
+	memset(&x, 0, sizeof x);
+	x.len = len;
+	x.tx_buf = txbuf;
+	x.rx_buf = rxbuf;
+	spi_message_add_tail(&x, &message);
+
+	if (always_fast)
+		x.speed_hz = spi->max_speed_hz;
+	else if (max->baud)
+		x.speed_hz = max->baud;
+
+	/* Do the i/o */
+	ret = spi_sync(spi, &message);
+	return ret;
+}
+
+/* Write a u16 to the device, and return one u16 read back */
+static int max3110_out(struct uart_max3110 *max, const u16 out)
+{
+	u16 tmp;
+	u8  ch;
+	int ret;
+
+	ret = max3110_write_then_read(max, &out, &tmp, 2, 1);
+	if (ret) {
+		pr_warning(PR_FMT "%s(): get err msg %d when sending 0x%x\n",
+				__func__, ret, out);
+		return ret;
+	}
+
+	/* If some valid data is read back */
+	if (tmp & MAX3110_READ_DATA_AVAILABLE) {
+		ch = tmp & 0xff;
+		receive_chars(max, &ch, 1);
+	}
+
+	return ret;
+}
+
+/*
+ * This is usually used to read data from SPIC RX FIFO, which doesn't
+ * need any delay like flushing character out.
+ *
+ * Return how many valide bytes are read back
+ */
+static int max3110_read_multi(struct uart_max3110 *max, u8 *buf)
+{
+	u16 obuf[M3110_RX_FIFO_DEPTH], ibuf[M3110_RX_FIFO_DEPTH];
+	u8 *pbuf, valid_str[M3110_RX_FIFO_DEPTH];
+	int i, j, blen;
+
+	/* tx/rx always have the same length */
+	blen = sizeof(obuf);
+	memset(obuf, 0, blen);
+	memset(ibuf, 0, blen);
+
+	if (max3110_write_then_read(max, obuf, ibuf, blen, 1))
+		return 0;
+
+	/* If caller doesn't provide a buffer, then handle received char */
+	pbuf = buf ? buf : valid_str;
+
+	for (i = 0, j = 0; i < M3110_RX_FIFO_DEPTH; i++) {
+		if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
+			pbuf[j++] = ibuf[i] & 0xff;
+	}
+
+	if (j && (pbuf == valid_str))
+		receive_chars(max, valid_str, j);
+
+	return j;
+}
+
+static void serial_m3110_con_putchar(struct uart_port *port, int ch)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	struct circ_buf *xmit = &max->con_xmit;
+
+	if (uart_circ_chars_free(xmit)) {
+		xmit->buf[xmit->head] = (char)ch;
+		xmit->head = (xmit->head + 1) & (PAGE_SIZE - 1);
+	}
+}
+
+/*
+ * Print a string to the serial port trying not to disturb
+ * any possible real use of the port...
+ *
+ *	The console_lock must be held when we get here.
+ */
+static void serial_m3110_con_write(struct console *co,
+				const char *s, unsigned int count)
+{
+	if (!pmax)
+		return;
+
+	uart_console_write(&pmax->port, s, count, serial_m3110_con_putchar);
+
+	set_bit(M3110_CON_TX_NEED, &pmax->flags);
+	if (!test_bit(0, &pmax->mthread_up))
+		wake_up_process(pmax->main_thread);
+}
+
+static int __init
+serial_m3110_con_setup(struct console *co, char *options)
+{
+	struct uart_max3110 *max = pmax;
+	int baud = 115200;
+	int bits = 8;
+	int parity = 'n';
+	int flow = 'n';
+
+	pr_info(PR_FMT "setting up console\n");
+
+	if (!max) {
+		pr_err(PR_FMT "pmax is NULL, return");
+		return -ENODEV;
+	}
+
+	if (options)
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+	return uart_set_options(&max->port, co, baud, parity, bits, flow);
+}
+
+static struct tty_driver *serial_m3110_con_device(struct console *co,
+							int *index)
+{
+	struct uart_driver *p = co->data;
+	*index = co->index;
+	return p->tty_driver;
+}
+
+static struct uart_driver serial_m3110_reg;
+static struct console serial_m3110_console = {
+	.name		= "ttyS",
+	.write		= serial_m3110_con_write,
+	.device		= serial_m3110_con_device,
+	.setup		= serial_m3110_con_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+	.data		= &serial_m3110_reg,
+};
+
+
+static unsigned int serial_m3110_tx_empty(struct uart_port *port)
+{
+	return 1;
+}
+
+static void serial_m3110_stop_tx(struct uart_port *port)
+{
+	return;
+}
+
+static void serial_m3110_stop_rx(struct uart_port *port)
+{
+	return;
+}
+
+#define WORDS_PER_XFER	128
+static void send_circ_buf(struct uart_max3110 *max,
+				struct circ_buf *xmit)
+{
+	int len, blen, left = 0;
+	u16 obuf[WORDS_PER_XFER], ibuf[WORDS_PER_XFER];
+	u8 valid_str[WORDS_PER_XFER];
+	int i, j;
+	int ret = 0;
+
+	while (!uart_circ_empty(xmit)) {
+		left = uart_circ_chars_pending(xmit);
+		while (left) {
+			len = min(left, WORDS_PER_XFER);
+			blen = len * sizeof(u16);
+			memset(obuf, 0, blen);
+			memset(ibuf, 0, blen);
+
+			for (i = 0; i < len; i++) {
+				obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG;
+				xmit->tail = (xmit->tail + 1) &
+						(UART_XMIT_SIZE - 1);
+			}
+
+			/* Fail to send msg to console is not very critical */
+			ret = max3110_write_then_read(max, obuf, ibuf, blen, 0);
+			if (ret)
+				pr_warning(PR_FMT "%s(): get err msg %d\n",
+						__func__, ret);
+
+			for (i = 0, j = 0; i < len; i++) {
+				if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
+					valid_str[j++] = ibuf[i] & 0xff;
+			}
+
+			if (j)
+				receive_chars(max, valid_str, j);
+
+			max->port.icount.tx += len;
+			left -= len;
+		}
+	}
+}
+
+static void transmit_char(struct uart_max3110 *max)
+{
+	struct uart_port *port = &max->port;
+	struct circ_buf *xmit = &port->state->xmit;
+
+	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
+		return;
+
+	send_circ_buf(max, xmit);
+
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+		uart_write_wakeup(port);
+}
+
+/*
+ * This will be called by uart_write() and tty_write, can't
+ * go to sleep
+ */
+static void serial_m3110_start_tx(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+
+	set_bit(M3110_UART_TX_NEED, &max->flags);
+	if (!test_bit(0, &max->mthread_up))
+		wake_up_process(max->main_thread);
+}
+
+static void receive_chars(struct uart_max3110 *max, unsigned char *str, int len)
+{
+	struct uart_port *port = &max->port;
+	struct tty_struct *tty;
+	int usable;
+
+	/* If uart is not opened, just return */
+	if (!port->state)
+		return;
+
+	tty = port->state->port.tty;
+	if (!tty)
+		return;
+
+	while (len) {
+		usable = tty_buffer_request_room(tty, len);
+		if (usable) {
+			tty_insert_flip_string(tty, str, usable);
+			str += usable;
+			port->icount.rx += usable;
+		}
+		len -= usable;
+	}
+	tty_flip_buffer_push(tty);
+}
+
+/*
+ * This routine will be used in read_thread or RX IRQ handling,
+ * it will first do one round buffer read(8 words), if there is some
+ * valid RX data, will try to read 5 more rounds till all data
+ * is read out.
+ *
+ * Use stack space as data buffer to save some system load, and chose
+ * 504 Btyes as a threadhold to do a bulk push to upper tty layer when
+ * receiving bulk data, a much bigger buffer may cause stack overflow
+ */
+static void max3110_con_receive(struct uart_max3110 *max)
+{
+	int loop = 1, num, total = 0;
+	u8 recv_buf[512], *pbuf;
+
+	pbuf = recv_buf;
+	do {
+		num = max3110_read_multi(max, pbuf);
+
+		if (num) {
+			loop = 5;
+			pbuf += num;
+			total += num;
+
+			if (total >= 504) {
+				receive_chars(max, recv_buf, total);
+				pbuf = recv_buf;
+				total = 0;
+			}
+		}
+	} while (--loop);
+
+	if (total)
+		receive_chars(max, recv_buf, total);
+}
+
+static int max3110_main_thread(void *_max)
+{
+	struct uart_max3110 *max = _max;
+	wait_queue_head_t *wq = &max->wq;
+	int ret = 0;
+	struct circ_buf *xmit = &max->con_xmit;
+
+	init_waitqueue_head(wq);
+	pr_info(PR_FMT "start main thread\n");
+
+	do {
+		wait_event_interruptible(*wq,
+				max->flags || kthread_should_stop());
+		test_and_set_bit(0, &max->mthread_up);
+
+		if (use_irq && test_bit(M3110_IRQ_PENDING, &max->flags)) {
+			max3110_con_receive(max);
+			clear_bit(M3110_IRQ_PENDING, &max->flags);
+		}
+
+		/* First handle console output */
+		if (test_bit(M3110_CON_TX_NEED, &max->flags)) {
+			send_circ_buf(max, xmit);
+			clear_bit(M3110_CON_TX_NEED, &max->flags);
+		}
+
+		/* Handle uart output */
+		if (test_bit(M3110_UART_TX_NEED, &max->flags)) {
+			transmit_char(max);
+			clear_bit(M3110_UART_TX_NEED, &max->flags);
+		}
+		test_and_clear_bit(0, &max->mthread_up);
+	} while (!kthread_should_stop());
+
+	return ret;
+}
+
+static irqreturn_t serial_m3110_irq(int irq, void *dev_id)
+{
+	struct uart_max3110 *max = dev_id;
+
+	/* max3110's irq is a falling edge, not level triggered,
+	 * so no need to disable the irq */
+	set_bit(M3110_IRQ_PENDING, &max->flags);
+
+	if (!test_bit(0, &max->mthread_up))
+		wake_up_process(max->main_thread);
+
+	return IRQ_HANDLED;
+}
+
+/* If don't use RX IRQ, then need a thread to polling read */
+static int max3110_read_thread(void *_max)
+{
+	struct uart_max3110 *max = _max;
+
+	pr_info(PR_FMT "start read thread\n");
+	do {
+		if (!test_bit(0, &max->mthread_up))
+			max3110_con_receive(max);
+
+		schedule_timeout_interruptible(HZ / 20);
+	} while (!kthread_should_stop());
+
+	return 0;
+}
+
+static int serial_m3110_startup(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	u16 config = 0;
+	int ret = 0;
+
+	if (port->line != 0) {
+		pr_err(PR_FMT "uart port startup failed\n");
+		return -1;
+	}
+
+	/* Disable all IRQ and config it to 115200, 8n1 */
+	config = WC_TAG | WC_FIFO_ENABLE
+			| WC_1_STOPBITS
+			| WC_8BIT_WORD
+			| WC_BAUD_DR2;
+
+	/* As we use thread to handle tx/rx, need set low latency */
+	port->state->port.tty->low_latency = 1;
+
+	if (use_irq) {
+		ret = request_irq(max->irq, serial_m3110_irq,
+					IRQ_TYPE_EDGE_FALLING, "max3110", max);
+		if (ret)
+			return ret;
+
+		/* Enable RX IRQ only */
+		config |= WC_RXA_IRQ_ENABLE;
+	} else {
+		/* If IRQ is disabled, start a read thread for input data */
+		max->read_thread =
+			kthread_run(max3110_read_thread, max, "max3110_read");
+		if (IS_ERR(max->read_thread)) {
+			ret = PTR_ERR(max->read_thread);
+			max->read_thread = 0;
+			pr_err(PR_FMT "Can't create read thread!");
+			return ret;
+		}
+	}
+
+	ret = max3110_out(max, config);
+	if (ret) {
+		if (use_irq)
+			free_irq(max->irq, max);
+		else
+			kthread_stop(max->read_thread);
+
+		return ret;
+	}
+
+	max->cur_conf = config;
+	return 0;
+}
+
+static void serial_m3110_shutdown(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	u16 config;
+
+	if (max->read_thread) {
+		kthread_stop(max->read_thread);
+		max->read_thread = NULL;
+	}
+
+	if (use_irq)
+		free_irq(max->irq, max);
+
+	/* Disable interrupts from this port */
+	config = WC_TAG | WC_SW_SHDI;
+	max3110_out(max, config);
+}
+
+static void serial_m3110_release_port(struct uart_port *port)
+{
+}
+
+static int serial_m3110_request_port(struct uart_port *port)
+{
+	return 0;
+}
+
+static void serial_m3110_config_port(struct uart_port *port, int flags)
+{
+	port->type = PORT_MAX3110;
+}
+
+static int
+serial_m3110_verify_port(struct uart_port *port, struct serial_struct *ser)
+{
+	/* We don't want the core code to modify any port params */
+	return -EINVAL;
+}
+
+
+static const char *serial_m3110_type(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	return max->name;
+}
+
+static void
+serial_m3110_set_termios(struct uart_port *port, struct ktermios *termios,
+		       struct ktermios *old)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	unsigned char cval;
+	unsigned int baud, parity = 0;
+	int clk_div = -1;
+	u16 new_conf = max->cur_conf;
+
+	switch (termios->c_cflag & CSIZE) {
+	case CS7:
+		cval = UART_LCR_WLEN7;
+		new_conf |= WC_7BIT_WORD;
+		break;
+	default:
+		/* We only support CS7 & CS8 */
+		termios->c_cflag &= ~CSIZE;
+		termios->c_cflag |= CS8;
+	case CS8:
+		cval = UART_LCR_WLEN8;
+		new_conf |= WC_8BIT_WORD;
+		break;
+	}
+
+	baud = uart_get_baud_rate(port, termios, old, 0, 230400);
+
+	/* First calc the div for 1.8MHZ clock case */
+	switch (baud) {
+	case 300:
+		clk_div = WC_BAUD_DR384;
+		break;
+	case 600:
+		clk_div = WC_BAUD_DR192;
+		break;
+	case 1200:
+		clk_div = WC_BAUD_DR96;
+		break;
+	case 2400:
+		clk_div = WC_BAUD_DR48;
+		break;
+	case 4800:
+		clk_div = WC_BAUD_DR24;
+		break;
+	case 9600:
+		clk_div = WC_BAUD_DR12;
+		break;
+	case 19200:
+		clk_div = WC_BAUD_DR6;
+		break;
+	case 38400:
+		clk_div = WC_BAUD_DR3;
+		break;
+	case 57600:
+		clk_div = WC_BAUD_DR2;
+		break;
+	case 115200:
+		clk_div = WC_BAUD_DR1;
+		break;
+	case 230400:
+		if (max->clock & MAX3110_HIGH_CLK)
+			break;
+	default:
+		/* Pick the previous baud rate */
+		baud = max->baud;
+		clk_div = max->cur_conf & WC_BAUD_DIV_MASK;
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	if (max->clock & MAX3110_HIGH_CLK) {
+		clk_div += 1;
+		/* High clk version max3110 doesn't support B300 */
+		if (baud == 300)
+			baud = 600;
+		if (baud == 230400)
+			clk_div = WC_BAUD_DR1;
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	new_conf = (new_conf & ~WC_BAUD_DIV_MASK) | clk_div;
+
+	if (unlikely(termios->c_cflag & CMSPAR))
+		termios->c_cflag &= ~CMSPAR;
+
+	if (termios->c_cflag & CSTOPB)
+		new_conf |= WC_2_STOPBITS;
+	else
+		new_conf &= ~WC_2_STOPBITS;
+
+	if (termios->c_cflag & PARENB) {
+		new_conf |= WC_PARITY_ENABLE;
+		parity |= UART_LCR_PARITY;
+	} else
+		new_conf &= ~WC_PARITY_ENABLE;
+
+	if (!(termios->c_cflag & PARODD))
+		parity |= UART_LCR_EPAR;
+	max->parity = parity;
+
+	uart_update_timeout(port, termios->c_cflag, baud);
+
+	new_conf |= WC_TAG;
+	if (new_conf != max->cur_conf) {
+		if (!max3110_out(max, new_conf)) {
+			max->cur_conf = new_conf;
+			max->baud = baud;
+		}
+	}
+}
+
+/* Don't handle hw handshaking */
+static unsigned int serial_m3110_get_mctrl(struct uart_port *port)
+{
+	return TIOCM_DSR | TIOCM_CAR | TIOCM_DSR;
+}
+
+static void serial_m3110_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+}
+
+static void serial_m3110_break_ctl(struct uart_port *port, int break_state)
+{
+}
+
+static void serial_m3110_pm(struct uart_port *port, unsigned int state,
+			unsigned int oldstate)
+{
+}
+
+static void serial_m3110_enable_ms(struct uart_port *port)
+{
+}
+
+struct uart_ops serial_m3110_ops = {
+	.tx_empty	= serial_m3110_tx_empty,
+	.set_mctrl	= serial_m3110_set_mctrl,
+	.get_mctrl	= serial_m3110_get_mctrl,
+	.stop_tx	= serial_m3110_stop_tx,
+	.start_tx	= serial_m3110_start_tx,
+	.stop_rx	= serial_m3110_stop_rx,
+	.enable_ms	= serial_m3110_enable_ms,
+	.break_ctl	= serial_m3110_break_ctl,
+	.startup	= serial_m3110_startup,
+	.shutdown	= serial_m3110_shutdown,
+	.set_termios	= serial_m3110_set_termios,
+	.pm		= serial_m3110_pm,
+	.type		= serial_m3110_type,
+	.release_port	= serial_m3110_release_port,
+	.request_port	= serial_m3110_request_port,
+	.config_port	= serial_m3110_config_port,
+	.verify_port	= serial_m3110_verify_port,
+};
+
+static struct uart_driver serial_m3110_reg = {
+	.owner		= THIS_MODULE,
+	.driver_name	= "Maxim 3110",
+	.dev_name	= "ttyS",
+	.major		= TTY_MAJOR,
+	.minor		= 64,
+	.nr		= 1,
+	.cons		= &serial_m3110_console,
+};
+
+#ifdef CONFIG_PM
+static int serial_m3110_suspend(struct spi_device *spi, pm_message_t state)
+{
+	disable_irq(pmax->irq);
+	uart_suspend_port(&serial_m3110_reg, &pmax->port);
+	max3110_out(pmax, pmax->cur_conf | WC_SW_SHDI);
+	return 0;
+}
+
+static int serial_m3110_resume(struct spi_device *spi)
+{
+	max3110_out(pmax, pmax->cur_conf);
+	uart_resume_port(&serial_m3110_reg, &pmax->port);
+	enable_irq(pmax->irq);
+	return 0;
+}
+#else
+#define serial_m3110_suspend	NULL
+#define serial_m3110_resume	NULL
+#endif
+
+static int __devinit serial_m3110_probe(struct spi_device *spi)
+{
+	struct uart_max3110 *max;
+	int ret;
+	void *buffer;
+
+	max = kzalloc(sizeof(*max), GFP_KERNEL);
+	if (!max)
+		return -ENOMEM;
+
+	spi->bits_per_word = 16;
+	spi_setup(spi);
+
+	max->clock = MAX3110_HIGH_CLK;
+	max->port.type = PORT_MAX3110;
+	max->port.fifosize = 2;		/* Only have 16b buffer */
+	max->port.ops = &serial_m3110_ops;
+	max->port.line = 0;
+	max->port.dev = &spi->dev;
+	max->port.uartclk = 115200;
+
+	max->spi = spi;
+	max->name = spi->modalias;	/* Use spi name as the name */
+	max->irq = (u16)spi->irq;
+	spin_lock_init(&max->lock);
+
+	max->word_7bits = 0;
+	max->parity = 0;
+	max->baud = 0;
+
+	max->cur_conf = 0;
+	max->flags = 0;
+
+	buffer = (void *)__get_free_page(GFP_KERNEL);
+	if (!buffer) {
+		ret = -ENOMEM;
+		goto err_get_page;
+	}
+	max->con_xmit.buf = buffer;
+	max->con_xmit.head = max->con_xmit.tail = 0;
+
+	max->main_thread = kthread_run(max3110_main_thread,
+					max, "max3110_main");
+	if (IS_ERR(max->main_thread)) {
+		ret = PTR_ERR(max->main_thread);
+		goto err_kthread;
+	}
+
+	pmax = max;
+	/* Give membase a psudo value to pass serial_core's check */
+	max->port.membase = buffer;
+	uart_add_one_port(&serial_m3110_reg, &max->port);
+
+	return 0;
+
+err_kthread:
+	free_page((unsigned long)buffer);
+err_get_page:
+	pmax = NULL;
+	kfree(max);
+	return ret;
+}
+
+static int __devexit max3110_remove(struct spi_device *dev)
+{
+	struct uart_max3110 *max = pmax;
+
+	if (!pmax)
+		return 0;
+
+	pmax = NULL;
+	uart_remove_one_port(&serial_m3110_reg, &max->port);
+
+	free_page((unsigned long)max->con_xmit.buf);
+
+	if (max->main_thread)
+		kthread_stop(max->main_thread);
+
+	kfree(max);
+	return 0;
+}
+
+static struct spi_driver uart_max3110_driver = {
+	.driver = {
+			.name	= "spi_max3110",
+			.bus	= &spi_bus_type,
+			.owner	= THIS_MODULE,
+	},
+	.probe		= serial_m3110_probe,
+	.remove		= __devexit_p(max3110_remove),
+	.suspend	= serial_m3110_suspend,
+	.resume		= serial_m3110_resume,
+};
+
+static int __init serial_m3110_init(void)
+{
+	int ret = 0;
+
+	ret = uart_register_driver(&serial_m3110_reg);
+	if (ret)
+		return ret;
+
+	ret = spi_register_driver(&uart_max3110_driver);
+	if (ret)
+		uart_unregister_driver(&serial_m3110_reg);
+
+	return ret;
+}
+
+static void __exit serial_m3110_exit(void)
+{
+	spi_unregister_driver(&uart_max3110_driver);
+	uart_unregister_driver(&serial_m3110_reg);
+}
+
+module_init(serial_m3110_init);
+module_exit(serial_m3110_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("max3110-uart");
+MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
diff --git a/drivers/serial/max3110.h b/drivers/serial/max3110.h
new file mode 100644
index 0000000..4d58641
--- /dev/null
+++ b/drivers/serial/max3110.h
@@ -0,0 +1,61 @@
+#ifndef _MAX3110_HEAD_FILE_
+#define _MAX3110_HEAD_FILE_
+
+#define MAX3110_HIGH_CLK	0x1	/* 3.6864 MHZ */
+#define MAX3110_LOW_CLK		0x0	/* 1.8432 MHZ */
+
+/* Status bits for all 4 MAX3110 operate modes */
+#define MAX3110_READ_DATA_AVAILABLE	(1 << 15)
+#define MAX3110_WRITE_BUF_EMPTY		(1 << 14)
+
+#define WC_TAG			(3 << 14)
+#define RC_TAG			(1 << 14)
+#define WD_TAG			(2 << 14)
+#define RD_TAG			(0 << 14)
+
+/* Bits def for write configuration */
+#define WC_FIFO_ENABLE_MASK	(1 << 13)
+#define WC_FIFO_ENABLE		(0 << 13)
+
+#define WC_SW_SHDI		(1 << 12)
+
+#define WC_IRQ_MASK		(0xF << 8)
+#define WC_TXE_IRQ_ENABLE	(1 << 11)	/* TX empty irq */
+#define WC_RXA_IRQ_ENABLE	(1 << 10)	/* RX availabe irq */
+#define WC_PAR_HIGH_IRQ_ENABLE	(1 << 9)
+#define WC_REC_ACT_IRQ_ENABLE	(1 << 8)
+
+#define WC_IRDA_ENABLE		(1 << 7)
+
+#define WC_STOPBITS_MASK	(1 << 6)
+#define WC_2_STOPBITS		(1 << 6)
+#define WC_1_STOPBITS		(0 << 6)
+
+#define WC_PARITY_ENABLE_MASK	(1 << 5)
+#define WC_PARITY_ENABLE	(1 << 5)
+
+#define WC_WORDLEN_MASK		(1 << 4)
+#define WC_7BIT_WORD		(1 << 4)
+#define WC_8BIT_WORD		(0 << 4)
+
+#define WC_BAUD_DIV_MASK	(0xF)
+#define WC_BAUD_DR1		(0x0)
+#define WC_BAUD_DR2		(0x1)
+#define WC_BAUD_DR4		(0x2)
+#define WC_BAUD_DR8		(0x3)
+#define WC_BAUD_DR16		(0x4)
+#define WC_BAUD_DR32		(0x5)
+#define WC_BAUD_DR64		(0x6)
+#define WC_BAUD_DR128		(0x7)
+#define WC_BAUD_DR3		(0x8)
+#define WC_BAUD_DR6		(0x9)
+#define WC_BAUD_DR12		(0xA)
+#define WC_BAUD_DR24		(0xB)
+#define WC_BAUD_DR48		(0xC)
+#define WC_BAUD_DR96		(0xD)
+#define WC_BAUD_DR192		(0xE)
+#define WC_BAUD_DR384		(0xF)
+
+/* Maxim 3110 has 8 words RX FIFO and 1 word TX FIFO */
+#define M3110_RX_FIFO_DEPTH	8
+#endif
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 8c3dd36..119ba73 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -182,6 +182,9 @@
 /* Aeroflex Gaisler GRLIB APBUART */
 #define PORT_APBUART    90
 
+/* Maxim M3110 */
+#define PORT_MAX3110	91
+
 #ifdef __KERNEL__
 
 #include <linux/compiler.h>
-- 
1.6.3.3

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v5] serial: spi: add spi-uart driver for Maxim 3110
  2010-03-03  2:57   ` [PATCH v5] " Feng Tang
@ 2010-03-03  3:59     ` Grant Likely
  2010-03-03  4:51     ` David Brownell
  1 sibling, 0 replies; 35+ messages in thread
From: Grant Likely @ 2010-03-03  3:59 UTC (permalink / raw)
  To: Feng Tang
  Cc: Andrew Morton, Greg KH, spi-devel-list, linux-serial,
	David Brownell, alan

On Tue, Mar 2, 2010 at 7:57 PM, Feng Tang <feng.tang@intel.com> wrote:
> Hi All,
>
> Here is a driver for Maxim 3110 SPI-UART device, please help to review.
>
> It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
> dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
> provides a console.
>
> change log:
>  since v4:
>        * Add explanation why not using DMA
>        * Fix a bug in max3110_read_multi()
>  since v3:
>        * Remove the Designware controller related stuff
>        * Remove some initialization code which should be done in the platform
>          setup code
>        * Add a missing change for drivers/serial/Makefile
>  since v2:
>        * Address comments from Andrew Morton
>        * Use test/set_bit to avoid race condition for SMP/preempt case
>        * Fix bug related with endian order
>  since v1:
>        * Address comments from Alan Cox
>        * Use a "use_irq" module parameter to runtime check whether
>          to use IRQ mode
>        * Add the suspend/resume implementation
[...]
> + *
> + * 3. This driver doesn't support work with a spi cotnroller in DMA mode, and
> + *    the reason for not using DMA is:
> + *    a) Maxim 3110 is a low speed UART device, whose tx/rx buffer are very few,
> + *    and using DMA may be over-killing when working as a system console(imaging
> + *    we edit a text file on it)
> + *    b) Handling only one 16b word transfer will be very common, but non-32b
> + *    aligned DMA operation is not supported by all kinds of DMA controllers
> + *
> + *    Some spi controller drivers like Pxa2xx, Designware have option for device
> + *    driver to chose to work in poll or DMA mode. And platform driver which
> + *    enumerates Max3110 device should leverage this option to not use DMA.

Between this, reading through the other comments, and the existence of
the max3100 driver, I'm less and less comfortable with this driver.
First, if this driver gets merged, then it is quite likely that
neither you or the 3100 author will get around to merging them.
Second, as others have pointed out, this driver is making assumptions
about the SPI bus that it has no business making.  The fact that it
doesn't work with DMA isn't a design choice, it is a bug and whether
or not it is a low speed uart device is completely beside the point.

I'm generally not involved with the serial device drivers, but FWIW,
I'm no longer in favor of this driver getting merged.  If you really
want to get it merged, then I recommend asking Greg to pick it up into
staging so that there is some imperative to fix it up and merge it
with the max3100 driver.

g.
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^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v5] serial: spi: add spi-uart driver for Maxim 3110
  2010-03-03  2:57   ` [PATCH v5] " Feng Tang
  2010-03-03  3:59     ` Grant Likely
@ 2010-03-03  4:51     ` David Brownell
  2010-03-03  5:52       ` Feng Tang
  1 sibling, 1 reply; 35+ messages in thread
From: David Brownell @ 2010-03-03  4:51 UTC (permalink / raw)
  To: Feng Tang
  Cc: Andrew Morton, Greg KH, spi-devel-list, linux-serial, Grant Likely, alan

On Tuesday 02 March 2010, Feng Tang wrote:
> + * 3. This driver doesn't support work with a spi cotnroller in DMA mode, 

As Grant said:  That's a bug ... one that will randomly
kick in based on whether the underlying SPI controller driver
happens to use DMA for a given transaction.



^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v5] serial: spi: add spi-uart driver for Maxim 3110
  2010-03-03  4:51     ` David Brownell
@ 2010-03-03  5:52       ` Feng Tang
  2010-03-03  6:16         ` David Brownell
  0 siblings, 1 reply; 35+ messages in thread
From: Feng Tang @ 2010-03-03  5:52 UTC (permalink / raw)
  To: David Brownell
  Cc: Andrew Morton, Greg KH, spi-devel-list, linux-serial, Grant Likely, alan

On Wed, 3 Mar 2010 12:51:58 +0800
David Brownell <david-b@pacbell.net> wrote:

> On Tuesday 02 March 2010, Feng Tang wrote:
> > + * 3. This driver doesn't support work with a spi cotnroller in
> > DMA mode, 
> 
> As Grant said:  That's a bug ... one that will randomly
> kick in based on whether the underlying SPI controller driver
> happens to use DMA for a given transaction.
> 
> 
>From this perspective, yes, it's a bug that this driver use non DMA-safe
IO buffer, which prevents it to be portable for all kinds of controllers,
and I can make it DMA safe. 

But I still don't think it's a good idea to use DMA for Max3110 for
performance reason, I know there is some spi controller who only works in
DMA mode. 

Here comes another idea, can we add a capability flag in struct spi_master
indicating the master supporting poll or dma or both. Also we add similar
bits in struct spi_transfer indicating the this transfer wants to be handled
in poll or dma mode. For spi controller driver, it can claim its
capability when registering as a spi_master, for a spi device driver, it can
select the working mode based on spi_master's capability and set the working
mode in struct spi_transfer. Then controller and device don't need to guess
what the other is capable, and make the info public. Any thoughts?

Thanks,
Feng

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v5] serial: spi: add spi-uart driver for Maxim 3110
  2010-03-03  5:52       ` Feng Tang
@ 2010-03-03  6:16         ` David Brownell
  2010-03-03  6:37           ` Feng Tang
  0 siblings, 1 reply; 35+ messages in thread
From: David Brownell @ 2010-03-03  6:16 UTC (permalink / raw)
  To: Feng Tang
  Cc: Andrew Morton, Greg KH, spi-devel-list, linux-serial, Grant Likely, alan

On Tuesday 02 March 2010, Feng Tang wrote:
> On Wed, 3 Mar 2010 12:51:58 +0800
> David Brownell <david-b@pacbell.net> wrote:
> 
> > On Tuesday 02 March 2010, Feng Tang wrote:
> > > + * 3. This driver doesn't support work with a spi cotnroller in
> > > DMA mode, 
> > 
> > As Grant said:  That's a bug ... one that will randomly
> > kick in based on whether the underlying SPI controller driver
> > happens to use DMA for a given transaction.
> > 
> > 
> From this perspective, yes, it's a bug that this driver use non DMA-safe
> IO buffer, which prevents it to be portable for all kinds of controllers,

Yes, that's a bug ... you're using a programming interface which
has portability as a core goal.  In an operating system kernel
which also has such a goal.


> and I can make it DMA safe. 

That's the right solution.


> Here comes another idea, can we add a capability flag in struct spi_master
> indicating the master supporting poll or dma or both. Also we add similar
> bits in struct spi_transfer indicating the this transfer wants to be handled
> in poll or dma mode.

Let's not do either of those.  There's no need to introduce such complexity,
or to enable the associated new failure modes and bugs.

Much simpler to just use DMA-safe I/O buffers in the first place ... which is
what pretty much every driver stack in Linux already expects or requires.

- Dave


^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v5] serial: spi: add spi-uart driver for Maxim 3110
  2010-03-03  6:16         ` David Brownell
@ 2010-03-03  6:37           ` Feng Tang
  2010-03-03  7:25             ` David Brownell
  0 siblings, 1 reply; 35+ messages in thread
From: Feng Tang @ 2010-03-03  6:37 UTC (permalink / raw)
  To: David Brownell
  Cc: Andrew Morton, Greg KH, spi-devel-list, linux-serial, Grant Likely, alan


> 
> > Here comes another idea, can we add a capability flag in struct
> > spi_master indicating the master supporting poll or dma or both.
> > Also we add similar bits in struct spi_transfer indicating the this
> > transfer wants to be handled in poll or dma mode.
> 
> Let's not do either of those.  There's no need to introduce such
> complexity, or to enable the associated new failure modes and bugs.

This idea has nothing to do with the dma-safe problem you pointed out, I will
make the buffer dma safe anyway.

What I proposed just wants to provide some flexibility for protocol device
drivers, it will use dma-safe buffer always, but it prefer not to use DMA
for its one-word transfers, and hope to have a choice to do that. For current
existing controller and device drivers, they can simply ignore the new 
working mode setting in struct spi_master and spi_transfer and leave them
as 0.

Thanks,
Feng

> 
> Much simpler to just use DMA-safe I/O buffers in the first place ...
> which is what pretty much every driver stack in Linux already expects
> or requires.
> 
> - Dave
> 

^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v5] serial: spi: add spi-uart driver for Maxim 3110
  2010-03-03  6:37           ` Feng Tang
@ 2010-03-03  7:25             ` David Brownell
  2010-03-03  7:42               ` Feng Tang
  0 siblings, 1 reply; 35+ messages in thread
From: David Brownell @ 2010-03-03  7:25 UTC (permalink / raw)
  To: Feng Tang
  Cc: Andrew Morton, Greg KH, spi-devel-list, linux-serial, Grant Likely, alan

On Tuesday 02 March 2010, Feng Tang wrote:
> > > Here comes another idea, can we add a capability flag in struct
> > > spi_master indicating the master supporting poll or dma or both.
> > > Also we add similar bits in struct spi_transfer indicating the this
> > > transfer wants to be handled in poll or dma mode.
> > 
> > Let's not do either of those.  There's no need to introduce such
> > complexity, or to enable the associated new failure modes and bugs.
> 
> This idea has nothing to do with the dma-safe problem you pointed out,

Your comment has nothing to do with my response.  Are you implying that
your suggestions do *NOT* introduce complexity, including new failure
modes and thus the possibility of new confusing types of bugs?


> I will 
> make the buffer dma safe anyway.

Good ...

 
> What I proposed just wants to provide some flexibility for protocol device
> drivers, it will use dma-safe buffer always, but it prefer not to use DMA
> for its one-word transfers,

That kind of heuristic is something the SPI controller driver could
already apply if it's a good tradeoff on that hardware.  (Considering
also the extra added complexity, failure modes, and potential for new
flavors of bug...)

Of course, drivers like the max3110 are high enough in the driver
stack that they can only guess about such tradeoffs.  (And thus
most drivers will likely guess wrong...)


> and hope to have a choice to do that. For current 
> existing controller and device drivers, they can simply ignore the new 
> working mode setting in struct spi_master and spi_transfer and leave them
> as 0.

If someone decided to update a SPI controller driver to avoid DMA in
some cases, in favor of PIO, they could already code such heuristics
without needing your proposed hinting from upper layers.

The result in the low-level driver would be just to use a different
test (maybe "is this a one-word transfer?" instead of checking your
per-transfer "use PIO?" hint) before kicking in whatever logic you
think would improve performance (by eliminating DMA setup and teardown
costs, including cache cleaning).

- Dave

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^ permalink raw reply	[flat|nested] 35+ messages in thread

* Re: [PATCH v5] serial: spi: add spi-uart driver for Maxim 3110
  2010-03-03  7:25             ` David Brownell
@ 2010-03-03  7:42               ` Feng Tang
  0 siblings, 0 replies; 35+ messages in thread
From: Feng Tang @ 2010-03-03  7:42 UTC (permalink / raw)
  To: David Brownell
  Cc: Andrew Morton, Greg KH, spi-devel-list, linux-serial, Grant Likely, alan

On Wed, 3 Mar 2010 15:25:52 +0800
David Brownell <david-b@pacbell.net> wrote:

> If someone decided to update a SPI controller driver to avoid DMA in
> some cases, in favor of PIO, they could already code such heuristics
> without needing your proposed hinting from upper layers.
> 
> The result in the low-level driver would be just to use a different
> test (maybe "is this a one-word transfer?" instead of checking your
> per-transfer "use PIO?" hint)

Yup, good point, controller driver can be smarter

Thanks,
Feng
> before kicking in whatever logic you
> think would improve performance (by eliminating DMA setup and teardown
> costs, including cache cleaning).
> 
> - Dave
> 

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110
@ 2009-12-29 14:20 Feng Tang
  0 siblings, 0 replies; 35+ messages in thread
From: Feng Tang @ 2009-12-29 14:20 UTC (permalink / raw)
  To: Greg Kroah-Hartman, David Brownell, Grant Likely, spi-devel-list
  Cc: Andrew Morton

Hi All,

Here is a driver for Maxim 3110 SPI-UART device, please help to review.

It has been validated with Designware SPI controller (drivers/spi: dw_spi.c &
dw_spi_pci.c). It supports polling and IRQ mode, supports batch read, and
provides a console.

As a RFC, the driver doesn't have a valid UART port type yet, but borrow
PORT_PXA. I would apply one if there is no main objection for it.

Thanks!


Feng

>From 3155eec53d8b1193cae1dce2b0491e86892e6933 Mon Sep 17 00:00:00 2001
From: Feng Tang <feng.tang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Date: Tue, 29 Dec 2009 17:11:17 +0800
Subject: [PATCH] serial: spi: add spi-uart driver for Maxim 3110

This is the driver for Max3110 SPI-UART device, which connect
to host with SPI interface. It supports baud rates from 300 to
230400. It supports both polling and IRQ mode, as well as
providing a console for system use

Its datasheet could be found here:
http://datasheets.maxim-ic.com/en/ds/MAX3110E-MAX3111E.pdf

Signed-off-by: Feng Tang <feng.tang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
---
 drivers/serial/Kconfig   |   17 +
 drivers/serial/max3110.c |  842 ++++++++++++++++++++++++++++++++++++++++++++++
 drivers/serial/max3110.h |   59 ++++
 3 files changed, 918 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/max3110.c
 create mode 100644 drivers/serial/max3110.h

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 9ff47db..b8d24ae 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -688,6 +688,23 @@ config SERIAL_SA1100_CONSOLE
 	  your boot loader (lilo or loadlin) about how to pass options to the
 	  kernel at boot time.)
 
+config SERIAL_MAX3110
+	tristate "SPI UART driver for Max3110"
+	select SERIAL_CORE
+	select SERIAL_CORE_CONSOLE
+	help
+	  This is the UART protocol driver for MAX3110 device
+
+config MAX3110_DESIGNWARE
+	boolean "Enable Max3110 to work with Designware controller"
+	default y
+	depends on SERIAL_MAX3110
+
+config MAX3110_IRQ
+	boolean "Enable IRQ for Max3110"
+	default n
+	depends on SERIAL_MAX3110
+
 config SERIAL_BFIN
 	tristate "Blackfin serial port support"
 	depends on BLACKFIN
diff --git a/drivers/serial/max3110.c b/drivers/serial/max3110.c
new file mode 100644
index 0000000..1923ade
--- /dev/null
+++ b/drivers/serial/max3110.c
@@ -0,0 +1,842 @@
+/*
+ * max3110.c - spi uart protocol driver for Maxim 3110
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+/*
+ * Note:
+ * * From Max3110 spec, the Rx FIFO has 8 words, while the Tx FIFO only has
+ *   1 word. If SPI master controller doesn't support sclk frequency change,
+ *   then the char need be sent out one by one with some delay
+ *
+ * * Currently only RX availabe interrrupt is used
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/platform_device.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+
+#include <linux/kthread.h>
+#include <linux/delay.h>
+#include <asm/atomic.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/dw_spi.h>
+
+#include "max3110.h"
+
+#define PR_FMT	"max3110: "
+
+struct uart_max3110 {
+	struct uart_port port;
+	struct spi_device *spi;
+	char *name;
+
+	wait_queue_head_t wq;
+	struct task_struct *main_thread;
+	struct task_struct *read_thread;
+	int mthread_up;
+	spinlock_t lock;
+
+	u32 baud;
+	u16 cur_conf;
+	u8 clock;
+	u8 parity, word_7bits;
+
+	atomic_t uart_tx_need;
+
+	/* console related */
+	struct circ_buf con_xmit;
+	atomic_t con_tx_need;
+
+	/* irq related */
+	u16 irq;
+	atomic_t irq_pending;
+};
+
+struct uart_max3110 *pmax;
+static void receive_chars(struct uart_max3110 *max,
+				unsigned char *str, int len);
+static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf);
+static void max3110_con_receive(struct uart_max3110 *max);
+
+int max3110_write_then_read(struct uart_max3110 *max,
+		const u8 *txbuf, u8 *rxbuf, unsigned len, int always_fast)
+{
+	struct spi_device *spi = max->spi;
+	struct spi_message	message;
+	struct spi_transfer	x;
+	int ret;
+
+	if (!txbuf || !rxbuf)
+		return -EINVAL;
+
+	spi_message_init(&message);
+	memset(&x, 0, sizeof x);
+	x.len = len;
+	x.tx_buf = txbuf;
+	x.rx_buf = rxbuf;
+	spi_message_add_tail(&x, &message);
+
+	if (always_fast)
+		x.speed_hz = spi->max_speed_hz;
+	else if (max->baud)
+		x.speed_hz = max->baud;
+
+	/* Do the i/o */
+	ret = spi_sync(spi, &message);
+	return ret;
+}
+
+/* Write a u16 to the device, and return one u16 read back */
+int max3110_out(struct uart_max3110 *max, const u16 out)
+{
+	u16 tmp;
+	int ret;
+
+	ret = max3110_write_then_read(max, (u8 *)&out, (u8 *)&tmp, 2, 1);
+	if (ret)
+		return ret;
+
+	/* If some valid data is read back */
+	if (tmp & MAX3110_READ_DATA_AVAILABLE) {
+		tmp &= 0xff;
+		receive_chars(max, (unsigned char *)&tmp, 1);
+	}
+
+	return ret;
+}
+
+#define MAX_READ_LEN	20
+/*
+ * This is usually used to read data from SPIC RX FIFO, which doesn't
+ * need any delay like flushing character out.
+ * Returns how many valide bytes are read back
+ */
+static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf)
+{
+	u16 out[MAX_READ_LEN], in[MAX_READ_LEN];
+	u8 *pbuf, valid_str[MAX_READ_LEN];
+	int i, j, bytelen;
+
+	if (len > MAX_READ_LEN) {
+		pr_err(PR_FMT "read len %d is too large\n", len);
+		return 0;
+	}
+
+	bytelen = len * 2;
+	memset(out, 0, bytelen);
+	memset(in, 0, bytelen);
+
+	if (max3110_write_then_read(max, (u8 *)out, (u8 *)in, bytelen, 1))
+		return 0;
+
+	/* If caller doesn't provide a buffer, then handle received char */
+	pbuf = buf ? buf : valid_str;
+
+	for (i = 0, j = 0; i < len; i++) {
+		if (in[i] & MAX3110_READ_DATA_AVAILABLE)
+			pbuf[j++] = (u8)(in[i] & 0xff);
+	}
+
+	if (j && (pbuf == valid_str))
+		receive_chars(max, valid_str, j);
+
+	return j;
+}
+
+static void serial_m3110_con_putchar(struct uart_port *port, int ch)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	struct circ_buf *xmit = &max->con_xmit;
+
+	if (uart_circ_chars_free(xmit)) {
+		xmit->buf[xmit->head] = (char)ch;
+		xmit->head = (xmit->head + 1) & (PAGE_SIZE - 1);
+	}
+
+	if (!atomic_read(&max->con_tx_need)) {
+		atomic_set(&max->con_tx_need, 1);
+		wake_up_process(max->main_thread);
+	}
+}
+
+/*
+ * Print a string to the serial port trying not to disturb
+ * any possible real use of the port...
+ *
+ *	The console_lock must be held when we get here.
+ */
+static void serial_m3110_con_write(struct console *co,
+				const char *s, unsigned int count)
+{
+	if (!pmax)
+		return;
+
+	uart_console_write(&pmax->port, s, count, serial_m3110_con_putchar);
+}
+
+static int __init
+serial_m3110_con_setup(struct console *co, char *options)
+{
+	struct uart_max3110 *max = pmax;
+	int baud = 115200;
+	int bits = 8;
+	int parity = 'n';
+	int flow = 'n';
+
+	pr_info(PR_FMT "setting up console\n");
+
+	if (!max) {
+		pr_err(PR_FMT "pmax is NULL, return");
+		return -ENODEV;
+	}
+
+	if (options)
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+	return uart_set_options(&max->port, co, baud, parity, bits, flow);
+}
+
+static struct tty_driver *serial_m3110_con_device(struct console *co,
+							int *index)
+{
+	struct uart_driver *p = co->data;
+	*index = co->index;
+	return p->tty_driver;
+}
+
+static struct uart_driver serial_m3110_reg;
+static struct console serial_m3110_console = {
+	.name		= "ttyS",
+	.write		= serial_m3110_con_write,
+	.device		= serial_m3110_con_device,
+	.setup		= serial_m3110_con_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+	.data		= &serial_m3110_reg,
+};
+
+#define MRST_CONSOLE	(&serial_m3110_console)
+
+static unsigned int serial_m3110_tx_empty(struct uart_port *port)
+{
+	return 1;
+}
+
+static void serial_m3110_stop_tx(struct uart_port *port)
+{
+	return;
+}
+
+/* stop_rx will be called in spin_lock env */
+static void serial_m3110_stop_rx(struct uart_port *port)
+{
+	return;
+}
+
+#define WORDS_PER_XFER	128
+static inline void send_circ_buf(struct uart_max3110 *max,
+				struct circ_buf *xmit)
+{
+	int len, left = 0;
+	u16 obuf[WORDS_PER_XFER], ibuf[WORDS_PER_XFER];
+	u8 valid_str[WORDS_PER_XFER];
+	int i, j;
+
+	while (!uart_circ_empty(xmit)) {
+		left = uart_circ_chars_pending(xmit);
+		while (left) {
+			len = (left >= WORDS_PER_XFER) ? WORDS_PER_XFER : left;
+
+			memset(obuf, 0, len * 2);
+			memset(ibuf, 0, len * 2);
+			for (i = 0; i < len; i++) {
+				obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG;
+				xmit->tail = (xmit->tail + 1) &
+						(UART_XMIT_SIZE - 1);
+			}
+			max3110_write_then_read(max, (u8 *)obuf,
+						(u8 *)ibuf, len * 2, 0);
+
+			for (i = 0, j = 0; i < len; i++) {
+				if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
+					valid_str[j++] = (u8)(ibuf[i] & 0xff);
+			}
+
+			if (j)
+				receive_chars(max, valid_str, j);
+
+			max->port.icount.tx += len;
+			left -= len;
+		}
+	}
+}
+
+static void transmit_char(struct uart_max3110 *max)
+{
+	struct uart_port *port = &max->port;
+	struct circ_buf *xmit = &port->state->xmit;
+
+	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
+		return;
+
+	send_circ_buf(max, xmit);
+
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+		uart_write_wakeup(port);
+
+	if (uart_circ_empty(xmit))
+		serial_m3110_stop_tx(port);
+}
+
+/*
+ * This will be called by uart_write() and tty_write, can't
+ * go to sleep
+ */
+static void serial_m3110_start_tx(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+
+	if (!atomic_read(&max->uart_tx_need)) {
+		atomic_set(&max->uart_tx_need, 1);
+		wake_up_process(max->main_thread);
+	}
+}
+
+static void receive_chars(struct uart_max3110 *max, unsigned char *str, int len)
+{
+	struct uart_port *port = &max->port;
+	struct tty_struct *tty;
+	int usable;
+
+	/* If uart is not opened, just return */
+	if (!port->state)
+		return;
+
+	tty = port->state->port.tty;
+	if (!tty)
+		return;
+
+	while (len) {
+		usable = tty_buffer_request_room(tty, len);
+		if (usable) {
+			tty_insert_flip_string(tty, str, usable);
+			str += usable;
+			port->icount.rx += usable;
+			tty_flip_buffer_push(tty);
+		}
+		len -= usable;
+	}
+}
+
+static void max3110_con_receive(struct uart_max3110 *max)
+{
+	int loop = 1, num, total = 0;
+	u8 recv_buf[512], *pbuf;
+
+	pbuf = recv_buf;
+	do {
+		/* 3110 RX buffer is 8 words */
+		num = max3110_read_multi(max, 8, pbuf);
+
+		if (num) {
+			loop = 5;
+			pbuf += num;
+			total += num;
+
+			if (total >= 500) {
+				receive_chars(max, recv_buf, total);
+				pbuf = recv_buf;
+				total = 0;
+			}
+		}
+	} while (--loop);
+
+	if (total)
+		receive_chars(max, recv_buf, total);
+}
+
+static int max3110_main_thread(void *_max)
+{
+	struct uart_max3110 *max = _max;
+	wait_queue_head_t *wq = &max->wq;
+	int ret = 0;
+	struct circ_buf *xmit = &max->con_xmit;
+
+	init_waitqueue_head(wq);
+	pr_info(PR_FMT "start main thread\n");
+
+	do {
+		wait_event_interruptible(*wq, (atomic_read(&max->irq_pending) ||
+					       atomic_read(&max->con_tx_need) ||
+					     atomic_read(&max->uart_tx_need)) ||
+					     kthread_should_stop());
+		max->mthread_up = 1;
+
+#ifdef CONFIG_MAX3110_IRQ
+		if (atomic_read(&max->irq_pending)) {
+			max3110_con_receive(max);
+			atomic_set(&max->irq_pending, 0);
+		}
+#endif
+
+		/* first handle console output */
+		if (atomic_read(&max->con_tx_need)) {
+			send_circ_buf(max, xmit);
+			atomic_set(&max->con_tx_need, 0);
+		}
+
+		/* handle uart output */
+		if (atomic_read(&max->uart_tx_need)) {
+			transmit_char(max);
+			atomic_set(&max->uart_tx_need, 0);
+		}
+		max->mthread_up = 0;
+	} while (!kthread_should_stop());
+
+	return ret;
+}
+
+#ifdef CONFIG_MAX3110_IRQ
+irqreturn_t static serial_m3110_irq(int irq, void *dev_id)
+{
+	struct uart_max3110 *max = dev_id;
+
+	/* max3110's irq is a falling edge, not level triggered,
+	 * so no need to disable the irq */
+	if (!atomic_read(&max->irq_pending)) {
+		atomic_inc(&max->irq_pending);
+		wake_up_process(max->main_thread);
+	}
+	return IRQ_HANDLED;
+}
+#else
+/* if don't use RX IRQ, then need a thread to polling read */
+static int max3110_read_thread(void *_max)
+{
+	struct uart_max3110 *max = _max;
+
+	pr_info(PR_FMT "start read thread\n");
+	do {
+		if (!max->mthread_up)
+			max3110_con_receive(max);
+
+		set_current_state(TASK_INTERRUPTIBLE);
+		schedule_timeout(HZ / 20);
+	} while (!kthread_should_stop());
+
+	return 0;
+}
+#endif
+
+static int serial_m3110_startup(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	u16 config = 0;
+	int ret = 0;
+
+	if (port->line != 0)
+		pr_err(PR_FMT "uart port startup failed\n");
+
+	/* firstly disable all IRQ and config it to 115200, 8n1 */
+	config = WC_TAG | WC_FIFO_ENABLE
+			| WC_1_STOPBITS
+			| WC_8BIT_WORD
+			| WC_BAUD_DR2;
+	ret = max3110_out(max, config);
+
+	/* as we use thread to handle tx/rx, need set low latency */
+	port->state->port.tty->low_latency = 1;
+
+#ifdef CONFIG_MAX3110_IRQ
+	ret = request_irq(max->irq, serial_m3110_irq,
+				IRQ_TYPE_EDGE_FALLING, "max3110", max);
+	if (ret)
+		return ret;
+
+	/* enable RX IRQ only */
+	config |= WC_RXA_IRQ_ENABLE;
+	max3110_out(max, config);
+#else
+	/* if IRQ is disabled, start a read thread for input data */
+	max->read_thread =
+		kthread_run(max3110_read_thread, max, "max3110_read");
+#endif
+
+	max->cur_conf = config;
+	return 0;
+}
+
+static void serial_m3110_shutdown(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	u16 config;
+
+	if (max->read_thread) {
+		kthread_stop(max->read_thread);
+		max->read_thread = NULL;
+	}
+
+#ifdef CONFIG_MAX3110_IRQ
+	free_irq(max->irq, max);
+#endif
+
+	/* Disable interrupts from this port */
+	config = WC_TAG | WC_SW_SHDI;
+	max3110_out(max, config);
+}
+
+static void serial_m3110_release_port(struct uart_port *port)
+{
+}
+
+static int serial_m3110_request_port(struct uart_port *port)
+{
+	return 0;
+}
+
+static void serial_m3110_config_port(struct uart_port *port, int flags)
+{
+	/* Give it fake type */
+	port->type = PORT_PXA;
+}
+
+static int
+serial_m3110_verify_port(struct uart_port *port, struct serial_struct *ser)
+{
+	/* we don't want the core code to modify any port params */
+	return -EINVAL;
+}
+
+
+static const char *serial_m3110_type(struct uart_port *port)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	return max->name;
+}
+
+static void
+serial_m3110_set_termios(struct uart_port *port, struct ktermios *termios,
+		       struct ktermios *old)
+{
+	struct uart_max3110 *max =
+		container_of(port, struct uart_max3110, port);
+	unsigned char cval;
+	unsigned int baud, parity = 0;
+	int clk_div = -1;
+	u16 new_conf = max->cur_conf;
+
+	switch (termios->c_cflag & CSIZE) {
+	case CS7:
+		cval = UART_LCR_WLEN7;
+		new_conf |= WC_7BIT_WORD;
+		break;
+	default:
+	case CS8:
+		cval = UART_LCR_WLEN8;
+		new_conf |= WC_8BIT_WORD;
+		break;
+	}
+
+	baud = uart_get_baud_rate(port, termios, old, 0, 230400);
+
+	/* first calc the div for 1.8MHZ clock case */
+	switch (baud) {
+	case 300:
+		clk_div = WC_BAUD_DR384;
+		break;
+	case 600:
+		clk_div = WC_BAUD_DR192;
+		break;
+	case 1200:
+		clk_div = WC_BAUD_DR96;
+		break;
+	case 2400:
+		clk_div = WC_BAUD_DR48;
+		break;
+	case 4800:
+		clk_div = WC_BAUD_DR24;
+		break;
+	case 9600:
+		clk_div = WC_BAUD_DR12;
+		break;
+	case 19200:
+		clk_div = WC_BAUD_DR6;
+		break;
+	case 38400:
+		clk_div = WC_BAUD_DR3;
+		break;
+	case 57600:
+		clk_div = WC_BAUD_DR2;
+		break;
+	case 115200:
+		clk_div = WC_BAUD_DR1;
+		break;
+	case 230400:
+		if (max->clock & MAX3110_HIGH_CLK)
+			break;
+	default:
+		/* pick the previous baud rate */
+		baud = max->baud;
+		clk_div = max->cur_conf & WC_BAUD_DIV_MASK;
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	if (max->clock & MAX3110_HIGH_CLK) {
+		clk_div += 1;
+		/* high clk version max3110 doesn't support B300 */
+		if (baud == 300)
+			baud = 600;
+		if (baud == 230400)
+			clk_div = WC_BAUD_DR1;
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	new_conf = (new_conf & ~WC_BAUD_DIV_MASK) | clk_div;
+	if (termios->c_cflag & CSTOPB)
+		new_conf |= WC_2_STOPBITS;
+	else
+		new_conf &= ~WC_2_STOPBITS;
+
+	if (termios->c_cflag & PARENB) {
+		new_conf |= WC_PARITY_ENABLE;
+		parity |= UART_LCR_PARITY;
+	} else
+		new_conf &= ~WC_PARITY_ENABLE;
+
+	if (!(termios->c_cflag & PARODD))
+		parity |= UART_LCR_EPAR;
+	max->parity = parity;
+
+	uart_update_timeout(port, termios->c_cflag, baud);
+
+	new_conf |= WC_TAG;
+	if (new_conf != max->cur_conf) {
+		max3110_out(max, new_conf);
+		max->cur_conf = new_conf;
+		max->baud = baud;
+	}
+}
+
+/* don't handle hw handshaking */
+static unsigned int serial_m3110_get_mctrl(struct uart_port *port)
+{
+	return TIOCM_DSR | TIOCM_CAR | TIOCM_DSR;
+}
+
+static void serial_m3110_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+}
+
+static void serial_m3110_break_ctl(struct uart_port *port, int break_state)
+{
+}
+
+static void serial_m3110_pm(struct uart_port *port, unsigned int state,
+			unsigned int oldstate)
+{
+}
+
+static void serial_m3110_enable_ms(struct uart_port *port)
+{
+}
+
+struct uart_ops serial_m3110_ops = {
+	.tx_empty	= serial_m3110_tx_empty,
+	.set_mctrl	= serial_m3110_set_mctrl,
+	.get_mctrl	= serial_m3110_get_mctrl,
+	.stop_tx	= serial_m3110_stop_tx,
+	.start_tx	= serial_m3110_start_tx,
+	.stop_rx	= serial_m3110_stop_rx,
+	.enable_ms	= serial_m3110_enable_ms,
+	.break_ctl	= serial_m3110_break_ctl,
+	.startup	= serial_m3110_startup,
+	.shutdown	= serial_m3110_shutdown,
+	.set_termios	= serial_m3110_set_termios,
+	.pm		= serial_m3110_pm,
+	.type		= serial_m3110_type,
+	.release_port	= serial_m3110_release_port,
+	.request_port	= serial_m3110_request_port,
+	.config_port	= serial_m3110_config_port,
+	.verify_port	= serial_m3110_verify_port,
+};
+
+static struct uart_driver serial_m3110_reg = {
+	.owner		= THIS_MODULE,
+	.driver_name	= "MRST serial",
+	.dev_name	= "ttyS",
+	.major		= TTY_MAJOR,
+	.minor		= 64,
+	.nr		= 1,
+	.cons		= MRST_CONSOLE,
+};
+
+static int serial_m3110_suspend(struct spi_device *spi, pm_message_t state)
+{
+	return 0;
+}
+
+static int serial_m3110_resume(struct spi_device *spi)
+{
+	return 0;
+}
+
+#ifdef CONFIG_MAX3110_DESIGNWARE
+static struct dw_spi_chip spi_uart = {
+	.poll_mode = 1,
+	.enable_dma = 0,
+	.type = SPI_FRF_SPI,
+};
+#endif
+
+static int serial_m3110_probe(struct spi_device *spi)
+{
+	struct uart_max3110 *max;
+	int ret;
+	unsigned char *buffer;
+
+	max = kzalloc(sizeof(*max), GFP_KERNEL);
+	if (!max)
+		return -ENOMEM;
+
+	/* set spi info */
+	spi->mode = SPI_MODE_0;
+	spi->bits_per_word = 16;
+#ifdef CONFIG_MAX3110_DESIGNWARE
+	spi->controller_data = &spi_uart;
+#endif
+	spi_setup(spi);
+
+	max->clock = MAX3110_HIGH_CLK;
+	max->port.type = PORT_PXA;	/* Need apply for a max3110 type */
+	max->port.fifosize = 2;		/* only have 16b buffer */
+	max->port.ops = &serial_m3110_ops;
+	max->port.line = 0;
+	max->port.dev = &spi->dev;
+	max->port.uartclk = 115200;
+
+	max->spi = spi;
+	max->name = spi->modalias;	/* use spi name as the name */
+	max->irq = (u16)spi->irq;
+
+	spin_lock_init(&max->lock);
+
+	max->word_7bits = 0;
+	max->parity = 0;
+	max->baud = 0;
+
+	max->cur_conf = 0;
+	atomic_set(&max->irq_pending, 0);
+
+	buffer = (unsigned char *)__get_free_page(GFP_KERNEL);
+	if (!buffer) {
+		ret = -ENOMEM;
+		goto err_get_page;
+	}
+	max->con_xmit.buf = (unsigned char *)buffer;
+	max->con_xmit.head = max->con_xmit.tail = 0;
+
+	max->main_thread = kthread_run(max3110_main_thread,
+					max, "max3110_main");
+	if (IS_ERR(max->main_thread)) {
+		ret = PTR_ERR(max->main_thread);
+		goto err_kthread;
+	}
+
+	pmax = max;
+	/* Give membase a psudo value to pass serial_core's check */
+	max->port.membase = (void *)0xff110000;
+	uart_add_one_port(&serial_m3110_reg, &max->port);
+
+	return 0;
+
+err_kthread:
+	free_page((unsigned long)buffer);
+err_get_page:
+	pmax = NULL;
+	kfree(max);
+	return ret;
+}
+
+static int max3110_remove(struct spi_device *dev)
+{
+	struct uart_max3110 *max = pmax;
+
+	if (!pmax)
+		return 0;
+
+	pmax = NULL;
+	uart_remove_one_port(&serial_m3110_reg, &max->port);
+
+	free_page((unsigned long)max->con_xmit.buf);
+
+	if (max->main_thread)
+		kthread_stop(max->main_thread);
+
+	kfree(max);
+	return 0;
+}
+
+static struct spi_driver uart_max3110_driver = {
+	.driver = {
+			.name	= "spi_max3111",
+			.bus	= &spi_bus_type,
+			.owner	= THIS_MODULE,
+	},
+	.probe		= serial_m3110_probe,
+	.remove		= __devexit_p(max3110_remove),
+	.suspend	= serial_m3110_suspend,
+	.resume		= serial_m3110_resume,
+};
+
+int __init serial_m3110_init(void)
+{
+	int ret = 0;
+
+	ret = uart_register_driver(&serial_m3110_reg);
+	if (ret)
+		return ret;
+
+	ret = spi_register_driver(&uart_max3110_driver);
+	if (ret)
+		uart_unregister_driver(&serial_m3110_reg);
+
+	return ret;
+}
+
+void __exit serial_m3110_exit(void)
+{
+	spi_unregister_driver(&uart_max3110_driver);
+	uart_unregister_driver(&serial_m3110_reg);
+}
+
+module_init(serial_m3110_init);
+module_exit(serial_m3110_exit);
+
+MODULE_ALIAS("max3110-uart");
+MODULE_AUTHOR("Feng Tang <feng.tang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>");
diff --git a/drivers/serial/max3110.h b/drivers/serial/max3110.h
new file mode 100644
index 0000000..eae93bd
--- /dev/null
+++ b/drivers/serial/max3110.h
@@ -0,0 +1,59 @@
+#ifndef _MAX3110_HEAD_FILE_
+#define _MAX3110_HEAD_FILE_
+
+#define MAX3110_HIGH_CLK	0x1	/* 3.6864 MHZ */
+#define MAX3110_LOW_CLK		0x0	/* 1.8432 MHZ */
+
+/* status bits for all 4 MAX3110 operate modes */
+#define MAX3110_READ_DATA_AVAILABLE	(1 << 15)
+#define MAX3110_WRITE_BUF_EMPTY		(1 << 14)
+
+#define WC_TAG			(3 << 14)
+#define RC_TAG			(1 << 14)
+#define WD_TAG			(2 << 14)
+#define RD_TAG			(0 << 14)
+
+/* bits def for write configuration */
+#define WC_FIFO_ENABLE_MASK	(1 << 13)
+#define WC_FIFO_ENABLE		(0 << 13)
+
+#define WC_SW_SHDI		(1 << 12)
+
+#define WC_IRQ_MASK		(0xF << 8)
+#define WC_TXE_IRQ_ENABLE	(1 << 11)	/* TX empty irq */
+#define WC_RXA_IRQ_ENABLE	(1 << 10)	/* RX availabe irq */
+#define WC_PAR_HIGH_IRQ_ENABLE	(1 << 9)
+#define WC_REC_ACT_IRQ_ENABLE	(1 << 8)
+
+#define WC_IRDA_ENABLE		(1 << 7)
+
+#define WC_STOPBITS_MASK	(1 << 6)
+#define WC_2_STOPBITS		(1 << 6)
+#define WC_1_STOPBITS		(0 << 6)
+
+#define WC_PARITY_ENABLE_MASK	(1 << 5)
+#define WC_PARITY_ENABLE	(1 << 5)
+
+#define WC_WORDLEN_MASK		(1 << 4)
+#define WC_7BIT_WORD		(1 << 4)
+#define WC_8BIT_WORD		(0 << 4)
+
+#define WC_BAUD_DIV_MASK	(0xF)
+#define WC_BAUD_DR1		(0x0)
+#define WC_BAUD_DR2		(0x1)
+#define WC_BAUD_DR4		(0x2)
+#define WC_BAUD_DR8		(0x3)
+#define WC_BAUD_DR16		(0x4)
+#define WC_BAUD_DR32		(0x5)
+#define WC_BAUD_DR64		(0x6)
+#define WC_BAUD_DR128		(0x7)
+#define WC_BAUD_DR3		(0x8)
+#define WC_BAUD_DR6		(0x9)
+#define WC_BAUD_DR12		(0xA)
+#define WC_BAUD_DR24		(0xB)
+#define WC_BAUD_DR48		(0xC)
+#define WC_BAUD_DR96		(0xD)
+#define WC_BAUD_DR192		(0xE)
+#define WC_BAUD_DR384		(0xF)
+
+#endif
-- 
1.6.0.4

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^ permalink raw reply	[flat|nested] 35+ messages in thread

end of thread, other threads:[~2010-03-03  7:42 UTC | newest]

Thread overview: 35+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <20091229222006.1ddb28a4@feng-desktop>
2009-12-29 14:59 ` [spi-devel-general] [RFC][PATCH] serial: spi: add spi-uart driver for Maxim 3110 Baruch Siach
2009-12-29 16:05   ` Tang, Feng
2009-12-29 18:43     ` Erwin Authried
2009-12-30  1:54       ` Feng Tang
2010-02-25  4:47       ` David Brownell
2010-02-25  7:49         ` Feng Tang
2009-12-29 15:02 ` Alan Cox
2010-02-08  8:59 ` [RFC][PATCH v2] " Feng Tang
     [not found] ` <20100208165946.0e4dde83@feng-i7>
2010-02-09  0:20   ` Andrew Morton
2010-02-09  0:26     ` Grant Likely
2010-02-09  1:36       ` Feng Tang
2010-02-17 22:58         ` Greg KH
2010-02-24  5:11           ` [RFC][PATCH v3] " Feng Tang
2010-02-24 10:44             ` Alan Cox
2010-02-24 14:25               ` Grant Likely
2010-02-24 23:18             ` Andrew Morton
2010-02-25  6:39               ` Feng Tang
2010-02-25  4:43             ` David Brownell
2010-02-25  7:44               ` Feng Tang
2010-02-25  8:11                 ` David Brownell
2010-02-26  3:47             ` [PATCH v4] " Feng Tang
     [not found]             ` <20100226114729.679bb933@feng-i7>
2010-02-26  9:59               ` Masakazu Mokuno
2010-02-26 19:41                 ` David Brownell
2010-03-01  2:30                   ` Feng Tang
2010-03-02  3:38                 ` Feng Tang
2010-02-09  9:25     ` [RFC][PATCH v2] " Alan Cox
2010-03-03  2:57   ` [PATCH v5] " Feng Tang
2010-03-03  3:59     ` Grant Likely
2010-03-03  4:51     ` David Brownell
2010-03-03  5:52       ` Feng Tang
2010-03-03  6:16         ` David Brownell
2010-03-03  6:37           ` Feng Tang
2010-03-03  7:25             ` David Brownell
2010-03-03  7:42               ` Feng Tang
2009-12-29 14:20 [RFC][PATCH] " Feng Tang

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