From: <Tudor.Ambarus@microchip.com>
To: <bbrezillon@kernel.org>
Cc: <broonie@kernel.org>, <Nicolas.Ferre@microchip.com>,
<alexandre.belloni@bootlin.com>,
<Ludovic.Desroches@microchip.com>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-spi@vger.kernel.org>
Subject: Re: [PATCH 3/9] spi: atmel-quadspi: fix naming scheme
Date: Thu, 31 Jan 2019 10:43:21 +0000 [thread overview]
Message-ID: <4a18feb1-2665-37c4-79e7-3cb7b6df8665@microchip.com> (raw)
In-Reply-To: <20190130181904.14094418@bbrezillon>
On 01/30/2019 07:19 PM, Boris Brezillon wrote:
> On Wed, 30 Jan 2019 15:08:33 +0000
> <Tudor.Ambarus@microchip.com> wrote:
>
>> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>>
>> Let general names to core drivers.
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
>> ---
>> drivers/spi/atmel-quadspi.c | 52 ++++++++++++++++++++++-----------------------
>> 1 file changed, 26 insertions(+), 26 deletions(-)
>>
>> diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
>> index 64475ad16c83..e156c345705b 100644
>> --- a/drivers/spi/atmel-quadspi.c
>> +++ b/drivers/spi/atmel-quadspi.c
>> @@ -157,14 +157,14 @@ struct atmel_qspi {
>> struct completion cmd_completion;
>> };
>>
>> -struct qspi_mode {
>> +struct atmel_qspi_mode {
>> u8 cmd_buswidth;
>> u8 addr_buswidth;
>> u8 data_buswidth;
>> u32 config;
>> };
>>
>> -static const struct qspi_mode sama5d2_qspi_modes[] = {
>> +static const struct atmel_qspi_mode sama5d2_qspi_modes[] = {
>> { 1, 1, 1, QSPI_IFR_WIDTH_SINGLE_BIT_SPI },
>> { 1, 1, 2, QSPI_IFR_WIDTH_DUAL_OUTPUT },
>> { 1, 1, 4, QSPI_IFR_WIDTH_QUAD_OUTPUT },
>> @@ -175,18 +175,18 @@ static const struct qspi_mode sama5d2_qspi_modes[] = {
>> };
>>
>> /* Register access functions */
>> -static inline u32 qspi_readl(struct atmel_qspi *aq, u32 reg)
>> +static inline u32 atmel_qspi_readl(struct atmel_qspi *aq, u32 reg)
>> {
>> return readl_relaxed(aq->regs + reg);
>> }
>>
>> -static inline void qspi_writel(struct atmel_qspi *aq, u32 reg, u32 value)
>> +static inline void atmel_qspi_writel(struct atmel_qspi *aq, u32 reg, u32 value)
>> {
>> writel_relaxed(value, aq->regs + reg);
>> }
> Can we get rid of these wrappers? I'm not a big fan of wrappers that
> hide the fact that accesses are relaxed.
>
Will do, thanks!
ta
next prev parent reply other threads:[~2019-01-31 10:43 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-30 15:08 [PATCH 0/9] spi: atmel-quadspi: introduce sam9x60 qspi contoller Tudor.Ambarus
2019-01-30 15:08 ` [PATCH 1/9] spi: atmel-quadspi: optimize qspi init Tudor.Ambarus
2019-01-30 17:15 ` Boris Brezillon
2019-01-31 10:42 ` Tudor.Ambarus
2019-01-30 15:08 ` [PATCH 2/9] spi: atmel-quadspi: order header files inclusion alphabetically Tudor.Ambarus
2019-01-30 17:16 ` Boris Brezillon
2019-01-30 15:08 ` [PATCH 3/9] spi: atmel-quadspi: fix naming scheme Tudor.Ambarus
2019-01-30 17:19 ` Boris Brezillon
2019-01-31 10:43 ` Tudor.Ambarus [this message]
2019-01-30 15:08 ` [PATCH 4/9] spi: atmel-quadspi: remove unnecessary cast Tudor.Ambarus
2019-01-30 17:20 ` Boris Brezillon
2019-01-30 15:08 ` [PATCH 5/9] spi: atmel-quadspi: return appropriate error code Tudor.Ambarus
2019-01-30 17:21 ` Boris Brezillon
2019-01-30 15:08 ` [PATCH 6/9] spi: atmel-quadspi: switch to SPDX license identifiers Tudor.Ambarus
2019-01-30 17:23 ` Boris Brezillon
2019-01-30 15:08 ` [PATCH 7/9] dt-bindings: spi: atmel-quadspi: update example to new clock binding Tudor.Ambarus
2019-01-30 17:25 ` Boris Brezillon
2019-01-30 15:08 ` [PATCH 8/9] dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60 Tudor.Ambarus
2019-01-30 17:30 ` Boris Brezillon
2019-01-31 10:45 ` Tudor.Ambarus
2019-01-30 15:08 ` [PATCH 9/9] spi: atmel-quadspi: add support for sam9x60 qspi controller Tudor.Ambarus
2019-01-30 17:43 ` Boris Brezillon
2019-01-31 10:46 ` Tudor.Ambarus
2019-01-31 11:55 ` Boris Brezillon
2019-01-31 12:40 ` Tudor.Ambarus
2019-01-31 13:12 ` Boris Brezillon
2019-01-31 12:01 ` Boris Brezillon
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