From: <Tudor.Ambarus@microchip.com>
To: <bbrezillon@kernel.org>
Cc: <alexandre.belloni@bootlin.com>, <linux-kernel@vger.kernel.org>,
<Ludovic.Desroches@microchip.com>, <broonie@kernel.org>,
<linux-mtd@lists.infradead.org>, <linux-spi@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 9/9] spi: atmel-quadspi: add support for sam9x60 qspi controller
Date: Thu, 31 Jan 2019 12:40:04 +0000 [thread overview]
Message-ID: <5a91b6b2-0fed-f411-6e96-568e610f15fa@microchip.com> (raw)
In-Reply-To: <20190131125504.3eff449d@bbrezillon>
On 01/31/2019 01:55 PM, Boris Brezillon wrote:
> On Wed, 30 Jan 2019 15:08:47 +0000
> <Tudor.Ambarus@microchip.com> wrote:
>
>> +
>> +static int atmel_sam9x60_qspi_set_cfg(struct atmel_qspi *aq,
>> + const struct spi_mem_op *op,
>> + struct atmel_qspi_cfg *cfg)
>> +{
>> + int ret = atmel_qspi_set_mode(cfg, op);
>> +
>> + if (ret)
>> + return ret;
>> +
>> + cfg->icr = QSPI_ICR_INST(op->cmd.opcode);
>> +
>> + if (!op->addr.nbytes) {
>> + cfg->ifr |= QSPI_IFR_TFRTYP_TRSFR_REG;
>> + if (op->data.dir == SPI_MEM_DATA_OUT)
>> + cfg->ifr |= QSPI_IFR_APBTFRTYP_WRITE;
>> + else
>> + cfg->ifr |= QSPI_IFR_APBTFRTYP_READ;
>> + } else {
>> + cfg->ifr |= QSPI_IFR_TFRTYP_TRSFR_MEM;
>
> Why do you use a MEM transfer here? What's the difference with a
> regular transfer?
QSPI_IFR_TFRTYP_TRSFR_MEM must be set when one wants to read/write in the serial
memory, and particularly a memory data.
QSPI_IFR_TFRTYP_TRSFR_REG must be set when one wants to read or write to serial
memory, but not a memory data.
Read examples: JEDEC_ID or QSPI_SR
Write examples: writing the configuration or the QSPI_SR.
Does this answers your question?
>
>> + }
>> +
>> + /* Set data enable */
>> + if (op->data.nbytes)
>> + cfg->ifr |= QSPI_IFR_DATAEN;
>> +
>> + ret = atmel_qspi_set_address_mode(cfg, op);
>> + if (ret)
>> + return ret;
>>
>> /* Clear pending interrupts */
>> (void)atmel_qspi_readl(aq, QSPI_SR);
>>
>> /* Set QSPI Instruction Frame registers */
>> - atmel_qspi_writel(aq, QSPI_IAR, iar);
>> - atmel_qspi_writel(aq, QSPI_ICR, icr);
>> - atmel_qspi_writel(aq, QSPI_IFR, ifr);
>> + atmel_qspi_writel(aq, QSPI_IAR, cfg->iar);
>> + if (op->data.dir == SPI_MEM_DATA_OUT)
>> + atmel_qspi_writel(aq, QSPI_ICR, cfg->icr);
>> + else
>> + atmel_qspi_writel(aq, QSPI_RICR, cfg->icr);
>> + atmel_qspi_writel(aq, QSPI_IFR, cfg->ifr);
>> +
>> + return 0;
>> +}
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
next prev parent reply other threads:[~2019-01-31 12:40 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-30 15:08 [PATCH 0/9] spi: atmel-quadspi: introduce sam9x60 qspi contoller Tudor.Ambarus
2019-01-30 15:08 ` [PATCH 1/9] spi: atmel-quadspi: optimize qspi init Tudor.Ambarus
2019-01-30 17:15 ` Boris Brezillon
2019-01-31 10:42 ` Tudor.Ambarus
2019-01-30 15:08 ` [PATCH 2/9] spi: atmel-quadspi: order header files inclusion alphabetically Tudor.Ambarus
2019-01-30 17:16 ` Boris Brezillon
2019-01-30 15:08 ` [PATCH 3/9] spi: atmel-quadspi: fix naming scheme Tudor.Ambarus
2019-01-30 17:19 ` Boris Brezillon
2019-01-31 10:43 ` Tudor.Ambarus
2019-01-30 15:08 ` [PATCH 4/9] spi: atmel-quadspi: remove unnecessary cast Tudor.Ambarus
2019-01-30 17:20 ` Boris Brezillon
2019-01-30 15:08 ` [PATCH 5/9] spi: atmel-quadspi: return appropriate error code Tudor.Ambarus
2019-01-30 17:21 ` Boris Brezillon
2019-01-30 15:08 ` [PATCH 6/9] spi: atmel-quadspi: switch to SPDX license identifiers Tudor.Ambarus
2019-01-30 17:23 ` Boris Brezillon
2019-01-30 15:08 ` [PATCH 7/9] dt-bindings: spi: atmel-quadspi: update example to new clock binding Tudor.Ambarus
2019-01-30 17:25 ` Boris Brezillon
2019-01-30 15:08 ` [PATCH 8/9] dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60 Tudor.Ambarus
2019-01-30 17:30 ` Boris Brezillon
2019-01-31 10:45 ` Tudor.Ambarus
2019-01-30 15:08 ` [PATCH 9/9] spi: atmel-quadspi: add support for sam9x60 qspi controller Tudor.Ambarus
2019-01-30 17:43 ` Boris Brezillon
2019-01-31 10:46 ` Tudor.Ambarus
2019-01-31 11:55 ` Boris Brezillon
2019-01-31 12:40 ` Tudor.Ambarus [this message]
2019-01-31 13:12 ` Boris Brezillon
2019-01-31 12:01 ` Boris Brezillon
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