* [PATCH 1/9] spi/pxa2xx: don't use subys initcall for driver init
[not found] ` <1290597207-29838-1-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
@ 2010-11-24 11:13 ` Sebastian Andrzej Siewior
2010-11-24 13:18 ` Antonio Ospite
[not found] ` <1290597207-29838-2-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
2010-11-24 11:13 ` [PATCH 2/9] spi/pxa2xx: add support for shared IRQ handler Sebastian Andrzej Siewior
` (7 subsequent siblings)
8 siblings, 2 replies; 26+ messages in thread
From: Sebastian Andrzej Siewior @ 2010-11-24 11:13 UTC (permalink / raw)
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
Cc: David Brownell, eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w,
Sebastian Andrzej Siewior, sodaville-hfZtesqFncYOwBW4kG4KsQ,
Dirk Brandewie, linux-lFZ/pmaqli7XmaaqVzeoHQ,
tglx-hfZtesqFncYOwBW4kG4KsQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
It is a simple driver and there is no need to call its init function
at the level of a subsystem.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
drivers/spi/pxa2xx_spi.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index e76b1af..6f2f061 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -1731,7 +1731,7 @@ static int __init pxa2xx_spi_init(void)
{
return platform_driver_probe(&driver, pxa2xx_spi_probe);
}
-subsys_initcall(pxa2xx_spi_init);
+module_init(pxa2xx_spi_init);
static void __exit pxa2xx_spi_exit(void)
{
--
1.7.3.2
------------------------------------------------------------------------------
Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
Tap into the largest installed PC base & get more eyes on your game by
optimizing for Intel(R) Graphics Technology. Get started today with the
Intel(R) Software Partner Program. Five $500 cash prizes are up for grabs.
http://p.sf.net/sfu/intelisp-dev2dev
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH 1/9] spi/pxa2xx: don't use subys initcall for driver init
2010-11-24 11:13 ` [PATCH 1/9] spi/pxa2xx: don't use subys initcall for driver init Sebastian Andrzej Siewior
@ 2010-11-24 13:18 ` Antonio Ospite
[not found] ` <1290597207-29838-2-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
1 sibling, 0 replies; 26+ messages in thread
From: Antonio Ospite @ 2010-11-24 13:18 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: David Brownell, eric.y.miao, linux, sodaville, Daniel Ribeiro,
Dirk Brandewie, spi-devel-general, tglx, linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 1545 bytes --]
On Wed, 24 Nov 2010 12:13:19 +0100
Sebastian Andrzej Siewior <bigeasy@linutronix.de> wrote:
> It is a simple driver and there is no need to call its init function
> at the level of a subsystem.
>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
> ---
Please take a look at commit 5b61a749e8fd0a45a5e37c267d20a43ef0590d68
there are some situations where the spi driver needs to be loaded before
the others, IIRC the change in the commit above was needed for the EZX
phones, where the PMIC is on the spi bus and cpufreq operates on some
regulator controlled by the PMIC; added Daniel Ribeiro on CC who maybe
can give more details.
Regards,
Antonio
> drivers/spi/pxa2xx_spi.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
> index e76b1af..6f2f061 100644
> --- a/drivers/spi/pxa2xx_spi.c
> +++ b/drivers/spi/pxa2xx_spi.c
> @@ -1731,7 +1731,7 @@ static int __init pxa2xx_spi_init(void)
> {
> return platform_driver_probe(&driver, pxa2xx_spi_probe);
> }
> -subsys_initcall(pxa2xx_spi_init);
> +module_init(pxa2xx_spi_init);
>
> static void __exit pxa2xx_spi_exit(void)
> {
> --
> 1.7.3.2
>
>
--
Antonio Ospite
http://ao2.it
PGP public key ID: 0x4553B001
A: Because it messes up the order in which people normally read text.
See http://en.wikipedia.org/wiki/Posting_style
Q: Why is top-posting such a bad thing?
[-- Attachment #1.2: Type: application/pgp-signature, Size: 198 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 26+ messages in thread[parent not found: <1290597207-29838-2-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>]
* Re: [PATCH 1/9] spi/pxa2xx: don't use subys initcall for driver init
[not found] ` <1290597207-29838-2-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
@ 2010-11-24 13:54 ` Haojian Zhuang
[not found] ` <AANLkTin4vh85XRkEd7YocCmKngViR_qZDe7z1b4JXyd--JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 26+ messages in thread
From: Haojian Zhuang @ 2010-11-24 13:54 UTC (permalink / raw)
To: Sebastian Andrzej Siewior, drwyrm-Re5JQEeQqe8AvxtiuMwx3w, Mark Brown
Cc: David Brownell, eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w,
linux-lFZ/pmaqli7XmaaqVzeoHQ, sodaville-hfZtesqFncYOwBW4kG4KsQ,
Dirk Brandewie,
spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
tglx-hfZtesqFncYOwBW4kG4KsQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Wed, Nov 24, 2010 at 7:13 PM, Sebastian Andrzej Siewior
<bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org> wrote:
> It is a simple driver and there is no need to call its init function
> at the level of a subsystem.
>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
> Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> drivers/spi/pxa2xx_spi.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
> index e76b1af..6f2f061 100644
> --- a/drivers/spi/pxa2xx_spi.c
> +++ b/drivers/spi/pxa2xx_spi.c
> @@ -1731,7 +1731,7 @@ static int __init pxa2xx_spi_init(void)
> {
> return platform_driver_probe(&driver, pxa2xx_spi_probe);
> }
> -subsys_initcall(pxa2xx_spi_init);
> +module_init(pxa2xx_spi_init);
>
> static void __exit pxa2xx_spi_exit(void)
> {
> --
Hi Sebastian,
Actually it's added for cpufreq usage. We can check the commit in below.
commit 5b61a749e8fd0a45a5e37c267d20a43ef0590d68
Author: Antonio Ospite <ospite-aNJ+ML1ZbiP93QAQaVx+gl6hYfS7NtTn@public.gmane.org>
Date: Tue Sep 22 16:46:10 2009 -0700
pxa2xx_spi: register earlier
Register pxa2xx_spi earlier so it can be used with cpufreq
Signed-off-by: Daniel Ribeiro <drwyrm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Acked-by: Mark Brown <broonie-yzvPICuk2AATkU/dhu1WVueM+bqZidxxQQ4Iyu8u01E@public.gmane.org>
So I think that this modifcation may cause others brokne.
Thanks
Haojian
------------------------------------------------------------------------------
Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
Tap into the largest installed PC base & get more eyes on your game by
optimizing for Intel(R) Graphics Technology. Get started today with the
Intel(R) Software Partner Program. Five $500 cash prizes are up for grabs.
http://p.sf.net/sfu/intelisp-dev2dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 2/9] spi/pxa2xx: add support for shared IRQ handler
[not found] ` <1290597207-29838-1-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
2010-11-24 11:13 ` [PATCH 1/9] spi/pxa2xx: don't use subys initcall for driver init Sebastian Andrzej Siewior
@ 2010-11-24 11:13 ` Sebastian Andrzej Siewior
2010-11-24 11:13 ` [PATCH 3/9] spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers Sebastian Andrzej Siewior
` (6 subsequent siblings)
8 siblings, 0 replies; 26+ messages in thread
From: Sebastian Andrzej Siewior @ 2010-11-24 11:13 UTC (permalink / raw)
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
Cc: David Brownell, eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w,
Sebastian Andrzej Siewior, sodaville-hfZtesqFncYOwBW4kG4KsQ,
Dirk Brandewie, linux-lFZ/pmaqli7XmaaqVzeoHQ,
tglx-hfZtesqFncYOwBW4kG4KsQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
This is required in case the interrupt line is shared with other
devices.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
drivers/spi/pxa2xx_spi.c | 15 ++++++++++++++-
1 files changed, 14 insertions(+), 1 deletions(-)
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index 6f2f061..6d40995 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -742,6 +742,18 @@ static irqreturn_t ssp_int(int irq, void *dev_id)
{
struct driver_data *drv_data = dev_id;
void __iomem *reg = drv_data->ioaddr;
+ u32 sccr1_reg = read_SSCR1(reg);
+ u32 mask = drv_data->mask_sr;
+ u32 status;
+
+ status = read_SSSR(reg);
+
+ /* Ignore possible writes if we don't need to write */
+ if (!(sccr1_reg & SSCR1_TIE))
+ mask &= ~SSSR_TFS;
+
+ if (!(status & mask))
+ return IRQ_NONE;
if (!drv_data->cur_msg) {
@@ -1512,7 +1524,8 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
drv_data->mask_sr = SSSR_TINT | SSSR_RFS | SSSR_TFS | SSSR_ROR;
}
- status = request_irq(ssp->irq, ssp_int, 0, dev_name(dev), drv_data);
+ status = request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev),
+ drv_data);
if (status < 0) {
dev_err(&pdev->dev, "cannot get IRQ %d\n", ssp->irq);
goto out_error_master_alloc;
--
1.7.3.2
------------------------------------------------------------------------------
Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
Tap into the largest installed PC base & get more eyes on your game by
optimizing for Intel(R) Graphics Technology. Get started today with the
Intel(R) Software Partner Program. Five $500 cash prizes are up for grabs.
http://p.sf.net/sfu/intelisp-dev2dev
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 3/9] spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers
[not found] ` <1290597207-29838-1-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
2010-11-24 11:13 ` [PATCH 1/9] spi/pxa2xx: don't use subys initcall for driver init Sebastian Andrzej Siewior
2010-11-24 11:13 ` [PATCH 2/9] spi/pxa2xx: add support for shared IRQ handler Sebastian Andrzej Siewior
@ 2010-11-24 11:13 ` Sebastian Andrzej Siewior
2010-11-24 11:13 ` [PATCH 4/9] arm/pxa2xx: reorgazine SSP and SPI header files Sebastian Andrzej Siewior
` (5 subsequent siblings)
8 siblings, 0 replies; 26+ messages in thread
From: Sebastian Andrzej Siewior @ 2010-11-24 11:13 UTC (permalink / raw)
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
Cc: David Brownell, eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w,
Sebastian Andrzej Siewior, sodaville-hfZtesqFncYOwBW4kG4KsQ,
Dirk Brandewie, linux-lFZ/pmaqli7XmaaqVzeoHQ,
tglx-hfZtesqFncYOwBW4kG4KsQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/arm/plat-pxa/include/plat/ssp.h | 3 ++-
drivers/spi/pxa2xx_spi.c | 8 ++++----
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/plat-pxa/include/plat/ssp.h b/arch/arm/plat-pxa/include/plat/ssp.h
index fe43150..21c12ca 100644
--- a/arch/arm/plat-pxa/include/plat/ssp.h
+++ b/arch/arm/plat-pxa/include/plat/ssp.h
@@ -82,7 +82,8 @@
#define SSSR_TFS (1 << 5) /* Transmit FIFO Service Request */
#define SSSR_RFS (1 << 6) /* Receive FIFO Service Request */
#define SSSR_ROR (1 << 7) /* Receive FIFO Overrun */
-
+#define SSSR_TFL_MASK (0xf << 8) /* Transmit FIFO Level mask */
+#define SSSR_RFL_MASK (0xf << 12) /* Receive FIFO Level mask */
/* extra bits in PXA255, PXA26x and PXA27x SSP ports */
#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index 6d40995..a4c795c 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -224,7 +224,7 @@ static int null_writer(struct driver_data *drv_data)
void __iomem *reg = drv_data->ioaddr;
u8 n_bytes = drv_data->n_bytes;
- if (((read_SSSR(reg) & 0x00000f00) == 0x00000f00)
+ if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK)
|| (drv_data->tx == drv_data->tx_end))
return 0;
@@ -252,7 +252,7 @@ static int u8_writer(struct driver_data *drv_data)
{
void __iomem *reg = drv_data->ioaddr;
- if (((read_SSSR(reg) & 0x00000f00) == 0x00000f00)
+ if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK)
|| (drv_data->tx == drv_data->tx_end))
return 0;
@@ -279,7 +279,7 @@ static int u16_writer(struct driver_data *drv_data)
{
void __iomem *reg = drv_data->ioaddr;
- if (((read_SSSR(reg) & 0x00000f00) == 0x00000f00)
+ if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK)
|| (drv_data->tx == drv_data->tx_end))
return 0;
@@ -306,7 +306,7 @@ static int u32_writer(struct driver_data *drv_data)
{
void __iomem *reg = drv_data->ioaddr;
- if (((read_SSSR(reg) & 0x00000f00) == 0x00000f00)
+ if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK)
|| (drv_data->tx == drv_data->tx_end))
return 0;
--
1.7.3.2
------------------------------------------------------------------------------
Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
Tap into the largest installed PC base & get more eyes on your game by
optimizing for Intel(R) Graphics Technology. Get started today with the
Intel(R) Software Partner Program. Five $500 cash prizes are up for grabs.
http://p.sf.net/sfu/intelisp-dev2dev
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 4/9] arm/pxa2xx: reorgazine SSP and SPI header files
[not found] ` <1290597207-29838-1-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
` (2 preceding siblings ...)
2010-11-24 11:13 ` [PATCH 3/9] spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers Sebastian Andrzej Siewior
@ 2010-11-24 11:13 ` Sebastian Andrzej Siewior
[not found] ` <1290597207-29838-5-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
2010-11-24 11:13 ` [PATCH 5/9] spi/pxa2xx: Add CE4100 support Sebastian Andrzej Siewior
` (4 subsequent siblings)
8 siblings, 1 reply; 26+ messages in thread
From: Sebastian Andrzej Siewior @ 2010-11-24 11:13 UTC (permalink / raw)
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
Cc: David Brownell, eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w,
Sebastian Andrzej Siewior, sodaville-hfZtesqFncYOwBW4kG4KsQ,
Dirk Brandewie, linux-lFZ/pmaqli7XmaaqVzeoHQ,
tglx-hfZtesqFncYOwBW4kG4KsQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
The PXA-SPI driver relies on some files / defines which are arm specific
and are within the ARM tree. The CE4100 SoC which is x86 has also the
SPI core.
This patch moves the ssp and spi files from arm/mach-pxa and plat-pxa to
include/linux where the CE4100 can access them.
This move got verified by building the following defconfigs:
cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig
imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig
raumfeld_defconfig magician_defconfig
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
Documentation/spi/pxa2xx | 4 ++--
arch/arm/mach-pxa/cm-x255.c | 2 +-
arch/arm/mach-pxa/cm-x270.c | 2 +-
arch/arm/mach-pxa/corgi.c | 2 +-
arch/arm/mach-pxa/devices.c | 2 +-
arch/arm/mach-pxa/em-x270.c | 2 +-
arch/arm/mach-pxa/hx4700.c | 2 +-
arch/arm/mach-pxa/icontrol.c | 2 +-
arch/arm/mach-pxa/littleton.c | 2 +-
arch/arm/mach-pxa/lubbock.c | 2 +-
arch/arm/mach-pxa/pcm027.c | 2 +-
arch/arm/mach-pxa/poodle.c | 2 +-
arch/arm/mach-pxa/spitz.c | 3 +--
arch/arm/mach-pxa/stargate2.c | 2 +-
arch/arm/mach-pxa/tosa.c | 2 +-
arch/arm/mach-pxa/trizeps4.c | 1 -
arch/arm/mach-pxa/z2.c | 2 +-
arch/arm/mach-pxa/zeus.c | 2 +-
arch/arm/plat-pxa/ssp.c | 2 +-
drivers/spi/pxa2xx_spi.c | 4 +---
.../plat/ssp.h => include/linux/pxa2xx_ssp.h | 8 ++++----
.../mach => include/linux/spi}/pxa2xx_spi.h | 8 +++++---
sound/soc/pxa/pxa-ssp.c | 2 +-
23 files changed, 30 insertions(+), 32 deletions(-)
rename arch/arm/plat-pxa/include/plat/ssp.h => include/linux/pxa2xx_ssp.h (98%)
rename {arch/arm/mach-pxa/include/mach => include/linux/spi}/pxa2xx_spi.h (92%)
diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx
index 6bb916d..68a4fe3 100644
--- a/Documentation/spi/pxa2xx
+++ b/Documentation/spi/pxa2xx
@@ -19,7 +19,7 @@ Declaring PXA2xx Master Controllers
-----------------------------------
Typically a SPI master is defined in the arch/.../mach-*/board-*.c as a
"platform device". The master configuration is passed to the driver via a table
-found in arch/arm/mach-pxa/include/mach/pxa2xx_spi.h:
+found in include/linux/spi/pxa2xx_spi.h:
struct pxa2xx_spi_master {
enum pxa_ssp_type ssp_type;
@@ -94,7 +94,7 @@ using the "spi_board_info" structure found in "linux/spi/spi.h". See
Each slave device attached to the PXA must provide slave specific configuration
information via the structure "pxa2xx_spi_chip" found in
-"arch/arm/mach-pxa/include/mach/pxa2xx_spi.h". The pxa2xx_spi master controller driver
+"include/linux/spi/pxa2xx_spi.h". The pxa2xx_spi master controller driver
will uses the configuration whenever the driver communicates with the slave
device. All fields are optional.
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
index f1a7703..93f59f8 100644
--- a/arch/arm/mach-pxa/cm-x255.c
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -17,13 +17,13 @@
#include <linux/mtd/nand-gpio.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <mach/pxa25x.h>
-#include <mach/pxa2xx_spi.h>
#include "generic.h"
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index a9926bb..b88d601 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -19,12 +19,12 @@
#include <video/mbxfb.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/spi/libertas_spi.h>
#include <mach/pxa27x.h>
#include <mach/ohci.h>
#include <mach/mmc.h>
-#include <mach/pxa2xx_spi.h>
#include "generic.h"
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 821229a..3b8dcac 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -28,6 +28,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/corgi_lcd.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/sharpsl.h>
#include <linux/input/matrix_keypad.h>
#include <video/w100fb.h>
@@ -48,7 +49,6 @@
#include <mach/irda.h>
#include <mach/mmc.h>
#include <mach/udc.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/corgi.h>
#include <mach/sharpsl_pm.h>
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index aaa1166..c4f9c71 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -3,6 +3,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <asm/pmu.h>
#include <mach/udc.h>
@@ -12,7 +13,6 @@
#include <mach/irda.h>
#include <mach/ohci.h>
#include <plat/pxa27x_keypad.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/camera.h>
#include <mach/audio.h>
#include <mach/hardware.h>
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index ed0dbfdb..b20b944 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -26,6 +26,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/tdo24m.h>
#include <linux/spi/libertas_spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/power_supply.h>
#include <linux/apm-emulation.h>
#include <linux/i2c.h>
@@ -46,7 +47,6 @@
#include <plat/pxa27x_keypad.h>
#include <plat/i2c.h>
#include <mach/camera.h>
-#include <mach/pxa2xx_spi.h>
#include "generic.h"
#include "devices.h"
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 76d93a2..f09526f 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -33,6 +33,7 @@
#include <linux/regulator/max1586.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/usb/gpio_vbus.h>
#include <mach/hardware.h>
@@ -43,7 +44,6 @@
#include <mach/hx4700.h>
#include <plat/i2c.h>
#include <mach/irda.h>
-#include <mach/pxa2xx_spi.h>
#include <video/platform_lcd.h>
#include <video/w100fb.h>
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index d51ee3d..3ab6fd3 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -24,7 +24,7 @@
#include <mach/mxm8x10.h>
#include <linux/spi/spi.h>
-#include <mach/pxa2xx_spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/can/platform/mcp251x.h>
#include "generic.h"
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 41aa89e..8051925 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -22,6 +22,7 @@
#include <linux/clk.h>
#include <linux/gpio.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/smc91x.h>
#include <linux/i2c.h>
#include <linux/leds.h>
@@ -42,7 +43,6 @@
#include <mach/pxa300.h>
#include <mach/pxafb.h>
#include <mach/mmc.h>
-#include <mach/pxa2xx_spi.h>
#include <plat/pxa27x_keypad.h>
#include <mach/littleton.h>
#include <plat/i2c.h>
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 1499493..4a3fe45 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -25,7 +25,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
-#include <mach/pxa2xx_spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <asm/setup.h>
#include <asm/memory.h>
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index c77e8f3..a5596f9 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -25,12 +25,12 @@
#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/max7301.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/leds.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/pxa27x.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/pcm027.h>
#include "generic.h"
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 93a191c..c05eee3 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -25,6 +25,7 @@
#include <linux/i2c.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/sharpsl.h>
#include <mach/hardware.h>
@@ -43,7 +44,6 @@
#include <mach/irda.h>
#include <mach/poodle.h>
#include <mach/pxafb.h>
-#include <mach/pxa2xx_spi.h>
#include <plat/i2c.h>
#include <asm/hardware/scoop.h>
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index f736119..4fd5572 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -23,7 +23,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/corgi_lcd.h>
-#include <linux/mtd/physmap.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/sharpsl.h>
#include <linux/input/matrix_keypad.h>
#include <linux/regulator/machine.h>
@@ -41,7 +41,6 @@
#include <mach/mmc.h>
#include <mach/ohci.h>
#include <mach/pxafb.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/spitz.h>
#include <mach/sharpsl_pm.h>
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 738adc1..325f6ac 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -46,10 +46,10 @@
#include <plat/i2c.h>
#include <mach/mmc.h>
#include <mach/udc.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/pxa27x-udc.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/mfd/da903x.h>
#include <linux/sht15.h>
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 0ee1df4..7b5765d 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -32,6 +32,7 @@
#include <linux/gpio.h>
#include <linux/pda_power.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/input/matrix_keypad.h>
#include <asm/setup.h>
@@ -44,7 +45,6 @@
#include <mach/mmc.h>
#include <mach/udc.h>
#include <mach/tosa_bt.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/audio.h>
#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 565d062..bdb02a0 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -40,7 +40,6 @@
#include <asm/mach/flash.h>
#include <mach/pxa27x.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/trizeps4.h>
#include <mach/audio.h>
#include <mach/pxafb.h>
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index fefde98..1b8b71b 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -20,6 +20,7 @@
#include <linux/z2_battery.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/spi/libertas_spi.h>
#include <linux/spi/lms283gf05.h>
#include <linux/power_supply.h>
@@ -38,7 +39,6 @@
#include <mach/pxafb.h>
#include <mach/mmc.h>
#include <plat/pxa27x_keypad.h>
-#include <mach/pxa2xx_spi.h>
#include <plat/i2c.h>
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index dea46a2..f5c9f30 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -20,6 +20,7 @@
#include <linux/dm9000.h>
#include <linux/mmc/host.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
@@ -41,7 +42,6 @@
#include <mach/pxa27x-udc.h>
#include <mach/udc.h>
#include <mach/pxafb.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/mfp-pxa27x.h>
#include <mach/pm.h>
#include <mach/audio.h>
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c
index c6357e5..58b7980 100644
--- a/arch/arm/plat-pxa/ssp.c
+++ b/arch/arm/plat-pxa/ssp.c
@@ -28,11 +28,11 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/platform_device.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/io.h>
#include <asm/irq.h>
#include <mach/hardware.h>
-#include <plat/ssp.h>
static DEFINE_MUTEX(ssp_lock);
static LIST_HEAD(ssp_list);
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index a4c795c..3802ba6 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -23,6 +23,7 @@
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
#include <linux/workqueue.h>
@@ -35,9 +36,6 @@
#include <asm/irq.h>
#include <asm/delay.h>
-#include <mach/dma.h>
-#include <plat/ssp.h>
-#include <mach/pxa2xx_spi.h>
MODULE_AUTHOR("Stephen Street");
MODULE_DESCRIPTION("PXA2xx SSP SPI Controller");
diff --git a/arch/arm/plat-pxa/include/plat/ssp.h b/include/linux/pxa2xx_ssp.h
similarity index 98%
rename from arch/arm/plat-pxa/include/plat/ssp.h
rename to include/linux/pxa2xx_ssp.h
index 21c12ca..84465d4 100644
--- a/arch/arm/plat-pxa/include/plat/ssp.h
+++ b/include/linux/pxa2xx_ssp.h
@@ -1,5 +1,5 @@
/*
- * ssp.h
+ * pxa2xx_ssp.h
*
* Copyright (C) 2003 Russell King, All Rights Reserved.
*
@@ -16,8 +16,8 @@
* PXA3xx SSP1, SSP2, SSP3, SSP4
*/
-#ifndef __ASM_ARCH_SSP_H
-#define __ASM_ARCH_SSP_H
+#ifndef __LINUX_SSP_H
+#define __LINUX_SSP_H
#include <linux/list.h>
#include <linux/io.h>
@@ -184,4 +184,4 @@ static inline u32 pxa_ssp_read_reg(struct ssp_device *dev, u32 reg)
struct ssp_device *pxa_ssp_request(int port, const char *label);
void pxa_ssp_free(struct ssp_device *);
-#endif /* __ASM_ARCH_SSP_H */
+#endif
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h b/include/linux/spi/pxa2xx_spi.h
similarity index 92%
rename from arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
rename to include/linux/spi/pxa2xx_spi.h
index b87cecd..471ed68 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
+++ b/include/linux/spi/pxa2xx_spi.h
@@ -15,9 +15,11 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+#ifndef __linux_pxa2xx_spi_h
+#define __linux_pxa2xx_spi_h
-#ifndef PXA2XX_SPI_H_
-#define PXA2XX_SPI_H_
+#include <linux/pxa2xx_ssp.h>
+#include <mach/dma.h>
#define PXA2XX_CS_ASSERT (0x01)
#define PXA2XX_CS_DEASSERT (0x02)
@@ -44,4 +46,4 @@ struct pxa2xx_spi_chip {
extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info);
-#endif /*PXA2XX_SPI_H_*/
+#endif
diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c
index b439eee..8ad93ee 100644
--- a/sound/soc/pxa/pxa-ssp.c
+++ b/sound/soc/pxa/pxa-ssp.c
@@ -20,6 +20,7 @@
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/io.h>
+#include <linux/pxa2xx_ssp.h>
#include <asm/irq.h>
@@ -33,7 +34,6 @@
#include <mach/hardware.h>
#include <mach/dma.h>
#include <mach/audio.h>
-#include <plat/ssp.h>
#include "../../arm/pxa2xx-pcm.h"
#include "pxa-ssp.h"
--
1.7.3.2
------------------------------------------------------------------------------
Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
Tap into the largest installed PC base & get more eyes on your game by
optimizing for Intel(R) Graphics Technology. Get started today with the
Intel(R) Software Partner Program. Five $500 cash prizes are up for grabs.
http://p.sf.net/sfu/intelisp-dev2dev
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 5/9] spi/pxa2xx: Add CE4100 support
[not found] ` <1290597207-29838-1-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
` (3 preceding siblings ...)
2010-11-24 11:13 ` [PATCH 4/9] arm/pxa2xx: reorgazine SSP and SPI header files Sebastian Andrzej Siewior
@ 2010-11-24 11:13 ` Sebastian Andrzej Siewior
2010-11-24 11:13 ` [PATCH 6/9] spi/pxa2xx: Consider CE4100's FIFO depth Sebastian Andrzej Siewior
` (3 subsequent siblings)
8 siblings, 0 replies; 26+ messages in thread
From: Sebastian Andrzej Siewior @ 2010-11-24 11:13 UTC (permalink / raw)
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
Cc: David Brownell, eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w,
Sebastian Andrzej Siewior, sodaville-hfZtesqFncYOwBW4kG4KsQ,
Dirk Brandewie, linux-lFZ/pmaqli7XmaaqVzeoHQ,
tglx-hfZtesqFncYOwBW4kG4KsQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Sodaville's SPI controller is very much the same as in PXA25x. The
difference:
- The RX/TX FIFO is only 4 words deep instead of 16
- No DMA support
- The SPI controller offers a CS functionality
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/x86/include/asm/pxa2xx_spi_ce4100.h | 99 +++++++++++++++
drivers/spi/Kconfig | 15 ++-
drivers/spi/Makefile | 1 +
drivers/spi/pxa2xx_spi.c | 1 -
drivers/spi/pxa2xx_spi_pci.c | 201 ++++++++++++++++++++++++++++++
include/linux/spi/pxa2xx_spi.h | 10 ++-
6 files changed, 320 insertions(+), 7 deletions(-)
create mode 100644 arch/x86/include/asm/pxa2xx_spi_ce4100.h
create mode 100644 drivers/spi/pxa2xx_spi_pci.c
diff --git a/arch/x86/include/asm/pxa2xx_spi_ce4100.h b/arch/x86/include/asm/pxa2xx_spi_ce4100.h
new file mode 100644
index 0000000..d86690c
--- /dev/null
+++ b/arch/x86/include/asm/pxa2xx_spi_ce4100.h
@@ -0,0 +1,99 @@
+#ifndef __asm_pxa2xx_spi_ce4100_h
+#define __asm_pxa2xx_spi_ce4100_h
+
+/*
+ * The CE4100 does not provide DMA support. This bits are here to let the driver
+ * compile and will never be used. Maybe we get DMA support at a later point in
+ * time.
+ */
+
+#define DCSR(n) (n)
+#define DSADR(n) (n)
+#define DTADR(n) (n)
+#define DCMD(n) (n)
+#define DRCMR(n) (n)
+
+#define DCSR_RUN (1 << 31) /* Run Bit */
+#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch */
+#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable */
+#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */
+#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */
+#define DCSR_ENDINTR (1 << 2) /* End Interrupt */
+#define DCSR_STARTINTR (1 << 1) /* Start Interrupt */
+#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt */
+
+#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable */
+#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */
+#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */
+#define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */
+#define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */
+#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */
+#define DCSR_EORINTR (1 << 9) /* The end of Receive */
+
+#define DRCMR_MAPVLD (1 << 7) /* Map Valid */
+#define DRCMR_CHLNUM 0x1f /* mask for Channel Number */
+
+#define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor */
+#define DDADR_STOP (1 << 0) /* Stop */
+
+#define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */
+#define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */
+#define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */
+#define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */
+#define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */
+#define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */
+#define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */
+#define DCMD_BURST8 (1 << 16) /* 8 byte burst */
+#define DCMD_BURST16 (2 << 16) /* 16 byte burst */
+#define DCMD_BURST32 (3 << 16) /* 32 byte burst */
+#define DCMD_WIDTH1 (1 << 14) /* 1 byte width */
+#define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */
+#define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */
+#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
+
+/*
+ * Descriptor structure for PXA's DMA engine
+ * Note: this structure must always be aligned to a 16-byte boundary.
+ */
+
+typedef enum {
+ DMA_PRIO_HIGH = 0,
+ DMA_PRIO_MEDIUM = 1,
+ DMA_PRIO_LOW = 2
+} pxa_dma_prio;
+
+/*
+ * DMA registration
+ */
+
+static inline int pxa_request_dma(char *name,
+ pxa_dma_prio prio,
+ void (*irq_handler)(int, void *),
+ void *data)
+{
+ return -ENODEV;
+}
+
+static inline void pxa_free_dma(int dma_ch)
+{
+}
+
+/*
+ * The CE4100 does not have the clk framework implemented and SPI clock can
+ * not be switched on/off or the divider changed.
+ */
+static inline void clk_disable(struct clk *clk)
+{
+}
+
+static inline int clk_enable(struct clk *clk)
+{
+ return 0;
+}
+
+static inline unsigned long clk_get_rate(struct clk *clk)
+{
+ return 3686400;
+}
+
+#endif
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 78f9fd0..e43cb30 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -267,12 +267,17 @@ config SPI_PPC4xx
config SPI_PXA2XX
tristate "PXA2xx SSP SPI master"
- depends on ARCH_PXA && EXPERIMENTAL
- select PXA_SSP
+ depends on (ARCH_PXA || X86_32) && EXPERIMENTAL
+ select PXA_SSP if ARCH_PXA
+ select SPI_PXA2XX_PCI if !ARCH_PXA
help
- This enables using a PXA2xx SSP port as a SPI master controller.
- The driver can be configured to use any SSP port and additional
- documentation can be found a Documentation/spi/pxa2xx.
+ This enables using a PXA2xx or Sodaville SSP port as a SPI master
+ controller. The driver can be configured to use any SSP port and
+ additional documentation can be found a Documentation/spi/pxa2xx.
+
+config SPI_PXA2XX_PCI
+ bool
+ depends on SPI_PXA2XX && PCI
config SPI_S3C24XX
tristate "Samsung S3C24XX series SPI"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 8bc1a5a..bdc4c40 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
obj-$(CONFIG_SPI_IMX) += spi_imx.o
obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
+obj-$(CONFIG_SPI_PXA2XX_PCI) += pxa2xx_spi_pci.o
obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
obj-$(CONFIG_SPI_OMAP_100K) += omap_spi_100k.o
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index 3802ba6..17c1bfb 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -28,7 +28,6 @@
#include <linux/spi/spi.h>
#include <linux/workqueue.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/gpio.h>
#include <linux/slab.h>
diff --git a/drivers/spi/pxa2xx_spi_pci.c b/drivers/spi/pxa2xx_spi_pci.c
new file mode 100644
index 0000000..351d8a3
--- /dev/null
+++ b/drivers/spi/pxa2xx_spi_pci.c
@@ -0,0 +1,201 @@
+/*
+ * CE4100's SPI device is more or less the same one as found on PXA
+ *
+ */
+#include <linux/pci.h>
+#include <linux/platform_device.h>
+#include <linux/of_device.h>
+#include <linux/spi/pxa2xx_spi.h>
+
+struct awesome_struct {
+ struct ssp_device ssp;
+ struct platform_device spi_pdev;
+ struct pxa2xx_spi_master spi_pdata;
+};
+
+static DEFINE_MUTEX(ssp_lock);
+static LIST_HEAD(ssp_list);
+
+struct ssp_device *pxa_ssp_request(int port, const char *label)
+{
+ struct ssp_device *ssp = NULL;
+
+ mutex_lock(&ssp_lock);
+
+ list_for_each_entry(ssp, &ssp_list, node) {
+ if (ssp->port_id == port && ssp->use_count == 0) {
+ ssp->use_count++;
+ ssp->label = label;
+ break;
+ }
+ }
+
+ mutex_unlock(&ssp_lock);
+
+ if (&ssp->node == &ssp_list)
+ return NULL;
+
+ return ssp;
+}
+EXPORT_SYMBOL_GPL(pxa_ssp_request);
+
+void pxa_ssp_free(struct ssp_device *ssp)
+{
+ mutex_lock(&ssp_lock);
+ if (ssp->use_count) {
+ ssp->use_count--;
+ ssp->label = NULL;
+ } else
+ dev_err(&ssp->pdev->dev, "device already free\n");
+ mutex_unlock(&ssp_lock);
+}
+EXPORT_SYMBOL_GPL(pxa_ssp_free);
+
+static void plat_dev_release(struct device *dev)
+{
+ struct awesome_struct *as = container_of(dev,
+ struct awesome_struct, spi_pdev.dev);
+
+ of_device_node_put(&as->spi_pdev.dev);
+}
+
+static int __devinit ce4100_spi_probe(struct pci_dev *dev,
+ const struct pci_device_id *ent)
+{
+ int ret;
+ resource_size_t phys_beg;
+ resource_size_t phys_len;
+ struct awesome_struct *spi_info;
+ struct platform_device *pdev;
+ struct pxa2xx_spi_master *spi_pdata;
+ struct ssp_device *ssp;
+
+ ret = pci_enable_device(dev);
+ if (ret)
+ return ret;
+
+ phys_beg = pci_resource_start(dev, 0);
+ phys_len = pci_resource_len(dev, 0);
+
+ if (!request_mem_region(phys_beg, phys_len,
+ "CE4100 SPI")) {
+ dev_err(&dev->dev, "Can't request register space.\n");
+ ret = -EBUSY;
+ return ret;
+ }
+
+ spi_info = kzalloc(sizeof(*spi_info), GFP_KERNEL);
+ if (!spi_info) {
+ ret = -ENOMEM;
+ goto err_kz;
+ }
+ ssp = &spi_info->ssp;
+ pdev = &spi_info->spi_pdev;
+ spi_pdata = &spi_info->spi_pdata;
+
+ pdev->name = "pxa2xx-spi";
+ pdev->id = dev->devfn;
+ pdev->dev.parent = &dev->dev;
+ pdev->dev.platform_data = &spi_info->spi_pdata;
+
+#ifdef CONFIG_OF
+ pdev->dev.of_node = dev->dev.of_node;
+#endif
+ pdev->dev.release = plat_dev_release;
+
+ spi_pdata->num_chipselect = dev->devfn;
+
+ ssp->phys_base = pci_resource_start(dev, 0);
+ ssp->mmio_base = ioremap(phys_beg, phys_len);
+ if (!ssp->mmio_base) {
+ dev_err(&pdev->dev, "failed to ioremap() registers\n");
+ ret = -EIO;
+ goto err_remap;
+ }
+ ssp->irq = dev->irq;
+ ssp->port_id = pdev->id;
+ ssp->type = PXA25x_SSP;
+
+ mutex_lock(&ssp_lock);
+ list_add(&ssp->node, &ssp_list);
+ mutex_unlock(&ssp_lock);
+
+ pci_set_drvdata(dev, spi_info);
+
+ ret = platform_device_register(pdev);
+ if (ret)
+ goto err_dev_add;
+
+ return ret;
+
+err_dev_add:
+ pci_set_drvdata(dev, NULL);
+ mutex_lock(&ssp_lock);
+ list_del(&ssp->node);
+ mutex_unlock(&ssp_lock);
+ iounmap(ssp->mmio_base);
+
+err_remap:
+ kfree(spi_info);
+
+err_kz:
+ release_mem_region(phys_beg, phys_len);
+
+ return ret;
+}
+
+static void __devexit ce4100_spi_remove(struct pci_dev *dev)
+{
+ struct awesome_struct *spi_info;
+ struct platform_device *pdev;
+ struct ssp_device *ssp;
+
+ spi_info = pci_get_drvdata(dev);
+
+ ssp = &spi_info->ssp;
+ pdev = &spi_info->spi_pdev;
+
+ platform_device_unregister(pdev);
+
+ iounmap(ssp->mmio_base);
+ release_mem_region(pci_resource_start(dev, 0),
+ pci_resource_len(dev, 0));
+
+ mutex_lock(&ssp_lock);
+ list_del(&ssp->node);
+ mutex_unlock(&ssp_lock);
+
+ pci_set_drvdata(dev, NULL);
+ pci_disable_device(dev);
+ kfree(spi_info);
+}
+
+static struct pci_device_id ce4100_spi_devices[] __devinitdata = {
+
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x2e6a) },
+ { },
+};
+MODULE_DEVICE_TABLE(pci, ce4100_spi_devices);
+
+static struct pci_driver ce4100_spi_driver = {
+ .name = "ce4100_spi",
+ .id_table = ce4100_spi_devices,
+ .probe = ce4100_spi_probe,
+ .remove = __devexit_p(ce4100_spi_remove),
+};
+
+static int __init ce4100_spi_init(void)
+{
+ return pci_register_driver(&ce4100_spi_driver);
+}
+module_init(ce4100_spi_init);
+
+static void __exit ce4100_spi_exit(void)
+{
+ pci_unregister_driver(&ce4100_spi_driver);
+}
+module_exit(ce4100_spi_exit);
+
+MODULE_DESCRIPTION("CE4100 PCI-SPI glue code for PXA's driver");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>");
diff --git a/include/linux/spi/pxa2xx_spi.h b/include/linux/spi/pxa2xx_spi.h
index 471ed68..48b8f6b 100644
--- a/include/linux/spi/pxa2xx_spi.h
+++ b/include/linux/spi/pxa2xx_spi.h
@@ -19,7 +19,6 @@
#define __linux_pxa2xx_spi_h
#include <linux/pxa2xx_ssp.h>
-#include <mach/dma.h>
#define PXA2XX_CS_ASSERT (0x01)
#define PXA2XX_CS_DEASSERT (0x02)
@@ -44,6 +43,15 @@ struct pxa2xx_spi_chip {
void (*cs_control)(u32 command);
};
+#ifdef CONFIG_ARCH_PXA
+
+#include <linux/clk.h>
+#include <mach/dma.h>
+
extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info);
+#else
+#include <asm/pxa2xx_spi_ce4100.h>
+
+#endif
#endif
--
1.7.3.2
------------------------------------------------------------------------------
Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
Tap into the largest installed PC base & get more eyes on your game by
optimizing for Intel(R) Graphics Technology. Get started today with the
Intel(R) Software Partner Program. Five $500 cash prizes are up for grabs.
http://p.sf.net/sfu/intelisp-dev2dev
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 6/9] spi/pxa2xx: Consider CE4100's FIFO depth
[not found] ` <1290597207-29838-1-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
` (4 preceding siblings ...)
2010-11-24 11:13 ` [PATCH 5/9] spi/pxa2xx: Add CE4100 support Sebastian Andrzej Siewior
@ 2010-11-24 11:13 ` Sebastian Andrzej Siewior
2010-11-24 11:13 ` [PATCH 7/9] spi/pxa2xx: Add chipselect support for Sodaville Sebastian Andrzej Siewior
` (2 subsequent siblings)
8 siblings, 0 replies; 26+ messages in thread
From: Sebastian Andrzej Siewior @ 2010-11-24 11:13 UTC (permalink / raw)
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
Cc: David Brownell, eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w,
Sebastian Andrzej Siewior, sodaville-hfZtesqFncYOwBW4kG4KsQ,
Dirk Brandewie, linux-lFZ/pmaqli7XmaaqVzeoHQ,
tglx-hfZtesqFncYOwBW4kG4KsQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
For PXA the default threshold is FIFO_DEPTH / 2. Adjust this value for
CE4100.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/arm/include/asm/pxa2xx_ssp.h | 15 +++++++++++++++
arch/x86/include/asm/pxa2xx_ssp.h | 15 +++++++++++++++
drivers/spi/pxa2xx_spi.c | 2 --
include/linux/pxa2xx_ssp.h | 7 +------
4 files changed, 31 insertions(+), 8 deletions(-)
create mode 100644 arch/arm/include/asm/pxa2xx_ssp.h
create mode 100644 arch/x86/include/asm/pxa2xx_ssp.h
diff --git a/arch/arm/include/asm/pxa2xx_ssp.h b/arch/arm/include/asm/pxa2xx_ssp.h
new file mode 100644
index 0000000..49eaab7
--- /dev/null
+++ b/arch/arm/include/asm/pxa2xx_ssp.h
@@ -0,0 +1,15 @@
+#ifndef ASM_PXA2XX_SSP_H
+#define ASM_PXA2XX_SSP_H
+
+#define RX_THRESH_DFLT 8
+#define TX_THRESH_DFLT 8
+
+#define SSSR_TFL_MASK (0xf << 8) /* Transmit FIFO Level mask */
+#define SSSR_RFL_MASK (0xf << 12) /* Receive FIFO Level mask */
+
+#define SSCR1_TFT (0x000003c0) /* Transmit FIFO Threshold (mask) */
+#define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..16] */
+#define SSCR1_RFT (0x00003c00) /* Receive FIFO Threshold (mask) */
+#define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..16] */
+
+#endif
diff --git a/arch/x86/include/asm/pxa2xx_ssp.h b/arch/x86/include/asm/pxa2xx_ssp.h
new file mode 100644
index 0000000..217e584
--- /dev/null
+++ b/arch/x86/include/asm/pxa2xx_ssp.h
@@ -0,0 +1,15 @@
+#ifndef ASM_PXA2XX_SSP_H
+#define ASM_PXA2XX_SSP_H
+
+#define RX_THRESH_DFLT 2
+#define TX_THRESH_DFLT 2
+
+#define SSSR_TFL_MASK (0x3 << 8) /* Transmit FIFO Level mask */
+#define SSSR_RFL_MASK (0x3 << 12) /* Receive FIFO Level mask */
+
+#define SSCR1_TFT (0x000000c0) /* Transmit FIFO Threshold (mask) */
+#define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..4] */
+#define SSCR1_RFT (0x00000c00) /* Receive FIFO Threshold (mask) */
+#define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..4] */
+
+#endif
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index 17c1bfb..fcb5d67 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -43,8 +43,6 @@ MODULE_ALIAS("platform:pxa2xx-spi");
#define MAX_BUSES 3
-#define RX_THRESH_DFLT 8
-#define TX_THRESH_DFLT 8
#define TIMOUT_DFLT 1000
#define DMA_INT_MASK (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR)
diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h
index 84465d4..12d3b19 100644
--- a/include/linux/pxa2xx_ssp.h
+++ b/include/linux/pxa2xx_ssp.h
@@ -21,6 +21,7 @@
#include <linux/list.h>
#include <linux/io.h>
+#include <asm/pxa2xx_ssp.h>
/*
* SSP Serial Port Registers
@@ -71,10 +72,6 @@
#define SSCR1_SPO (1 << 3) /* Motorola SPI SSPSCLK polarity setting */
#define SSCR1_SPH (1 << 4) /* Motorola SPI SSPSCLK phase setting */
#define SSCR1_MWDS (1 << 5) /* Microwire Transmit Data Size */
-#define SSCR1_TFT (0x000003c0) /* Transmit FIFO Threshold (mask) */
-#define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..16] */
-#define SSCR1_RFT (0x00003c00) /* Receive FIFO Threshold (mask) */
-#define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..16] */
#define SSSR_TNF (1 << 2) /* Transmit FIFO Not Full */
#define SSSR_RNE (1 << 3) /* Receive FIFO Not Empty */
@@ -82,8 +79,6 @@
#define SSSR_TFS (1 << 5) /* Transmit FIFO Service Request */
#define SSSR_RFS (1 << 6) /* Receive FIFO Service Request */
#define SSSR_ROR (1 << 7) /* Receive FIFO Overrun */
-#define SSSR_TFL_MASK (0xf << 8) /* Transmit FIFO Level mask */
-#define SSSR_RFL_MASK (0xf << 12) /* Receive FIFO Level mask */
/* extra bits in PXA255, PXA26x and PXA27x SSP ports */
#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */
--
1.7.3.2
------------------------------------------------------------------------------
Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
Tap into the largest installed PC base & get more eyes on your game by
optimizing for Intel(R) Graphics Technology. Get started today with the
Intel(R) Software Partner Program. Five $500 cash prizes are up for grabs.
http://p.sf.net/sfu/intelisp-dev2dev
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 7/9] spi/pxa2xx: Add chipselect support for Sodaville
[not found] ` <1290597207-29838-1-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
` (5 preceding siblings ...)
2010-11-24 11:13 ` [PATCH 6/9] spi/pxa2xx: Consider CE4100's FIFO depth Sebastian Andrzej Siewior
@ 2010-11-24 11:13 ` Sebastian Andrzej Siewior
2010-11-24 11:13 ` [PATCH 8/9] spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes Sebastian Andrzej Siewior
2010-11-24 11:13 ` [PATCH 9/9] spi/pxa2xx: pass of_node to spi device and set a parent device Sebastian Andrzej Siewior
8 siblings, 0 replies; 26+ messages in thread
From: Sebastian Andrzej Siewior @ 2010-11-24 11:13 UTC (permalink / raw)
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
Cc: David Brownell, eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w,
Sebastian Andrzej Siewior, sodaville-hfZtesqFncYOwBW4kG4KsQ,
Dirk Brandewie, linux-lFZ/pmaqli7XmaaqVzeoHQ,
tglx-hfZtesqFncYOwBW4kG4KsQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
The SPI core on Sodaville supports chip selects. Its configuration
moved into the SSSR register at bit 0 and 1. Thus Sodaville can be hooked
up with up to 4 devices.
This patch ensures that the bits which are otherwiese reserved are only
touched on Sodaville and not on any other PXAs. Also it makes sure that
the status register does not lose the CS information while clearing the
ROR bit.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
drivers/spi/pxa2xx_spi.c | 93 ++++++++++++++++++++++++++++++++------------
include/linux/pxa2xx_ssp.h | 2 +
2 files changed, 70 insertions(+), 25 deletions(-)
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index fcb5d67..d77e47f 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -163,7 +163,10 @@ struct chip_data {
u8 enable_dma;
u8 bits_per_word;
u32 speed_hz;
- int gpio_cs;
+ union {
+ int gpio_cs;
+ unsigned int frm;
+ };
int gpio_cs_inverted;
int (*write)(struct driver_data *drv_data);
int (*read)(struct driver_data *drv_data);
@@ -176,6 +179,11 @@ static void cs_assert(struct driver_data *drv_data)
{
struct chip_data *chip = drv_data->cur_chip;
+ if (drv_data->ssp_type == Sodaville_SSP) {
+ write_SSSR(drv_data->cur_chip->frm, drv_data->ioaddr);
+ return;
+ }
+
if (chip->cs_control) {
chip->cs_control(PXA2XX_CS_ASSERT);
return;
@@ -189,6 +197,9 @@ static void cs_deassert(struct driver_data *drv_data)
{
struct chip_data *chip = drv_data->cur_chip;
+ if (drv_data->ssp_type == Sodaville_SSP)
+ return;
+
if (chip->cs_control) {
chip->cs_control(PXA2XX_CS_DEASSERT);
return;
@@ -198,6 +209,25 @@ static void cs_deassert(struct driver_data *drv_data)
gpio_set_value(chip->gpio_cs, !chip->gpio_cs_inverted);
}
+static void write_SSSR_CS(struct driver_data *drv_data, u32 val)
+{
+ void __iomem *reg = drv_data->ioaddr;
+
+ if (drv_data->ssp_type == Sodaville_SSP)
+ val |= read_SSSR(reg) & SSSR_ALT_FRM_MASK;
+
+ write_SSSR(val, reg);
+}
+
+static int pxa25x_ssp_comp(struct driver_data *drv_data)
+{
+ if (drv_data->ssp_type == PXA25x_SSP)
+ return 1;
+ if (drv_data->ssp_type == Sodaville_SSP)
+ return 1;
+ return 0;
+}
+
static int flush(struct driver_data *drv_data)
{
unsigned long limit = loops_per_jiffy << 1;
@@ -209,7 +239,7 @@ static int flush(struct driver_data *drv_data)
read_SSDR(reg);
}
} while ((read_SSSR(reg) & SSSR_BSY) && --limit);
- write_SSSR(SSSR_ROR, reg);
+ write_SSSR_CS(drv_data, SSSR_ROR);
return limit;
}
@@ -502,9 +532,9 @@ static void dma_error_stop(struct driver_data *drv_data, const char *msg)
/* Stop and reset */
DCSR(drv_data->rx_channel) = RESET_DMA_CHANNEL;
DCSR(drv_data->tx_channel) = RESET_DMA_CHANNEL;
- write_SSSR(drv_data->clear_sr, reg);
+ write_SSSR_CS(drv_data, drv_data->clear_sr);
write_SSCR1(read_SSCR1(reg) & ~drv_data->dma_cr1, reg);
- if (drv_data->ssp_type != PXA25x_SSP)
+ if (!pxa25x_ssp_comp(drv_data))
write_SSTO(0, reg);
flush(drv_data);
write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg);
@@ -524,7 +554,7 @@ static void dma_transfer_complete(struct driver_data *drv_data)
/* Clear and disable interrupts on SSP and DMA channels*/
write_SSCR1(read_SSCR1(reg) & ~drv_data->dma_cr1, reg);
- write_SSSR(drv_data->clear_sr, reg);
+ write_SSSR_CS(drv_data, drv_data->clear_sr);
DCSR(drv_data->tx_channel) = RESET_DMA_CHANNEL;
DCSR(drv_data->rx_channel) = RESET_DMA_CHANNEL;
@@ -617,7 +647,7 @@ static irqreturn_t dma_transfer(struct driver_data *drv_data)
/* Clear and disable timeout interrupt, do the rest in
* dma_transfer_complete */
- if (drv_data->ssp_type != PXA25x_SSP)
+ if (!pxa25x_ssp_comp(drv_data))
write_SSTO(0, reg);
/* finish this transfer, start the next */
@@ -635,9 +665,9 @@ static void int_error_stop(struct driver_data *drv_data, const char* msg)
void __iomem *reg = drv_data->ioaddr;
/* Stop and reset SSP */
- write_SSSR(drv_data->clear_sr, reg);
+ write_SSSR_CS(drv_data, drv_data->clear_sr);
write_SSCR1(read_SSCR1(reg) & ~drv_data->int_cr1, reg);
- if (drv_data->ssp_type != PXA25x_SSP)
+ if (!pxa25x_ssp_comp(drv_data))
write_SSTO(0, reg);
flush(drv_data);
write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg);
@@ -653,9 +683,9 @@ static void int_transfer_complete(struct driver_data *drv_data)
void __iomem *reg = drv_data->ioaddr;
/* Stop SSP */
- write_SSSR(drv_data->clear_sr, reg);
+ write_SSSR_CS(drv_data, drv_data->clear_sr);
write_SSCR1(read_SSCR1(reg) & ~drv_data->int_cr1, reg);
- if (drv_data->ssp_type != PXA25x_SSP)
+ if (!pxa25x_ssp_comp(drv_data))
write_SSTO(0, reg);
/* Update total byte transfered return count actual bytes read */
@@ -711,7 +741,7 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data)
if (drv_data->tx == drv_data->tx_end) {
write_SSCR1(read_SSCR1(reg) & ~SSCR1_TIE, reg);
/* PXA25x_SSP has no timeout, read trailing bytes */
- if (drv_data->ssp_type == PXA25x_SSP) {
+ if (pxa25x_ssp_comp(drv_data)) {
if (!wait_ssp_rx_stall(reg))
{
int_error_stop(drv_data, "interrupt_transfer: "
@@ -754,9 +784,9 @@ static irqreturn_t ssp_int(int irq, void *dev_id)
write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg);
write_SSCR1(read_SSCR1(reg) & ~drv_data->int_cr1, reg);
- if (drv_data->ssp_type != PXA25x_SSP)
+ if (!pxa25x_ssp_comp(drv_data))
write_SSTO(0, reg);
- write_SSSR(drv_data->clear_sr, reg);
+ write_SSSR_CS(drv_data, drv_data->clear_sr);
dev_err(&drv_data->pdev->dev, "bad message state "
"in interrupt handler\n");
@@ -869,7 +899,7 @@ static unsigned int ssp_get_clk_div(struct ssp_device *ssp, int rate)
{
unsigned long ssp_clk = clk_get_rate(ssp->clk);
- if (ssp->type == PXA25x_SSP)
+ if (ssp->type == PXA25x_SSP || ssp->type == Sodaville_SSP)
return ((ssp_clk / (2 * rate) - 1) & 0xff) << 8;
else
return ((ssp_clk / rate - 1) & 0xfff) << 8;
@@ -1095,7 +1125,7 @@ static void pump_transfers(unsigned long data)
/* Clear status */
cr1 = chip->cr1 | chip->threshold | drv_data->int_cr1;
- write_SSSR(drv_data->clear_sr, reg);
+ write_SSSR_CS(drv_data, drv_data->clear_sr);
}
/* see if we need to reload the config registers */
@@ -1105,7 +1135,7 @@ static void pump_transfers(unsigned long data)
/* stop the SSP, and update the other bits */
write_SSCR0(cr0 & ~SSCR0_SSE, reg);
- if (drv_data->ssp_type != PXA25x_SSP)
+ if (!pxa25x_ssp_comp(drv_data))
write_SSTO(chip->timeout, reg);
/* first set CR1 without interrupt and service enables */
write_SSCR1(cr1 & SSCR1_CHANGE_MASK, reg);
@@ -1113,7 +1143,7 @@ static void pump_transfers(unsigned long data)
write_SSCR0(cr0, reg);
} else {
- if (drv_data->ssp_type != PXA25x_SSP)
+ if (!pxa25x_ssp_comp(drv_data))
write_SSTO(chip->timeout, reg);
}
@@ -1240,14 +1270,13 @@ static int setup(struct spi_device *spi)
uint tx_thres = TX_THRESH_DFLT;
uint rx_thres = RX_THRESH_DFLT;
- if (drv_data->ssp_type != PXA25x_SSP
+ if (!pxa25x_ssp_comp(drv_data)
&& (spi->bits_per_word < 4 || spi->bits_per_word > 32)) {
dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d "
"b/w not 4-32 for type non-PXA25x_SSP\n",
drv_data->ssp_type, spi->bits_per_word);
return -EINVAL;
- }
- else if (drv_data->ssp_type == PXA25x_SSP
+ } else if (pxa25x_ssp_comp(drv_data)
&& (spi->bits_per_word < 4
|| spi->bits_per_word > 16)) {
dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d "
@@ -1266,7 +1295,17 @@ static int setup(struct spi_device *spi)
return -ENOMEM;
}
- chip->gpio_cs = -1;
+ if (drv_data->ssp_type == Sodaville_SSP) {
+ if (spi->chip_select > 4) {
+ dev_err(&spi->dev, "failed setup: "
+ "cs number must not be > 4.\n");
+ kfree(chip);
+ return -EINVAL;
+ }
+
+ chip->frm = spi->chip_select;
+ } else
+ chip->gpio_cs = -1;
chip->enable_dma = 0;
chip->timeout = TIMOUT_DFLT;
chip->dma_burst_size = drv_data->master_info->enable_dma ?
@@ -1322,7 +1361,7 @@ static int setup(struct spi_device *spi)
| (((spi->mode & SPI_CPOL) != 0) ? SSCR1_SPO : 0);
/* NOTE: PXA25x_SSP _could_ use external clocking ... */
- if (drv_data->ssp_type != PXA25x_SSP)
+ if (!pxa25x_ssp_comp(drv_data))
dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
clk_get_rate(ssp->clk)
/ (1 + ((chip->cr0 & SSCR0_SCR(0xfff)) >> 8)),
@@ -1357,17 +1396,21 @@ static int setup(struct spi_device *spi)
spi_set_ctldata(spi, chip);
+ if (drv_data->ssp_type == Sodaville_SSP)
+ return 0;
+
return setup_cs(spi, chip, chip_info);
}
static void cleanup(struct spi_device *spi)
{
struct chip_data *chip = spi_get_ctldata(spi);
+ struct driver_data *drv_data = spi_master_get_devdata(spi->master);
if (!chip)
return;
- if (gpio_is_valid(chip->gpio_cs))
+ if (drv_data->ssp_type != Sodaville_SSP && gpio_is_valid(chip->gpio_cs))
gpio_free(chip->gpio_cs);
kfree(chip);
@@ -1507,7 +1550,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
drv_data->ioaddr = ssp->mmio_base;
drv_data->ssdr_physical = ssp->phys_base + SSDR;
- if (ssp->type == PXA25x_SSP) {
+ if (pxa25x_ssp_comp(drv_data)) {
drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE;
drv_data->dma_cr1 = 0;
drv_data->clear_sr = SSSR_ROR;
@@ -1569,7 +1612,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
| SSCR0_Motorola
| SSCR0_DataSize(8),
drv_data->ioaddr);
- if (drv_data->ssp_type != PXA25x_SSP)
+ if (!pxa25x_ssp_comp(drv_data))
write_SSTO(0, drv_data->ioaddr);
write_SSPSP(0, drv_data->ioaddr);
diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h
index 12d3b19..21353574 100644
--- a/include/linux/pxa2xx_ssp.h
+++ b/include/linux/pxa2xx_ssp.h
@@ -73,6 +73,7 @@
#define SSCR1_SPH (1 << 4) /* Motorola SPI SSPSCLK phase setting */
#define SSCR1_MWDS (1 << 5) /* Microwire Transmit Data Size */
+#define SSSR_ALT_FRM_MASK 3 /* Masks the SFRM signal number */
#define SSSR_TNF (1 << 2) /* Transmit FIFO Not Full */
#define SSSR_RNE (1 << 3) /* Receive FIFO Not Empty */
#define SSSR_BSY (1 << 4) /* SSP Busy */
@@ -135,6 +136,7 @@ enum pxa_ssp_type {
PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
PXA27x_SSP,
PXA168_SSP,
+ Sodaville_SSP,
};
struct ssp_device {
--
1.7.3.2
------------------------------------------------------------------------------
Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
Tap into the largest installed PC base & get more eyes on your game by
optimizing for Intel(R) Graphics Technology. Get started today with the
Intel(R) Software Partner Program. Five $500 cash prizes are up for grabs.
http://p.sf.net/sfu/intelisp-dev2dev
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 8/9] spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes.
[not found] ` <1290597207-29838-1-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
` (6 preceding siblings ...)
2010-11-24 11:13 ` [PATCH 7/9] spi/pxa2xx: Add chipselect support for Sodaville Sebastian Andrzej Siewior
@ 2010-11-24 11:13 ` Sebastian Andrzej Siewior
2010-11-24 11:13 ` [PATCH 9/9] spi/pxa2xx: pass of_node to spi device and set a parent device Sebastian Andrzej Siewior
8 siblings, 0 replies; 26+ messages in thread
From: Sebastian Andrzej Siewior @ 2010-11-24 11:13 UTC (permalink / raw)
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
Cc: David Brownell, eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w,
Sebastian Andrzej Siewior, sodaville-hfZtesqFncYOwBW4kG4KsQ,
Dirk Brandewie, linux-lFZ/pmaqli7XmaaqVzeoHQ,
tglx-hfZtesqFncYOwBW4kG4KsQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
After all TX bytes are sent, the driver spins while the SPI core is busy
and then it spins for a "short" period of time until RX bytes are
available.
On Sodavile the busy flag disappears pretty quick and after that it
takes approx ~130ms (sometimes less but not much) until there are bytes
available in the RX FIFO.
This patch removes the busy loop and modifies the RX threshould so we
get woken up once the remainings bytes arrived.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
drivers/spi/pxa2xx_spi.c | 56 ++++++++++++++++++++++++++++++++--------------
1 files changed, 39 insertions(+), 17 deletions(-)
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index d77e47f..5c8c6e3 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -660,13 +660,25 @@ static irqreturn_t dma_transfer(struct driver_data *drv_data)
return IRQ_NONE;
}
+static void reset_sccr1(struct driver_data *drv_data)
+{
+ void __iomem *reg = drv_data->ioaddr;
+ struct chip_data *chip = drv_data->cur_chip;
+ u32 sccr1_reg;
+
+ sccr1_reg = read_SSCR1(reg) & ~drv_data->int_cr1;
+ sccr1_reg &= ~SSCR1_RFT;
+ sccr1_reg |= chip->threshold;
+ write_SSCR1(sccr1_reg, reg);
+}
+
static void int_error_stop(struct driver_data *drv_data, const char* msg)
{
void __iomem *reg = drv_data->ioaddr;
/* Stop and reset SSP */
write_SSSR_CS(drv_data, drv_data->clear_sr);
- write_SSCR1(read_SSCR1(reg) & ~drv_data->int_cr1, reg);
+ reset_sccr1(drv_data);
if (!pxa25x_ssp_comp(drv_data))
write_SSTO(0, reg);
flush(drv_data);
@@ -684,7 +696,7 @@ static void int_transfer_complete(struct driver_data *drv_data)
/* Stop SSP */
write_SSSR_CS(drv_data, drv_data->clear_sr);
- write_SSCR1(read_SSCR1(reg) & ~drv_data->int_cr1, reg);
+ reset_sccr1(drv_data);
if (!pxa25x_ssp_comp(drv_data))
write_SSTO(0, reg);
@@ -739,24 +751,34 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data)
}
if (drv_data->tx == drv_data->tx_end) {
- write_SSCR1(read_SSCR1(reg) & ~SSCR1_TIE, reg);
- /* PXA25x_SSP has no timeout, read trailing bytes */
+ u32 bytes_left;
+ u32 sccr1_reg;
+
+ sccr1_reg = read_SSCR1(reg);
+ sccr1_reg &= ~SSCR1_TIE;
+
+ /*
+ * PXA25x_SSP has no timeout, set up rx threshould for the
+ * remaing RX bytes.
+ */
if (pxa25x_ssp_comp(drv_data)) {
- if (!wait_ssp_rx_stall(reg))
- {
- int_error_stop(drv_data, "interrupt_transfer: "
- "rx stall failed");
- return IRQ_HANDLED;
- }
- if (!drv_data->read(drv_data))
- {
- int_error_stop(drv_data,
- "interrupt_transfer: "
- "trailing byte read failed");
- return IRQ_HANDLED;
+
+ sccr1_reg &= ~SSCR1_RFT;
+
+ bytes_left = drv_data->rx_end - drv_data->rx;
+ switch (drv_data->n_bytes) {
+ case 4:
+ bytes_left >>= 1;
+ case 2:
+ bytes_left >>= 1;
}
- int_transfer_complete(drv_data);
+
+ if (bytes_left > RX_THRESH_DFLT)
+ bytes_left = RX_THRESH_DFLT;
+
+ sccr1_reg |= SSCR1_RxTresh(bytes_left);
}
+ write_SSCR1(sccr1_reg, reg);
}
/* We did something */
--
1.7.3.2
------------------------------------------------------------------------------
Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
Tap into the largest installed PC base & get more eyes on your game by
optimizing for Intel(R) Graphics Technology. Get started today with the
Intel(R) Software Partner Program. Five $500 cash prizes are up for grabs.
http://p.sf.net/sfu/intelisp-dev2dev
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 9/9] spi/pxa2xx: pass of_node to spi device and set a parent device
[not found] ` <1290597207-29838-1-git-send-email-bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
` (7 preceding siblings ...)
2010-11-24 11:13 ` [PATCH 8/9] spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes Sebastian Andrzej Siewior
@ 2010-11-24 11:13 ` Sebastian Andrzej Siewior
8 siblings, 0 replies; 26+ messages in thread
From: Sebastian Andrzej Siewior @ 2010-11-24 11:13 UTC (permalink / raw)
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
Cc: David Brownell, eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w,
Sebastian Andrzej Siewior, sodaville-hfZtesqFncYOwBW4kG4KsQ,
linux-lFZ/pmaqli7XmaaqVzeoHQ, tglx-hfZtesqFncYOwBW4kG4KsQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
the of_node will auto-publish devices which are added to the device
tree.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
---
drivers/spi/pxa2xx_spi.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index 5c8c6e3..6d3cb79 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -1556,6 +1556,10 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
drv_data->pdev = pdev;
drv_data->ssp = ssp;
+ master->dev.parent = &pdev->dev;
+#ifdef CONFIG_OF
+ master->dev.of_node = pdev->dev.of_node;
+#endif
/* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
--
1.7.3.2
------------------------------------------------------------------------------
Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
Tap into the largest installed PC base & get more eyes on your game by
optimizing for Intel(R) Graphics Technology. Get started today with the
Intel(R) Software Partner Program. Five $500 cash prizes are up for grabs.
http://p.sf.net/sfu/intelisp-dev2dev
^ permalink raw reply related [flat|nested] 26+ messages in thread