From: Frank Oltmanns <frank@oltmanns.dev>
To: Roman Beranek <me@crly.cz>
Cc: Maxime Ripard <mripard@kernel.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Icenowy Zheng <icenowy@aosc.io>, Ondrej Jirman <megi@xff.cz>,
devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 0/4] drm: sun4i: set proper TCON0 DCLK rate in DSI mode
Date: Wed, 10 May 2023 06:30:04 +0200 [thread overview]
Message-ID: <874jokg5sf.fsf@oltmanns.dev> (raw)
In-Reply-To: <CSHP4M31IC80.2WGQC75I3PX71@void.crly.cz>
Hello Roman,
On 2023-05-09 at 13:04:50 +0200, "Roman Beranek" <me@crly.cz> wrote:
> On Mon May 8, 2023 at 10:47 AM CEST, Frank Oltmanns wrote:
>> I played back a 60 fps video (10 seconds) and recorded the panel's
>> output with a 240 fps camera. I noticed only 2 dropped frames, that I
>> account to the imperfect data rate of 107.8MHz instead of 108 MHz due
>> to pll-video0's rate being 294MHz instead of the 297 MHz for reasons
>> I described in the thread on your v2 of this patch [4]).
>
> Yes. That's what should happen, right? Or do you report this as a
> defect?
Sorry, I didn't communicate more clearly. Without your patch, I'm losing
a number of frames in the realm of three digits. With your patch I only
lost 2 frames which is expetcted. Your patches are a big improvement.
This is the opposite of a defect report. :-)
Thanks,
Frank
>
> Roman
prev parent reply other threads:[~2023-05-10 4:38 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 5:21 [PATCH v4 0/4] drm: sun4i: set proper TCON0 DCLK rate in DSI mode Roman Beranek
2023-05-05 5:21 ` [PATCH v4 1/4] clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux Roman Beranek
2023-05-10 14:04 ` Maxime Ripard
2023-05-10 18:43 ` Jernej Škrabec
2023-05-18 21:07 ` Jernej Škrabec
2023-05-05 5:21 ` [PATCH v4 2/4] ARM: dts: sunxi: rename tcon's clock output Roman Beranek
2023-05-10 14:04 ` Maxime Ripard
2023-05-10 18:44 ` Jernej Škrabec
2023-05-18 21:09 ` Jernej Škrabec
2023-05-05 5:21 ` [PATCH v4 3/4] drm: sun4i: rename sun4i_dotclock to sun4i_tcon_dclk Roman Beranek
2023-05-10 14:04 ` (subset) " Maxime Ripard
2023-05-05 5:21 ` [PATCH v4 4/4] drm: sun4i: calculate proper DCLK rate for DSI Roman Beranek
2023-05-10 14:04 ` (subset) " Maxime Ripard
2023-05-08 8:47 ` [PATCH v4 0/4] drm: sun4i: set proper TCON0 DCLK rate in DSI mode Frank Oltmanns
2023-05-09 11:04 ` Roman Beranek
2023-05-10 4:30 ` Frank Oltmanns [this message]
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