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From: "Luis R. Rodriguez" <lrodriguez@atheros.com>
To: linville@tuxdriver.com
Cc: linux-wireless@vger.kernel.org,
	Vasanthakumar Thiagarajan <vasanth@atheros.com>,
	"Luis R. Rodriguez" <lrodriguez@atheros.com>,
	Felix Fietkau <nbd@openwrt.org>
Subject: [PATCH v3 91/97] ath9k: Add Tx EDMA support
Date: Thu, 15 Apr 2010 17:39:36 -0400	[thread overview]
Message-ID: <1271367582-992-92-git-send-email-lrodriguez@atheros.com> (raw)
In-Reply-To: <1271367582-992-1-git-send-email-lrodriguez@atheros.com>

From: Vasanthakumar Thiagarajan <vasanth@atheros.com>

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
---
 drivers/net/wireless/ath/ath9k/ath9k.h |    6 +
 drivers/net/wireless/ath/ath9k/main.c  |    8 +-
 drivers/net/wireless/ath/ath9k/xmit.c  |  264 +++++++++++++++++++++++++-------
 3 files changed, 218 insertions(+), 60 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 2d3e42a..fbb7dec 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -190,6 +190,7 @@ enum ATH_AGGR_STATUS {
 	ATH_AGGR_LIMITED,
 };
 
+#define ATH_TXFIFO_DEPTH 8
 struct ath_txq {
 	u32 axq_qnum;
 	u32 *axq_link;
@@ -199,6 +200,10 @@ struct ath_txq {
 	bool stopped;
 	bool axq_tx_inprogress;
 	struct list_head axq_acq;
+	struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
+	struct list_head txq_fifo_pending;
+	u8 txq_headidx;
+	u8 txq_tailidx;
 };
 
 #define AGGR_CLEANUP         BIT(1)
@@ -268,6 +273,7 @@ int ath_txq_update(struct ath_softc *sc, int qnum,
 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
 		 struct ath_tx_control *txctl);
 void ath_tx_tasklet(struct ath_softc *sc);
+void ath_tx_edma_tasklet(struct ath_softc *sc);
 void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb);
 bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno);
 void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index 92f6fdc..1f4ea74 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -429,8 +429,12 @@ void ath9k_tasklet(unsigned long data)
 		spin_unlock_bh(&sc->rx.rxflushlock);
 	}
 
-	if (status & ATH9K_INT_TX)
-		ath_tx_tasklet(sc);
+	if (status & ATH9K_INT_TX) {
+		if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
+			ath_tx_edma_tasklet(sc);
+		else
+			ath_tx_tasklet(sc);
+	}
 
 	if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 		/*
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index f9f7445..c2b4503 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -92,7 +92,6 @@ static int ath_max_4ms_framelen[3][16] = {
 	}
 };
 
-
 /*********************/
 /* Aggregation logic */
 /*********************/
@@ -379,7 +378,8 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
 			}
 		}
 
-		if (bf_next == NULL) {
+		if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
+		    bf_next == NULL) {
 			/*
 			 * Make sure the last desc is reclaimed if it
 			 * not a holding desc.
@@ -413,36 +413,43 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
 				!txfail, sendbar);
 		} else {
 			/* retry the un-acked ones */
-			if (bf->bf_next == NULL && bf_last->bf_stale) {
-				struct ath_buf *tbf;
-
-				tbf = ath_clone_txbuf(sc, bf_last);
-				/*
-				 * Update tx baw and complete the frame with
-				 * failed status if we run out of tx buf
-				 */
-				if (!tbf) {
-					spin_lock_bh(&txq->axq_lock);
-					ath_tx_update_baw(sc, tid,
-							  bf->bf_seqno);
-					spin_unlock_bh(&txq->axq_lock);
-
-					bf->bf_state.bf_type |= BUF_XRETRY;
-					ath_tx_rc_status(bf, ts, nbad,
-							 0, false);
-					ath_tx_complete_buf(sc, bf, txq,
-							    &bf_head, ts, 0, 0);
-					break;
+			if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) {
+				if (bf->bf_next == NULL && bf_last->bf_stale) {
+					struct ath_buf *tbf;
+
+					tbf = ath_clone_txbuf(sc, bf_last);
+					/*
+					 * Update tx baw and complete the
+					 * frame with failed status if we
+					 * run out of tx buf.
+					 */
+					if (!tbf) {
+						spin_lock_bh(&txq->axq_lock);
+						ath_tx_update_baw(sc, tid,
+								bf->bf_seqno);
+						spin_unlock_bh(&txq->axq_lock);
+
+						bf->bf_state.bf_type |=
+							BUF_XRETRY;
+						ath_tx_rc_status(bf, ts, nbad,
+								0, false);
+						ath_tx_complete_buf(sc, bf, txq,
+								    &bf_head,
+								    ts, 0, 0);
+						break;
+					}
+
+					ath9k_hw_cleartxdesc(sc->sc_ah,
+							     tbf->bf_desc);
+					list_add_tail(&tbf->list, &bf_head);
+				} else {
+					/*
+					 * Clear descriptor status words for
+					 * software retry
+					 */
+					ath9k_hw_cleartxdesc(sc->sc_ah,
+							     bf->bf_desc);
 				}
-
-				ath9k_hw_cleartxdesc(sc->sc_ah, tbf->bf_desc);
-				list_add_tail(&tbf->list, &bf_head);
-			} else {
-				/*
-				 * Clear descriptor status words for
-				 * software retry
-				 */
-				ath9k_hw_cleartxdesc(sc->sc_ah, bf->bf_desc);
 			}
 
 			/*
@@ -855,7 +862,7 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
 	struct ath_hw *ah = sc->sc_ah;
 	struct ath_common *common = ath9k_hw_common(ah);
 	struct ath9k_tx_queue_info qi;
-	int qnum;
+	int qnum, i;
 
 	memset(&qi, 0, sizeof(qi));
 	qi.tqi_subtype = subtype;
@@ -910,6 +917,11 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
 		txq->axq_depth = 0;
 		txq->axq_tx_inprogress = false;
 		sc->tx.txqsetup |= 1<<qnum;
+
+		txq->txq_headidx = txq->txq_tailidx = 0;
+		for (i = 0; i < ATH_TXFIFO_DEPTH; i++)
+			INIT_LIST_HEAD(&txq->txq_fifo[i]);
+		INIT_LIST_HEAD(&txq->txq_fifo_pending);
 	}
 	return &sc->tx.txq[qnum];
 }
@@ -1042,30 +1054,49 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
 	for (;;) {
 		spin_lock_bh(&txq->axq_lock);
 
-		if (list_empty(&txq->axq_q)) {
-			txq->axq_link = NULL;
-			spin_unlock_bh(&txq->axq_lock);
-			break;
-		}
-
-		bf = list_first_entry(&txq->axq_q, struct ath_buf, list);
+		if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
+			if (list_empty(&txq->txq_fifo[txq->txq_tailidx])) {
+				txq->txq_headidx = txq->txq_tailidx = 0;
+				spin_unlock_bh(&txq->axq_lock);
+				break;
+			} else {
+				bf = list_first_entry(&txq->txq_fifo[txq->txq_tailidx],
+						      struct ath_buf, list);
+			}
+		} else {
+			if (list_empty(&txq->axq_q)) {
+				txq->axq_link = NULL;
+				spin_unlock_bh(&txq->axq_lock);
+				break;
+			}
+			bf = list_first_entry(&txq->axq_q, struct ath_buf,
+					      list);
 
-		if (bf->bf_stale) {
-			list_del(&bf->list);
-			spin_unlock_bh(&txq->axq_lock);
+			if (bf->bf_stale) {
+				list_del(&bf->list);
+				spin_unlock_bh(&txq->axq_lock);
 
-			spin_lock_bh(&sc->tx.txbuflock);
-			list_add_tail(&bf->list, &sc->tx.txbuf);
-			spin_unlock_bh(&sc->tx.txbuflock);
-			continue;
+				spin_lock_bh(&sc->tx.txbuflock);
+				list_add_tail(&bf->list, &sc->tx.txbuf);
+				spin_unlock_bh(&sc->tx.txbuflock);
+				continue;
+			}
 		}
 
 		lastbf = bf->bf_lastbf;
 		if (!retry_tx)
 			lastbf->bf_tx_aborted = true;
 
-		/* remove ath_buf's of the same mpdu from txq */
-		list_cut_position(&bf_head, &txq->axq_q, &lastbf->list);
+		if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
+			list_cut_position(&bf_head,
+					  &txq->txq_fifo[txq->txq_tailidx],
+					  &lastbf->list);
+			INCR(txq->txq_tailidx, ATH_TXFIFO_DEPTH);
+		} else {
+			/* remove ath_buf's of the same mpdu from txq */
+			list_cut_position(&bf_head, &txq->axq_q, &lastbf->list);
+		}
+
 		txq->axq_depth--;
 
 		spin_unlock_bh(&txq->axq_lock);
@@ -1088,6 +1119,27 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
 			spin_unlock_bh(&txq->axq_lock);
 		}
 	}
+
+	if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
+		spin_lock_bh(&txq->axq_lock);
+		while (!list_empty(&txq->txq_fifo_pending)) {
+			bf = list_first_entry(&txq->txq_fifo_pending,
+					      struct ath_buf, list);
+			list_cut_position(&bf_head,
+					  &txq->txq_fifo_pending,
+					  &bf->bf_lastbf->list);
+			spin_unlock_bh(&txq->axq_lock);
+
+			if (bf_isampdu(bf))
+				ath_tx_complete_aggr(sc, txq, bf, &bf_head,
+						     &ts, 0);
+			else
+				ath_tx_complete_buf(sc, bf, txq, &bf_head,
+						    &ts, 0, 0);
+			spin_lock_bh(&txq->axq_lock);
+		}
+		spin_unlock_bh(&txq->axq_lock);
+	}
 }
 
 void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
@@ -1225,25 +1277,47 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
 
 	bf = list_first_entry(head, struct ath_buf, list);
 
-	list_splice_tail_init(head, &txq->axq_q);
-	txq->axq_depth++;
-
 	ath_print(common, ATH_DBG_QUEUE,
 		  "qnum: %d, txq depth: %d\n", txq->axq_qnum, txq->axq_depth);
 
-	if (txq->axq_link == NULL) {
+	if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
+		if (txq->axq_depth >= ATH_TXFIFO_DEPTH) {
+			list_splice_tail_init(head, &txq->txq_fifo_pending);
+			return;
+		}
+		if (!list_empty(&txq->txq_fifo[txq->txq_headidx]))
+			ath_print(common, ATH_DBG_XMIT,
+				  "Initializing tx fifo %d which "
+				  "is non-empty\n",
+				  txq->txq_headidx);
+		INIT_LIST_HEAD(&txq->txq_fifo[txq->txq_headidx]);
+		list_splice_init(head, &txq->txq_fifo[txq->txq_headidx]);
+		INCR(txq->txq_headidx, ATH_TXFIFO_DEPTH);
 		ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
 		ath_print(common, ATH_DBG_XMIT,
 			  "TXDP[%u] = %llx (%p)\n",
 			  txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc);
 	} else {
-		*txq->axq_link = bf->bf_daddr;
-		ath_print(common, ATH_DBG_XMIT, "link[%u] (%p)=%llx (%p)\n",
-			  txq->axq_qnum, txq->axq_link,
-			  ito64(bf->bf_daddr), bf->bf_desc);
+		list_splice_tail_init(head, &txq->axq_q);
+
+		if (txq->axq_link == NULL) {
+			ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
+			ath_print(common, ATH_DBG_XMIT,
+					"TXDP[%u] = %llx (%p)\n",
+					txq->axq_qnum, ito64(bf->bf_daddr),
+					bf->bf_desc);
+		} else {
+			*txq->axq_link = bf->bf_daddr;
+			ath_print(common, ATH_DBG_XMIT,
+					"link[%u] (%p)=%llx (%p)\n",
+					txq->axq_qnum, txq->axq_link,
+					ito64(bf->bf_daddr), bf->bf_desc);
+		}
+		ath9k_hw_get_desc_link(ah, bf->bf_lastbf->bf_desc,
+				       &txq->axq_link);
+		ath9k_hw_txstart(ah, txq->axq_qnum);
 	}
-	ath9k_hw_get_desc_link(ah, bf->bf_lastbf->bf_desc, &txq->axq_link);
-	ath9k_hw_txstart(ah, txq->axq_qnum);
+	txq->axq_depth++;
 }
 
 static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc)
@@ -2140,6 +2214,80 @@ void ath_tx_tasklet(struct ath_softc *sc)
 	}
 }
 
+void ath_tx_edma_tasklet(struct ath_softc *sc)
+{
+	struct ath_tx_status txs;
+	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+	struct ath_hw *ah = sc->sc_ah;
+	struct ath_txq *txq;
+	struct ath_buf *bf, *lastbf;
+	struct list_head bf_head;
+	int status;
+	int txok;
+
+	for (;;) {
+		status = ath9k_hw_txprocdesc(ah, NULL, (void *)&txs);
+		if (status == -EINPROGRESS)
+			break;
+		if (status == -EIO) {
+			ath_print(common, ATH_DBG_XMIT,
+				  "Error processing tx status\n");
+			break;
+		}
+
+		/* Skip beacon completions */
+		if (txs.qid == sc->beacon.beaconq)
+			continue;
+
+		txq = &sc->tx.txq[txs.qid];
+
+		spin_lock_bh(&txq->axq_lock);
+		if (list_empty(&txq->txq_fifo[txq->txq_tailidx])) {
+			spin_unlock_bh(&txq->axq_lock);
+			return;
+		}
+
+		bf = list_first_entry(&txq->txq_fifo[txq->txq_tailidx],
+				      struct ath_buf, list);
+		lastbf = bf->bf_lastbf;
+
+		INIT_LIST_HEAD(&bf_head);
+		list_cut_position(&bf_head, &txq->txq_fifo[txq->txq_tailidx],
+				  &lastbf->list);
+		INCR(txq->txq_tailidx, ATH_TXFIFO_DEPTH);
+		txq->axq_depth--;
+		txq->axq_tx_inprogress = false;
+		spin_unlock_bh(&txq->axq_lock);
+
+		txok = !(txs.ts_status & ATH9K_TXERR_MASK);
+
+		if (!bf_isampdu(bf)) {
+			bf->bf_retries = txs.ts_longretry;
+			if (txs.ts_status & ATH9K_TXERR_XRETRY)
+				bf->bf_state.bf_type |= BUF_XRETRY;
+			ath_tx_rc_status(bf, &txs, 0, txok, true);
+		}
+
+		if (bf_isampdu(bf))
+			ath_tx_complete_aggr(sc, txq, bf, &bf_head, &txs, txok);
+		else
+			ath_tx_complete_buf(sc, bf, txq, &bf_head,
+					    &txs, txok, 0);
+
+		spin_lock_bh(&txq->axq_lock);
+		if (!list_empty(&txq->txq_fifo_pending)) {
+			INIT_LIST_HEAD(&bf_head);
+			bf = list_first_entry(&txq->txq_fifo_pending,
+				struct ath_buf, list);
+			list_cut_position(&bf_head, &txq->txq_fifo_pending,
+				&bf->bf_lastbf->list);
+			ath_tx_txqaddbuf(sc, txq, &bf_head);
+		} else if (sc->sc_flags & SC_OP_TXAGGR)
+			ath_txq_schedule(sc, txq);
+		spin_unlock_bh(&txq->axq_lock);
+	}
+}
+
 /*****************/
 /* Init, Cleanup */
 /*****************/
-- 
1.6.3.3


  parent reply	other threads:[~2010-04-15 21:39 UTC|newest]

Thread overview: 103+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-04-15 21:38 [PATCH v3 00/97] ath9k: add AR9003 support Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 01/97] ath9k_hw: start building an abstraction layer for hardware routines Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 02/97] ath9k_hw: add silicon revision macros for AR9300 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 03/97] ath9k_hw: add a macro for abstracting generic timer access Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 04/97] ath9k_hw: fix a missing hex prefix for a register mask Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 05/97] ath9k_hw: add simple register abstraction for some AR9300 registers Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 06/97] ath9k_hw: add support for GPIO differences on AR9003 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 07/97] ath9k_hw: AR9003 does not have AR_RC_AHB skip its setting Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 08/97] ath9k_hw: remove wrapper ath9k_hw_write_regs() Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 09/97] ath9k_hw: Move some RF ops to the private callbacks Luis R. Rodriguez
2010-04-16 19:43   ` John W. Linville
2010-04-16 19:56     ` Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 10/97] ath9k_hw: skip PLL initialization on AR9003 on Power-On-Reset Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 11/97] ath9k_hw: add some comments for ath9k_set_power_network_sleep() Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 12/97] ath9k_hw: add a private callback for PLL control computation Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 13/97] ath9k_hw: Add the PCI IDs for AR9300 and fill up the pci_id_tables Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 14/97] ath9k_hw: Add AR9003 PHY support Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 15/97] ath9k_hw: move init config and default after chip is up Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 16/97] ath9k_hw: add the AR9003 ar9003_hw_macversion_supported() Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 17/97] ath9k_hw: disable ANI for AR9003 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 18/97] ath9k: disable the MIB interrupt if ANI is disabled Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 19/97] ath9k_hw: Add hw cap flag for EDMA for the AR9003 family Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 20/97] ath9k_hw: Fill few hw cap for edma Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 21/97] ath9k_hw: Add abstraction for rx enable Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 22/97] ath9k_hw: Fill rx_enable() for the AR9003 hardware family Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 23/97] ath9k_hw: Add few routines for rx edma support Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 24/97] ath9k_hw: update the chip tests for AR9003 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 25/97] ath9k_hw: prevent reset control register zeroing on AR9003 reset Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 26/97] ath9k_hw: Add AR9003 PHY register definitions Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 27/97] ath9k_hw: add common channel select helpers for ar900[23] Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 28/97] ath9k_hw: Set the channel on AR9003 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 29/97] ath9k_hw: Implement PLL control " Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 30/97] ath9k_hw: Implement spur mitigation " Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 31/97] ath9k_hw: split initvals.h by hardware family Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 32/97] ath9k_hw: add initvals for the AR9003 " Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 33/97] ath9k_hw: add helpers for processing the AR9003 INI Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 34/97] ath9k_hw: Split off ANI control to the PHY ops Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 35/97] ath9k_hw: add all the AR9003 PHY callbacks Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 36/97] ath9k_hw: Define tx control struct for AR9003 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 37/97] ath9k_hw: Move code which populates ds_data to ath9k_hw Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 38/97] ath9k_hw: Add abstraction to set/get link pointer Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 39/97] ath9k: Use abstraction to get " Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 40/97] ath9k: Use memcpy in ath_clone_txbuf() Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 41/97] ath9k: Remove ATH9K_TX_SW_ABORTED and introduce a bool for this purpose Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 42/97] ath9k: Make bf_desc of ath_buf opaque Luis R. Rodriguez
2010-04-16 22:00   ` Pavel Roskin
2010-04-16 22:09     ` Felix Fietkau
2010-04-19 15:53       ` Pavel Roskin
2010-04-15 21:38 ` [PATCH v3 43/97] ath9k: Add Rx EDMA support Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 44/97] ath9k_hw: Split out the function for reading the noise floor Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 45/97] ath9k_hw: the eep_map is used only for AR9280 PCI card ini fixup Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 46/97] ath9k_hw: add a helper for Power Amplifier calibration for AR9002 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 47/97] ath9k_hw: add a helper for the OLC tem compensation " Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 48/97] ath9k_hw: rename PA calib for AR9287 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 49/97] ath9k_hw: shift code for AR9280 OLC temp comp Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 50/97] ath9k_hw: move the AR9280 OLC temp comp to its own helper Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 51/97] ath9k_hw: simplify OLC temp compensation for AR9002 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 52/97] ath9k_hw: rename the PA calib routines to match their families Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 53/97] ath9k_hw: rename getNoiseFloorThresh() to ath9k_hw_loadnf() Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 54/97] ath9k_hw: move the cal AR9100 calibration settings Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 55/97] ath9k_hw: split calib code by hardware families Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 56/97] ath9k_hw: add the AR9003 ar9003_hw_init_cal callback Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 57/97] ath9k_hw: add the config_pci_powersave AR9003 callback Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 58/97] ath9k_hw: split the generic hardware code by hardware family Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 59/97] ath9k_hw: move the cck channel 14 INI to the AR9002 hw code Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 60/97] ath9k_hw: move TX/RX gain INI stuff to its own hardware family code Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 61/97] ath9k_hw: Abstract the routine which returns interrupt status Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 62/97] ath9k_hw: Initialize interrupt mask for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 63/97] ath9k_hw: abstract the AR_PHY_AGC_CONTROL register access Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 64/97] ath9k_hw: abstract loading noisefloor Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 65/97] ath9k_hw: fill in the callbacks for calibration for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 66/97] ath9k_hw: complete AR9003 calibration Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 67/97] ath9k_hw: rename eep_AR9287_ops to eep_ar9287_ops Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 68/97] ath9k_hw: restore mac address reading logic Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 69/97] ath9k_hw: Implement AR9003 eeprom callbacks Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 70/97] ath9k_hw: add OFDM spur mitigation for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 71/97] ath9k_hw: Fill get_isr() " Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 72/97] ath9k_hw: move AR9280 PCI EEPROM fix to eeprom_def.c Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 73/97] ath9k_hw: move the RF claim stuff to AR9002 hardware family Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 74/97] ath9k_hw: Configure Tx interrupt mitigation timer Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 75/97] ath9k_hw: add the AR9300 SREV hw name print Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 76/97] ath9k_hw: add TX/RX gain register initialization for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 77/97] ath9k_hw: Update ath9k_hw_set_dma for AR9300 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 78/97] ath9k_hw: skip asynch fifo enablement to AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 79/97] ath9k_hw: skip WEP aggregation enable code for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 80/97] ath9k: Load SW filtered NF values and start NF cal during full reset " Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 81/97] ath9k_hw: Define abstraction for tx desc access Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 82/97] ath9k_hw: Add function to configure tx status ring buffer Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 83/97] ath9k_hw: move AR9002 mac ops to its own file Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 84/97] ath9k_hw: Fill descriptor abstrations for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 85/97] ath9k: add RXLP and RXHP to debugfs counters Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 86/97] ath9k_hw: enable CRC check of descriptors for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 87/97] ath9k_hw: set cwmin and cwmax to 0 for for AR9003 upon txq reset Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 88/97] ath9k: Setup appropriate tx desc for regular dma and edma Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 89/97] ath9k: Initialize and configure tx status for EDMA Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 90/97] ath9k_hw: Compute pointer checksum over the link descriptor Luis R. Rodriguez
2010-04-15 21:39 ` Luis R. Rodriguez [this message]
2010-04-15 21:39 ` [PATCH v3 92/97] mac80211: add LDPC control flag Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 93/97] ath9k_hw: add LDPC support for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 94/97] ath9k: add LDPC support Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 95/97] ath9k: Enable TXOK and TXERR interrupts for TX EDMA Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 96/97] ath9k_hw: Abort rx if hw is not coming out of full sleep in reset Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 97/97] ath9k_hw: add the PCI ID for the first AR9300 device Luis R. Rodriguez

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