From: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
To: mpe@ellerman.id.au
Cc: mikey@neuling.org, maddy@linux.ibm.com, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH 2/4] powerpc/perf: Using SIER[CMPL] instead of SIER[SIAR_VALID]
Date: Thu, 8 Oct 2020 06:52:07 -0400 [thread overview]
Message-ID: <1602154329-2092-3-git-send-email-atrajeev@linux.vnet.ibm.com> (raw)
In-Reply-To: <1602154329-2092-1-git-send-email-atrajeev@linux.vnet.ibm.com>
On power10 DD1, there is an issue that causes the SIAR_VALID
bit of Sampled Instruction Event Register(SIER) not to be
set. But the SIAR_VALID bit is used for fetching the instruction
address from Sampled Instruction Address Register(SIAR), and
marked events are sampled only if the SIAR_VALID bit is set.
So add a condition check for power10 DD1 to use SIER[CMPL] bit
instead.
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 08643cb..d766090 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -350,7 +350,14 @@ static inline int siar_valid(struct pt_regs *regs)
int marked = mmcra & MMCRA_SAMPLE_ENABLE;
if (marked) {
- if (ppmu->flags & PPMU_HAS_SIER)
+ /*
+ * SIER[SIAR_VALID] is not set for some
+ * marked events on power10 DD1, so use
+ * SIER[CMPL] instead.
+ */
+ if (ppmu->flags & PPMU_P10_DD1)
+ return regs->dar & 0x1;
+ else if (ppmu->flags & PPMU_HAS_SIER)
return regs->dar & SIER_SIAR_VALID;
if (ppmu->flags & PPMU_SIAR_VALID)
--
1.8.3.1
next prev parent reply other threads:[~2020-10-08 10:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-08 10:52 [PATCH 0/4] powerpc/perf: Power PMU fixes for power10 DD1 Athira Rajeev
2020-10-08 10:52 ` [PATCH 1/4] powerpc/perf: Add new power pmu flag "PPMU_P10_DD1" " Athira Rajeev
2020-10-08 10:52 ` Athira Rajeev [this message]
2020-10-08 10:52 ` [PATCH 3/4] powerpc/perf: Use the address from SIAR register to set cpumode flags Athira Rajeev
2020-10-08 10:52 ` [PATCH 4/4] powerpc/perf: Exclude kernel samples while counting events in user space Athira Rajeev
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