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From: Peter Rosin <peda@axentia.se>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Marek Vasut <marek.vasut@gmail.com>,
	Josh Wu <rainyfeeling@outlook.com>,
	Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
	linux-kernel@vger.kernel.org,
	Boris Brezillon <boris.brezillon@bootlin.com>,
	linux-mtd@lists.infradead.org,
	Richard Weinberger <richard@nod.at>,
	Brian Norris <computersforpeace@gmail.com>,
	David Woodhouse <dwmw2@infradead.org>,
	linux-arm-kernel@lists.infradead.org,
	Eugen Hristev <eugen.hristev@microchip.com>
Subject: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma
Date: Sun, 27 May 2018 11:18:49 +0200	[thread overview]
Message-ID: <024079cb-77ad-9c48-e370-e6e8f2de171b@axentia.se> (raw)
In-Reply-To: <a25ca617-d3da-d401-1ba9-8e5887f8a8e5@microchip.com>

On 2018-05-25 16:51, Tudor Ambarus wrote:
> We think the best way is to keep LCD on DDR Ports 2 and 3 (8th and 9th
> slaves), to have maximum bandwidth and to use DMA on DDR port 1 for NAND
> (7th slave).

Exactly how do I accomplish that?

I can see how I can move the LCD between slave DDR port 2 and 3 by
selecting LCDC DMA master 8 or 9 (but according to the above it should
not matter). The big question is how I control what slave the NAND flash
is going to use? I find nothing in the datasheet, and the code is also
non-transparent enough for me to figure it out by myself without
throwing out this question first...

Cheers,
Peter

  parent reply	other threads:[~2018-05-27  9:19 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-29 13:10 [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Peter Rosin
2018-03-29 13:33 ` Boris Brezillon
2018-03-29 13:37   ` Peter Rosin
2018-03-29 13:44     ` Boris Brezillon
2018-03-29 14:27       ` Peter Rosin
2018-03-30 21:43         ` Peter Rosin
2018-04-02 12:22         ` Boris Brezillon
2018-04-02 17:59           ` Peter Rosin
2018-04-02 19:28             ` Boris Brezillon
2018-04-02 20:20               ` Boris Brezillon
2018-04-02 20:32                 ` Boris Brezillon
2018-04-03  6:11                 ` Peter Rosin
2018-04-03  7:18                   ` Boris Brezillon
2018-04-11 14:44                     ` Peter Rosin
2018-04-11 14:59                       ` Boris Brezillon
2018-04-11 15:10                         ` Peter Rosin
2018-04-11 15:34                           ` Boris Brezillon
2018-04-11 15:34                       ` Nicolas Ferre
2018-04-12  7:18                         ` Peter Rosin
2018-05-22 18:03                         ` Peter Rosin
2018-05-23 10:42                           ` Boris Brezillon
2018-05-25 14:51                         ` Tudor Ambarus
2018-05-26 17:40                           ` Peter Rosin
2018-05-27  9:18                           ` Peter Rosin [this message]
2018-05-27 22:11                             ` Peter Rosin
2018-05-28 10:10                               ` Peter Rosin
2018-05-28 14:27                                 ` Boris Brezillon
2018-05-28 15:52                                   ` Peter Rosin
2018-05-28 16:09                                     ` Boris Brezillon
2018-05-28 16:09                                     ` Nicolas Ferre
2018-05-29  6:30                                 ` Eugen Hristev
2018-05-29  7:10                                   ` Peter Rosin
2018-05-29  7:25                                     ` Eugen Hristev
2018-05-29 14:49                                   ` Boris Brezillon
2018-05-29 15:01                                     ` Eugen Hristev
2018-05-29 15:15                                       ` Boris Brezillon
2018-05-29 15:21                                         ` Eugen Hristev
2018-05-29 15:46                                           ` Boris Brezillon
2018-05-29 17:57                                             ` Boris Brezillon
2018-05-29 21:37                                               ` Peter Rosin
2018-06-04 15:46                                 ` Tudor Ambarus
2018-06-04 16:03                                   ` Boris Brezillon
2018-04-03  6:51                 ` Peter Rosin
2018-04-03  7:15                   ` Boris Brezillon
2018-04-03  7:32                     ` Boris Brezillon
2018-04-03  8:14                     ` Peter Rosin
2018-04-03  8:30                       ` Boris Brezillon
2018-04-02 20:23               ` Peter Rosin
2018-04-02 20:35                 ` Boris Brezillon
2018-04-03  7:18                 ` Alexandre Belloni
2018-04-03  8:37                   ` Peter Rosin
2018-03-29 14:20 ` Nicolas Ferre
2018-03-29 14:23   ` Peter Rosin
2018-03-29 14:29   ` Boris Brezillon
2018-06-18  8:39 ` Boris Brezillon
2018-06-18 14:00   ` Miquel Raynal
2018-06-25 12:31   ` Miquel Raynal

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