From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Peter Rosin <peda@axentia.se>,
Tudor Ambarus <tudor.ambarus@microchip.com>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Ludovic Desroches <ludovic.desroches@microchip.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Marek Vasut <marek.vasut@gmail.com>,
Josh Wu <rainyfeeling@outlook.com>,
Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
<linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org>,
Richard Weinberger <richard@nod.at>,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma
Date: Tue, 29 May 2018 17:46:21 +0200 [thread overview]
Message-ID: <20180529174621.50a9001a@bbrezillon> (raw)
In-Reply-To: <1affd186-7f78-8bb0-050e-da82143c2982@microchip.com>
On Tue, 29 May 2018 18:21:40 +0300
Eugen Hristev <eugen.hristev@microchip.com> wrote:
> On 29.05.2018 18:15, Boris Brezillon wrote:
> > On Tue, 29 May 2018 18:01:40 +0300
> > Eugen Hristev <eugen.hristev@microchip.com> wrote:
> >
> >> [...]
> >>
> >>
> >>>
> >>> I think you're missing something here. We use the DMA engine in memcpy
> >>> mode (SRAM -> DRAM), not in device mode (dev -> DRAM or DRAM -> dev).
> >>> So there's no dmas prop defined in the DT and there should not be.
> >>>
> >>> Regards,
> >>>
> >>> Boris
> >>>
> >>
> >> Ok, so the memcpy SRAM <-> DRAM will hog the transfer between DRAM and
> >> LCD if my understanding is correct. That's the DMA that Peter wants to
> >> disable with his patch ?
> >>
> >> Then we can then try to force NFC SRAM DMA channels to use just DDR port
> >> 1 or 2 for memcpy ?
> >
> > You mean the dmaengine? According to "14.1.3 Master to Slave Access"
> > that's already the case.
> >
> > Only DMAC0 can access the NFC SRAM and it's done through DMAC0:IF0,
> > then access to DDR is going through port DDR port 1 (DMAC0:IF1) or 2
> > (DMAC0:IF0).
>
> If we can make NFC use port 1 only, then HLCDC could have two ports as
> master 8 & 9, maybe a better bandwidth.
Peter, can you try with the following patch?
--->8---
diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h
index ef3f227ce3e6..2a48e870f292 100644
--- a/drivers/dma/at_hdmac_regs.h
+++ b/drivers/dma/at_hdmac_regs.h
@@ -124,8 +124,8 @@
#define ATC_SIF(i) (0x3 & (i)) /* Src tx done via AHB-Lite Interface i */
#define ATC_DIF(i) ((0x3 & (i)) << 4) /* Dst tx done via AHB-Lite Interface i */
/* Specify AHB interfaces */
-#define AT_DMA_MEM_IF 0 /* interface 0 as memory interface */
-#define AT_DMA_PER_IF 1 /* interface 1 as peripheral interface */
+#define AT_DMA_MEM_IF 1 /* interface 0 as memory interface */
+#define AT_DMA_PER_IF 0 /* interface 1 as peripheral interface */
#define ATC_SRC_PIP (0x1 << 8) /* Source Picture-in-Picture enabled */
#define ATC_DST_PIP (0x1 << 12) /* Destination Picture-in-Picture enabled */
next prev parent reply other threads:[~2018-05-29 15:46 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-29 13:10 [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Peter Rosin
2018-03-29 13:33 ` Boris Brezillon
2018-03-29 13:37 ` Peter Rosin
2018-03-29 13:44 ` Boris Brezillon
2018-03-29 14:27 ` Peter Rosin
2018-03-30 21:43 ` Peter Rosin
2018-04-02 12:22 ` Boris Brezillon
2018-04-02 17:59 ` Peter Rosin
2018-04-02 19:28 ` Boris Brezillon
2018-04-02 20:20 ` Boris Brezillon
2018-04-02 20:32 ` Boris Brezillon
2018-04-03 6:11 ` Peter Rosin
2018-04-03 7:18 ` Boris Brezillon
2018-04-11 14:44 ` Peter Rosin
2018-04-11 14:59 ` Boris Brezillon
2018-04-11 15:10 ` Peter Rosin
2018-04-11 15:34 ` Boris Brezillon
2018-04-11 15:34 ` Nicolas Ferre
2018-04-12 7:18 ` Peter Rosin
2018-05-22 18:03 ` Peter Rosin
2018-05-23 10:42 ` Boris Brezillon
2018-05-25 14:51 ` Tudor Ambarus
2018-05-26 17:40 ` Peter Rosin
2018-05-27 9:18 ` Peter Rosin
2018-05-27 22:11 ` Peter Rosin
2018-05-28 10:10 ` Peter Rosin
2018-05-28 14:27 ` Boris Brezillon
2018-05-28 15:52 ` Peter Rosin
2018-05-28 16:09 ` Boris Brezillon
2018-05-28 16:09 ` Nicolas Ferre
2018-05-29 6:30 ` Eugen Hristev
2018-05-29 7:10 ` Peter Rosin
2018-05-29 7:25 ` Eugen Hristev
2018-05-29 14:49 ` Boris Brezillon
2018-05-29 15:01 ` Eugen Hristev
2018-05-29 15:15 ` Boris Brezillon
2018-05-29 15:21 ` Eugen Hristev
2018-05-29 15:46 ` Boris Brezillon [this message]
2018-05-29 17:57 ` Boris Brezillon
2018-05-29 21:37 ` Peter Rosin
2018-06-04 15:46 ` Tudor Ambarus
2018-06-04 16:03 ` Boris Brezillon
2018-04-03 6:51 ` Peter Rosin
2018-04-03 7:15 ` Boris Brezillon
2018-04-03 7:32 ` Boris Brezillon
2018-04-03 8:14 ` Peter Rosin
2018-04-03 8:30 ` Boris Brezillon
2018-04-02 20:23 ` Peter Rosin
2018-04-02 20:35 ` Boris Brezillon
2018-04-03 7:18 ` Alexandre Belloni
2018-04-03 8:37 ` Peter Rosin
2018-03-29 14:20 ` Nicolas Ferre
2018-03-29 14:23 ` Peter Rosin
2018-03-29 14:29 ` Boris Brezillon
2018-06-18 8:39 ` Boris Brezillon
2018-06-18 14:00 ` Miquel Raynal
2018-06-25 12:31 ` Miquel Raynal
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