From: Peter Rosin <peda@axentia.se>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
Marek Vasut <marek.vasut@gmail.com>,
Josh Wu <rainyfeeling@outlook.com>,
Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
linux-kernel@vger.kernel.org,
Boris Brezillon <boris.brezillon@bootlin.com>,
linux-mtd@lists.infradead.org,
Richard Weinberger <richard@nod.at>,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>,
linux-arm-kernel@lists.infradead.org,
Eugen Hristev <eugen.hristev@microchip.com>
Subject: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma
Date: Mon, 28 May 2018 00:11:07 +0200 [thread overview]
Message-ID: <9c496531-f7b6-4b9d-dd51-0bfb68ead303@axentia.se> (raw)
In-Reply-To: <024079cb-77ad-9c48-e370-e6e8f2de171b@axentia.se>
On 2018-05-27 11:18, Peter Rosin wrote:
> On 2018-05-25 16:51, Tudor Ambarus wrote:
>> We think the best way is to keep LCD on DDR Ports 2 and 3 (8th and 9th
>> slaves), to have maximum bandwidth and to use DMA on DDR port 1 for NAND
>> (7th slave).
>
> Exactly how do I accomplish that?
>
> I can see how I can move the LCD between slave DDR port 2 and 3 by
> selecting LCDC DMA master 8 or 9 (but according to the above it should
> not matter). The big question is how I control what slave the NAND flash
> is going to use? I find nothing in the datasheet, and the code is also
> non-transparent enough for me to figure it out by myself without
> throwing out this question first...
I added this:
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index e686fe73159e..3b33c63d2ed4 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1991,6 +1991,9 @@ static int atmel_nand_controller_init(struct atmel_nand_controller *nc,
nc->dmac = dma_request_channel(mask, NULL, NULL);
if (!nc->dmac)
dev_err(nc->dev, "Failed to request DMA channel\n");
+
+ dev_info(nc->dev, "using %s for DMA transfers\n",
+ dma_chan_name(nc->dmac));
}
/* We do not retrieve the SMC syscon when parsing old DTs. */
and the output is
atmel-nand-controller 10000000.ebi:nand-controller: using dma0chan5 for DMA transfers
So, DMA controller 0 is in use. I still don't know if IF0, IF1 or IF2 is used
or how to find out. I guess IF2 is not in use since that does not allow any
DDR2 port as slave...
>From the datasheet, DMAC0/IF0 uses DDR2 Port 2, and DMAC0/IF1 uses DDR2 Port 1.
But, by the looks of the register content in my other mail, it seems as if
DMA0/IF1 can also use DDR2 Port 3.
So, I think I want either
A) the NAND controller to use DMAC0/IF0 (i.e. DDR2 port 1, and possibly 3) and
the LCDC to use master 9 (i.e. DDR2 Port 2)
or
B) the NAND controller to use DMAC1/IF1 (i.e. DDR2 port 2) and the LCDC to use
master 8 (i.e. DDR2 Port 3)
But, again, how do I limit DMAC0 to either of IF0 or IF1 for NAND accesses?
Note that I have previously tried to move LCDC DMA from master 8 (the default)
to master 9, and it got better, but not good enough. I.e. the visual glitches
remained, but were a little bit harder to trigger. That makes me suspect DMAC0
uses both IF0 and IF1 for its DMAs, but that it prefers IF0.
Cheers,
Peter
next prev parent reply other threads:[~2018-05-27 22:11 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-29 13:10 [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Peter Rosin
2018-03-29 13:33 ` Boris Brezillon
2018-03-29 13:37 ` Peter Rosin
2018-03-29 13:44 ` Boris Brezillon
2018-03-29 14:27 ` Peter Rosin
2018-03-30 21:43 ` Peter Rosin
2018-04-02 12:22 ` Boris Brezillon
2018-04-02 17:59 ` Peter Rosin
2018-04-02 19:28 ` Boris Brezillon
2018-04-02 20:20 ` Boris Brezillon
2018-04-02 20:32 ` Boris Brezillon
2018-04-03 6:11 ` Peter Rosin
2018-04-03 7:18 ` Boris Brezillon
2018-04-11 14:44 ` Peter Rosin
2018-04-11 14:59 ` Boris Brezillon
2018-04-11 15:10 ` Peter Rosin
2018-04-11 15:34 ` Boris Brezillon
2018-04-11 15:34 ` Nicolas Ferre
2018-04-12 7:18 ` Peter Rosin
2018-05-22 18:03 ` Peter Rosin
2018-05-23 10:42 ` Boris Brezillon
2018-05-25 14:51 ` Tudor Ambarus
2018-05-26 17:40 ` Peter Rosin
2018-05-27 9:18 ` Peter Rosin
2018-05-27 22:11 ` Peter Rosin [this message]
2018-05-28 10:10 ` Peter Rosin
2018-05-28 14:27 ` Boris Brezillon
2018-05-28 15:52 ` Peter Rosin
2018-05-28 16:09 ` Boris Brezillon
2018-05-28 16:09 ` Nicolas Ferre
2018-05-29 6:30 ` Eugen Hristev
2018-05-29 7:10 ` Peter Rosin
2018-05-29 7:25 ` Eugen Hristev
2018-05-29 14:49 ` Boris Brezillon
2018-05-29 15:01 ` Eugen Hristev
2018-05-29 15:15 ` Boris Brezillon
2018-05-29 15:21 ` Eugen Hristev
2018-05-29 15:46 ` Boris Brezillon
2018-05-29 17:57 ` Boris Brezillon
2018-05-29 21:37 ` Peter Rosin
2018-06-04 15:46 ` Tudor Ambarus
2018-06-04 16:03 ` Boris Brezillon
2018-04-03 6:51 ` Peter Rosin
2018-04-03 7:15 ` Boris Brezillon
2018-04-03 7:32 ` Boris Brezillon
2018-04-03 8:14 ` Peter Rosin
2018-04-03 8:30 ` Boris Brezillon
2018-04-02 20:23 ` Peter Rosin
2018-04-02 20:35 ` Boris Brezillon
2018-04-03 7:18 ` Alexandre Belloni
2018-04-03 8:37 ` Peter Rosin
2018-03-29 14:20 ` Nicolas Ferre
2018-03-29 14:23 ` Peter Rosin
2018-03-29 14:29 ` Boris Brezillon
2018-06-18 8:39 ` Boris Brezillon
2018-06-18 14:00 ` Miquel Raynal
2018-06-25 12:31 ` Miquel Raynal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9c496531-f7b6-4b9d-dd51-0bfb68ead303@axentia.se \
--to=peda@axentia.se \
--cc=alexandre.belloni@bootlin.com \
--cc=boris.brezillon@bootlin.com \
--cc=computersforpeace@gmail.com \
--cc=cyrille.pitchen@wedev4u.fr \
--cc=dwmw2@infradead.org \
--cc=eugen.hristev@microchip.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=ludovic.desroches@microchip.com \
--cc=marek.vasut@gmail.com \
--cc=nicolas.ferre@microchip.com \
--cc=rainyfeeling@outlook.com \
--cc=richard@nod.at \
--cc=tudor.ambarus@microchip.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).