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From: Will Deacon <will.deacon@arm.com>
To: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: arnd@arndb.de, monstr@monstr.eu, dhowells@redhat.com,
	broonie@linaro.org, benh@kernel.crashing.org,
	peterz@infradead.org, paulmck@linux.vnet.ibm.com,
	Will Deacon <will.deacon@arm.com>
Subject: [PATCH v2 01/18] asm-generic: io: implement relaxed accessor macros as conditional wrappers
Date: Thu, 22 May 2014 17:47:13 +0100	[thread overview]
Message-ID: <1400777250-17335-2-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1400777250-17335-1-git-send-email-will.deacon@arm.com>

{read,write}{b,w,l,q}_relaxed are implemented by some architectures in
order to permit memory-mapped I/O accesses with weaker barrier semantics
than the non-relaxed variants.

This patch adds wrappers to asm-generic so that drivers can rely on the
relaxed accessors being available, even if they don't always provide
weaker ordering guarantees. Since some architectures both include
asm-generic/io.h and define some relaxed accessors, the definitions here
are conditional for the time being.

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 include/asm-generic/io.h | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index 975e1cc75edb..9ccedeb06522 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -53,18 +53,27 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
 #endif
 
 #define readb __raw_readb
+#ifndef readb_relaxed
+#define readb_relaxed readb
+#endif
 
 #define readw readw
 static inline u16 readw(const volatile void __iomem *addr)
 {
 	return __le16_to_cpu(__raw_readw(addr));
 }
+#ifndef readw_relaxed
+#define readw_relaxed readw
+#endif
 
 #define readl readl
 static inline u32 readl(const volatile void __iomem *addr)
 {
 	return __le32_to_cpu(__raw_readl(addr));
 }
+#ifndef readl_relaxed
+#define readl_relaxed readl
+#endif
 
 #ifndef __raw_writeb
 static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
@@ -88,8 +97,19 @@ static inline void __raw_writel(u32 b, volatile void __iomem *addr)
 #endif
 
 #define writeb __raw_writeb
+#ifndef writeb_relaxed
+#define writeb_relaxed writeb
+#endif
+
 #define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
+#ifndef writew_relaxed
+#define writew_relaxed writew
+#endif
+
 #define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
+#ifndef writel_relaxed
+#define writel_relaxed writel
+#endif
 
 #ifdef CONFIG_64BIT
 #ifndef __raw_readq
@@ -104,6 +124,9 @@ static inline u64 readq(const volatile void __iomem *addr)
 {
 	return __le64_to_cpu(__raw_readq(addr));
 }
+#ifndef readq_relaxed
+#define readq_relaxed readq
+#endif
 
 #ifndef __raw_writeq
 static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
@@ -113,6 +136,9 @@ static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
 #endif
 
 #define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr)
+#ifndef writeq_relaxed
+#define writeq_relaxed writeq
+#endif
 #endif /* CONFIG_64BIT */
 
 #ifndef PCI_IOBASE
-- 
1.9.2


  reply	other threads:[~2014-05-22 16:56 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-22 16:47 [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors Will Deacon
2014-05-22 16:47 ` Will Deacon [this message]
2014-05-22 16:47 ` [PATCH v2 02/18] microblaze: io: remove dummy relaxed accessor macros Will Deacon
2014-05-22 16:47 ` [PATCH v2 03/18] s390: io: remove dummy relaxed accessor macros for reads Will Deacon
2014-05-22 16:47 ` [PATCH v2 04/18] xtensa: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 05/18] alpha: io: implement relaxed accessor macros for writes Will Deacon
2014-05-22 18:15   ` Richard Henderson
2014-05-22 16:47 ` [PATCH v2 06/18] frv: io: implement dummy " Will Deacon
2014-05-22 16:47 ` [PATCH v2 07/18] cris: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 08/18] ia64: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 09/18] m32r: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 10/18] m68k: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 11/18] mn10300: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 12/18] parisc: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 13/18] powerpc: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 14/18] sparc: " Will Deacon
2014-05-22 18:18   ` Sam Ravnborg
2014-05-23 14:38     ` Will Deacon
2014-05-30  0:10       ` David Miller
2014-05-22 16:47 ` [PATCH v2 15/18] tile: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 16/18] x86: " Will Deacon
2014-05-22 17:15   ` H. Peter Anvin
2014-05-23 14:46     ` Will Deacon
2014-05-23 14:53       ` H. Peter Anvin
2014-05-23 14:57         ` Will Deacon
2014-05-23 15:20           ` H. Peter Anvin
2014-05-23 15:34             ` Will Deacon
2014-05-23 15:43               ` H. Peter Anvin
2014-05-23 15:56                 ` Peter Zijlstra
2014-05-23 16:12                   ` H. Peter Anvin
2014-05-23 16:21                     ` Peter Zijlstra
2014-05-23 16:31                   ` Geert Uytterhoeven
2014-05-23 16:35                     ` H. Peter Anvin
2014-05-22 16:47 ` [PATCH v2 17/18] documentation: memory-barriers: clarify relaxed io accessor semantics Will Deacon
2014-05-22 16:47 ` [PATCH v2 18/18] asm-generic: io: define relaxed accessor macros unconditionally Will Deacon
2014-05-25 21:46 ` [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors Benjamin Herrenschmidt
2014-05-27 19:32   ` Will Deacon
2014-05-27 20:21     ` Benjamin Herrenschmidt
2014-05-27 20:32       ` Will Deacon
2014-05-25 21:47 ` Benjamin Herrenschmidt
2014-05-27 19:34   ` Will Deacon
2014-05-27 20:23     ` Benjamin Herrenschmidt
2014-05-27 20:34       ` Will Deacon

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