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From: Will Deacon <will.deacon@arm.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: "linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"monstr@monstr.eu" <monstr@monstr.eu>,
	"dhowells@redhat.com" <dhowells@redhat.com>,
	"broonie@linaro.org" <broonie@linaro.org>,
	"peterz@infradead.org" <peterz@infradead.org>,
	"paulmck@linux.vnet.ibm.com" <paulmck@linux.vnet.ibm.com>
Subject: Re: [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors
Date: Tue, 27 May 2014 20:32:19 +0100	[thread overview]
Message-ID: <20140527193219.GB30751@arm.com> (raw)
In-Reply-To: <1401054363.3958.28.camel@pasglop>

Hi Ben,

On Sun, May 25, 2014 at 10:46:03PM +0100, Benjamin Herrenschmidt wrote:
> On Thu, 2014-05-22 at 17:47 +0100, Will Deacon wrote:
> > A corollary to this is that mmiowb() probably needs rethinking. As it currently
> > stands, an mmiowb() is required to order MMIO writes to a device from multiple
> > CPUs, even if that device is protected by a lock. However, this isn't often used
> > in practice, leading to PowerPC implementing both mmiowb() *and* synchronising
> > I/O in spin_unlock.
> > 
> > I would propose making the non-relaxed I/O accessors ordered with respect to
> > LOCK/UNLOCK, leaving mmiowb() to be used with the relaxed accessors, if
> > required, but would welcome thoughts/suggestions on this topic.
> 
> I agree on the proposed semantics, though for us that does mean we still need
> that per-cpu flag tracking non-relaxed MMIO stores and corresponding added barrier
> in unlock. Eventually, if the use of the relaxed accessors becomes pervasive
> enough I suppose I can just make the ordered ones unconditionally do 2 barriers.

Why would you need two barriers? I would have though an mmiowb() inlined
into writel after the store operation would be sufficient. Or is this to
ensure a non-relaxed write is ordered with respect to a relaxed write?

Anyway, we may need something similar for other architectures with mmiowb
implementations:

  blackfin
  frv
  ia64
  mips
  sh

so I'm anticipating some more discussion when I try to push that patch :)

Cheers,

Will

  reply	other threads:[~2014-05-27 19:32 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-22 16:47 [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors Will Deacon
2014-05-22 16:47 ` [PATCH v2 01/18] asm-generic: io: implement relaxed accessor macros as conditional wrappers Will Deacon
2014-05-22 16:47 ` [PATCH v2 02/18] microblaze: io: remove dummy relaxed accessor macros Will Deacon
2014-05-22 16:47 ` [PATCH v2 03/18] s390: io: remove dummy relaxed accessor macros for reads Will Deacon
2014-05-22 16:47 ` [PATCH v2 04/18] xtensa: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 05/18] alpha: io: implement relaxed accessor macros for writes Will Deacon
2014-05-22 18:15   ` Richard Henderson
2014-05-22 16:47 ` [PATCH v2 06/18] frv: io: implement dummy " Will Deacon
2014-05-22 16:47 ` [PATCH v2 07/18] cris: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 08/18] ia64: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 09/18] m32r: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 10/18] m68k: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 11/18] mn10300: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 12/18] parisc: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 13/18] powerpc: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 14/18] sparc: " Will Deacon
2014-05-22 18:18   ` Sam Ravnborg
2014-05-23 14:38     ` Will Deacon
2014-05-30  0:10       ` David Miller
2014-05-22 16:47 ` [PATCH v2 15/18] tile: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 16/18] x86: " Will Deacon
2014-05-22 17:15   ` H. Peter Anvin
2014-05-23 14:46     ` Will Deacon
2014-05-23 14:53       ` H. Peter Anvin
2014-05-23 14:57         ` Will Deacon
2014-05-23 15:20           ` H. Peter Anvin
2014-05-23 15:34             ` Will Deacon
2014-05-23 15:43               ` H. Peter Anvin
2014-05-23 15:56                 ` Peter Zijlstra
2014-05-23 16:12                   ` H. Peter Anvin
2014-05-23 16:21                     ` Peter Zijlstra
2014-05-23 16:31                   ` Geert Uytterhoeven
2014-05-23 16:35                     ` H. Peter Anvin
2014-05-22 16:47 ` [PATCH v2 17/18] documentation: memory-barriers: clarify relaxed io accessor semantics Will Deacon
2014-05-22 16:47 ` [PATCH v2 18/18] asm-generic: io: define relaxed accessor macros unconditionally Will Deacon
2014-05-25 21:46 ` [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors Benjamin Herrenschmidt
2014-05-27 19:32   ` Will Deacon [this message]
2014-05-27 20:21     ` Benjamin Herrenschmidt
2014-05-27 20:32       ` Will Deacon
2014-05-25 21:47 ` Benjamin Herrenschmidt
2014-05-27 19:34   ` Will Deacon
2014-05-27 20:23     ` Benjamin Herrenschmidt
2014-05-27 20:34       ` Will Deacon

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