linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Will Deacon <will.deacon@arm.com>
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
	arnd@arndb.de, monstr@monstr.eu, dhowells@redhat.com,
	broonie@linaro.org, peterz@infradead.org,
	paulmck@linux.vnet.ibm.com
Subject: Re: [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors
Date: Mon, 26 May 2014 07:46:03 +1000	[thread overview]
Message-ID: <1401054363.3958.28.camel@pasglop> (raw)
In-Reply-To: <1400777250-17335-1-git-send-email-will.deacon@arm.com>

On Thu, 2014-05-22 at 17:47 +0100, Will Deacon wrote:
> A corollary to this is that mmiowb() probably needs rethinking. As it currently
> stands, an mmiowb() is required to order MMIO writes to a device from multiple
> CPUs, even if that device is protected by a lock. However, this isn't often used
> in practice, leading to PowerPC implementing both mmiowb() *and* synchronising
> I/O in spin_unlock.
> 
> I would propose making the non-relaxed I/O accessors ordered with respect to
> LOCK/UNLOCK, leaving mmiowb() to be used with the relaxed accessors, if
> required, but would welcome thoughts/suggestions on this topic.

I agree on the proposed semantics, though for us that does mean we still need
that per-cpu flag tracking non-relaxed MMIO stores and corresponding added barrier
in unlock. Eventually, if the use of the relaxed accessors becomes pervasive
enough I suppose I can just make the ordered ones unconditionally do 2 barriers.

Cheers,
Ben.



  parent reply	other threads:[~2014-05-25 21:47 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-22 16:47 [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors Will Deacon
2014-05-22 16:47 ` [PATCH v2 01/18] asm-generic: io: implement relaxed accessor macros as conditional wrappers Will Deacon
2014-05-22 16:47 ` [PATCH v2 02/18] microblaze: io: remove dummy relaxed accessor macros Will Deacon
2014-05-22 16:47 ` [PATCH v2 03/18] s390: io: remove dummy relaxed accessor macros for reads Will Deacon
2014-05-22 16:47 ` [PATCH v2 04/18] xtensa: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 05/18] alpha: io: implement relaxed accessor macros for writes Will Deacon
2014-05-22 18:15   ` Richard Henderson
2014-05-22 16:47 ` [PATCH v2 06/18] frv: io: implement dummy " Will Deacon
2014-05-22 16:47 ` [PATCH v2 07/18] cris: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 08/18] ia64: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 09/18] m32r: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 10/18] m68k: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 11/18] mn10300: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 12/18] parisc: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 13/18] powerpc: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 14/18] sparc: " Will Deacon
2014-05-22 18:18   ` Sam Ravnborg
2014-05-23 14:38     ` Will Deacon
2014-05-30  0:10       ` David Miller
2014-05-22 16:47 ` [PATCH v2 15/18] tile: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 16/18] x86: " Will Deacon
2014-05-22 17:15   ` H. Peter Anvin
2014-05-23 14:46     ` Will Deacon
2014-05-23 14:53       ` H. Peter Anvin
2014-05-23 14:57         ` Will Deacon
2014-05-23 15:20           ` H. Peter Anvin
2014-05-23 15:34             ` Will Deacon
2014-05-23 15:43               ` H. Peter Anvin
2014-05-23 15:56                 ` Peter Zijlstra
2014-05-23 16:12                   ` H. Peter Anvin
2014-05-23 16:21                     ` Peter Zijlstra
2014-05-23 16:31                   ` Geert Uytterhoeven
2014-05-23 16:35                     ` H. Peter Anvin
2014-05-22 16:47 ` [PATCH v2 17/18] documentation: memory-barriers: clarify relaxed io accessor semantics Will Deacon
2014-05-22 16:47 ` [PATCH v2 18/18] asm-generic: io: define relaxed accessor macros unconditionally Will Deacon
2014-05-25 21:46 ` Benjamin Herrenschmidt [this message]
2014-05-27 19:32   ` [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors Will Deacon
2014-05-27 20:21     ` Benjamin Herrenschmidt
2014-05-27 20:32       ` Will Deacon
2014-05-25 21:47 ` Benjamin Herrenschmidt
2014-05-27 19:34   ` Will Deacon
2014-05-27 20:23     ` Benjamin Herrenschmidt
2014-05-27 20:34       ` Will Deacon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1401054363.3958.28.camel@pasglop \
    --to=benh@kernel.crashing.org \
    --cc=arnd@arndb.de \
    --cc=broonie@linaro.org \
    --cc=dhowells@redhat.com \
    --cc=linux-arch@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=monstr@monstr.eu \
    --cc=paulmck@linux.vnet.ibm.com \
    --cc=peterz@infradead.org \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).