From: Yakir Yang <ykk@rock-chips.com>
To: Inki Dae <inki.dae@samsung.com>,
Andrzej Hajda <a.hajda@samsung.com>,
Joonyoung Shim <jy0922.shim@samsung.com>,
Seung-Woo Kim <sw0312.kim@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Jingoo Han <jingoohan1@gmail.com>,
Thierry Reding <treding@nvidia.com>,
Krzysztof Kozlowski <k.kozlowski@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Mark Yao <mark.yao@rock-chips.com>
Cc: Russell King <linux@arm.linux.org.uk>,
djkurtz@chromium.org, dianders@chromium.org,
Sean Paul <seanpaul@chromium.org>, Kukjin Kim <kgene@kernel.org>,
Kumar Gala <galak@codeaurora.org>,
emil.l.velikov@gmail.com,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Gustavo Padovan <gustavo.padovan@collabora.co.uk>,
Kishon Vijay Abraham I <kishon@ti.com>,
Pawel Moll <pawel.moll@arm.com>,
ajaynumb@gmail.com, robherring2@gmail.com,
javier@osg.samsung.com, Andy Yan <andy.yan@rock-chips.com>,
Yakir Yang <ykk@rock-chips.com>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 14/17] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288
Date: Wed, 28 Oct 2015 16:56:01 +0800 [thread overview]
Message-ID: <1446022561-16870-1-git-send-email-ykk@rock-chips.com> (raw)
In-Reply-To: <1446020143-32645-1-git-send-email-ykk@rock-chips.com>
There are some IP limit on rk3288 that only support 4 physical lanes
of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- Seprate the link-rate and lane-count limit out with the device_type
flag. (Thierry)
Changes in v3: None
Changes in v2: None
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 33 ++++++++++++++--------
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 4 +--
2 files changed, 23 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 6307060..563ffb1d 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -890,8 +890,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
return;
}
- ret = analogix_dp_set_link_train(dp, dp->video_info.lane_count,
- dp->video_info.link_rate);
+ ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
+ dp->video_info.max_link_rate);
if (ret) {
dev_err(dp->dev, "unable to do link train\n");
return;
@@ -1156,16 +1156,25 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
struct device_node *dp_node = dp->dev->of_node;
struct video_info *video_info = &dp->video_info;
- if (of_property_read_u32(dp_node, "samsung,link-rate",
- &video_info->link_rate)) {
- dev_err(dp->dev, "failed to get link-rate\n");
- return -EINVAL;
- }
-
- if (of_property_read_u32(dp_node, "samsung,lane-count",
- &video_info->lane_count)) {
- dev_err(dp->dev, "failed to get lane-count\n");
- return -EINVAL;
+ switch (dp->plat_data && dp->plat_data->dev_type) {
+ case RK3288_DP:
+ /*
+ * Like Rk3288 DisplayPort TRM indicate that "Main link
+ * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
+ */
+ video_info->max_link_rate = 0x0A;
+ video_info->max_lane_count = 0x04;
+ break;
+ case EXYNOS_DP:
+ /*
+ * NOTE: those property parseing code is used for
+ * providing backward compatibility for samsung platform.
+ */
+ of_property_read_u32(dp_node, "samsung,link-rate",
+ &video_info->max_link_rate);
+ of_property_read_u32(dp_node, "samsung,lane-count",
+ &video_info->max_lane_count);
+ break;
}
return 0;
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index e37cef6..e6f8243 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -129,8 +129,8 @@ struct video_info {
enum color_coefficient ycbcr_coeff;
enum color_depth color_depth;
- enum link_rate_type link_rate;
- enum link_lane_count_type lane_count;
+ enum link_rate_type max_link_rate;
+ enum link_lane_count_type max_lane_count;
};
struct link_train {
--
1.9.1
next prev parent reply other threads:[~2015-10-28 8:56 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-28 8:15 [PATCH v8 0/17] Add Analogix Core Display Port Driver Yakir Yang
2015-10-28 8:19 ` [PATCH v8 01/17] drm: exynos: dp: convert to drm bridge mode Yakir Yang
2016-03-22 22:22 ` Inki Dae
2015-10-28 8:21 ` [PATCH v8 02/17] drm: bridge: analogix/dp: split exynos dp driver to bridge directory Yakir Yang
2015-11-26 17:30 ` Heiko Stübner
2015-11-27 1:20 ` Yakir Yang
2015-11-27 8:42 ` Heiko Stübner
2015-10-28 8:23 ` [PATCH v8 03/17] drm: bridge: analogix/dp: fix some obvious code style Yakir Yang
2015-10-28 8:24 ` [PATCH v8 04/17] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang
2015-10-28 8:25 ` [PATCH v8 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang
2015-10-28 8:26 ` [PATCH v8 06/17] dt-bindings: add document for analogix display port driver Yakir Yang
2015-10-28 20:02 ` Heiko Stuebner
2015-10-29 1:12 ` Yakir Yang
2015-10-29 8:40 ` Heiko Stuebner
2015-10-28 8:27 ` [PATCH v8 07/17] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang
2015-10-28 8:27 ` [PATCH v8 08/17] drm: rockchip: dp: add rockchip platform dp driver Yakir Yang
2015-11-27 8:41 ` Heiko Stübner
2015-10-28 8:28 ` [PATCH v8 09/17] dt-bindings: add document for rockchip variant of analogix_dp Yakir Yang
2015-10-30 16:46 ` Rob Herring
2015-10-31 3:15 ` Yakir Yang
2015-10-28 8:30 ` [PATCH v8 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang
2015-10-28 20:36 ` Heiko Stuebner
2015-10-29 1:14 ` Yakir Yang
2015-11-11 23:23 ` Heiko Stuebner
[not found] ` <5643FB43.6090408@rock-chips.com>
2015-11-12 9:21 ` Heiko Stuebner
2015-10-28 8:31 ` [PATCH v8 11/17] dt-bindings: add document for rockchip dp phy Yakir Yang
2015-10-30 16:42 ` Rob Herring
2015-10-31 3:13 ` Yakir Yang
2015-10-28 8:52 ` [PATCH v8 12/17] drm: rockchip: vop: add bpc and color mode setting Yakir Yang
2015-10-28 8:55 ` [PATCH v8 13/17] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang
2015-10-28 8:56 ` Yakir Yang [this message]
2015-11-27 13:32 ` [PATCH v8 14/17] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Heiko Stübner
2015-12-02 10:46 ` Yakir Yang
2015-10-28 9:12 ` [PATCH v8 16/17] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang
2015-10-28 9:13 ` [PATCH v8 17/17] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang
2015-10-29 1:58 ` [PATCH v9 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang
2015-11-03 4:38 ` Brian Norris
2015-11-04 0:48 ` Yakir Yang
2015-11-04 1:13 ` Brian Norris
2015-11-05 23:45 ` Brian Norris
2015-11-17 12:58 ` Yakir Yang
2015-10-29 17:49 ` [PATCH v8 0/17] Add Analogix Core Display Port Driver Heiko Stuebner
2015-10-30 1:05 ` Yakir Yang
2015-10-30 1:09 ` [PATCH v9 15/17] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang
2015-11-11 23:10 ` Rob Herring
[not found] ` <5643EAF9.9020508@rock-chips.com>
2015-11-12 23:38 ` Rob Herring
2015-10-31 6:30 ` [PATCH v9 09/17] dt-bindings: add document for rockchip variant of analogix_dp Yakir Yang
2015-10-31 6:40 ` Yakir Yang
2015-10-31 6:42 ` [PATCH v10 " Yakir Yang
2015-10-31 18:37 ` Rob Herring
2015-11-02 0:41 ` Yakir Yang
2015-11-17 13:09 ` [PATCH v10 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang
2015-11-17 13:31 ` [PATCH v8 0/17] Add Analogix Core Display Port Driver Yakir Yang
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