From: Brian Norris <computersforpeace@gmail.com>
To: Yakir Yang <ykk@rock-chips.com>
Cc: Inki Dae <inki.dae@samsung.com>,
Andrzej Hajda <a.hajda@samsung.com>,
Joonyoung Shim <jy0922.shim@samsung.com>,
Seung-Woo Kim <sw0312.kim@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Jingoo Han <jingoohan1@gmail.com>,
Thierry Reding <treding@nvidia.com>,
Krzysztof Kozlowski <k.kozlowski@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Mark Yao <mark.yao@rock-chips.com>,
djkurtz@chromium.org, dianders@chromium.org,
Gustavo Padovan <gustavo.padovan@collabora.co.uk>,
linux-samsung-soc@vger.kernel.org,
Russell King <linux@arm.linux.org.uk>,
linux-rockchip@lists.infradead.org,
Kishon Vijay Abraham I <kishon@ti.com>,
javier@osg.samsung.com, Kukjin Kim <kgene@kernel.org>,
robherring2@gmail.com, devicetree@vger.kernel.org,
Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Sean Paul <seanpaul@chromium.org>,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org, emil.l.velikov@gmail.com,
linux-kernel@vger.kernel.org, Kumar Gala <galak@codeaurora.org>,
ajaynumb@gmail.com, Andy Yan <andy.yan@rock-chips.com>
Subject: Re: [PATCH v9 10/17] phy: Add driver for rockchip Display Port PHY
Date: Mon, 2 Nov 2015 20:38:27 -0800 [thread overview]
Message-ID: <20151103043827.GA17261@localhost> (raw)
In-Reply-To: <1446083918-30809-1-git-send-email-ykk@rock-chips.com>
Hi Yakir,
On Thu, Oct 29, 2015 at 09:58:38AM +0800, Yakir Yang wrote:
> Add phy driver for the Rockchip DisplayPort PHY module. This
> is required to get DisplayPort working in Rockchip SoCs.
>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> ---
...
> diff --git a/drivers/phy/phy-rockchip-dp.c b/drivers/phy/phy-rockchip-dp.c
> new file mode 100644
> index 0000000..f3e0058
> --- /dev/null
> +++ b/drivers/phy/phy-rockchip-dp.c
> @@ -0,0 +1,151 @@
> +/*
> + * Rockchip DP PHY driver
> + *
> + * Copyright (C) 2015 FuZhou Rockchip Co., Ltd.
> + * Author: Yakir Yang <ykk@@rock-chips.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/clk.h>
> +#include <linux/phy/phy.h>
> +#include <linux/regmap.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/platform_device.h>
> +
> +#define GRF_SOC_CON12 0x0274
> +
> +#define GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK BIT(4)
> +#define GRF_EDP_REF_CLK_SEL_INTER BIT(4)
Why are the above two macros the same? Judging by the RK3288 manual and
other downstream drivers, it seems like you want the _MASK one to be
shifted left by 16 (i.e., BIT(20)).
> +
> +#define GRF_EDP_PHY_SIDDQ_HIWORD_MASK BIT(21)
> +#define GRF_EDP_PHY_SIDDQ_ON 0
> +#define GRF_EDP_PHY_SIDDQ_OFF BIT(5)
> +
...
> + ret = regmap_write(dp->grf, GRF_SOC_CON12, GRF_EDP_REF_CLK_SEL_INTER |
> + GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK);
IOW, the above is writing:
BIT(4) | BIT(4)
whereas I think you want:
BIT(4) | BIT(20)
> + if (ret != 0) {
> + dev_err(dp->dev, "Could not config GRF edp ref clk: %d\n", ret);
> + return ret;
> + }
> +
...
(FYI, I came across this by inspection when comparing Heiko's
'somewhat-stable' branch [1] with this series. The former brings up eDP
fine on veyron-jaq, whereas this one doesn't yet, even with the above
change. Still debugging the issue.)
Brian
[1] https://github.com/mmind/linux-rockchip/tree/devel/somewhat-stable
next prev parent reply other threads:[~2015-11-03 4:38 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-28 8:15 [PATCH v8 0/17] Add Analogix Core Display Port Driver Yakir Yang
2015-10-28 8:19 ` [PATCH v8 01/17] drm: exynos: dp: convert to drm bridge mode Yakir Yang
2016-03-22 22:22 ` Inki Dae
2015-10-28 8:21 ` [PATCH v8 02/17] drm: bridge: analogix/dp: split exynos dp driver to bridge directory Yakir Yang
2015-11-26 17:30 ` Heiko Stübner
2015-11-27 1:20 ` Yakir Yang
2015-11-27 8:42 ` Heiko Stübner
2015-10-28 8:23 ` [PATCH v8 03/17] drm: bridge: analogix/dp: fix some obvious code style Yakir Yang
2015-10-28 8:24 ` [PATCH v8 04/17] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang
2015-10-28 8:25 ` [PATCH v8 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang
2015-10-28 8:26 ` [PATCH v8 06/17] dt-bindings: add document for analogix display port driver Yakir Yang
2015-10-28 20:02 ` Heiko Stuebner
2015-10-29 1:12 ` Yakir Yang
2015-10-29 8:40 ` Heiko Stuebner
2015-10-28 8:27 ` [PATCH v8 07/17] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang
2015-10-28 8:27 ` [PATCH v8 08/17] drm: rockchip: dp: add rockchip platform dp driver Yakir Yang
2015-11-27 8:41 ` Heiko Stübner
2015-10-28 8:28 ` [PATCH v8 09/17] dt-bindings: add document for rockchip variant of analogix_dp Yakir Yang
2015-10-30 16:46 ` Rob Herring
2015-10-31 3:15 ` Yakir Yang
2015-10-28 8:30 ` [PATCH v8 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang
2015-10-28 20:36 ` Heiko Stuebner
2015-10-29 1:14 ` Yakir Yang
2015-11-11 23:23 ` Heiko Stuebner
[not found] ` <5643FB43.6090408@rock-chips.com>
2015-11-12 9:21 ` Heiko Stuebner
2015-10-28 8:31 ` [PATCH v8 11/17] dt-bindings: add document for rockchip dp phy Yakir Yang
2015-10-30 16:42 ` Rob Herring
2015-10-31 3:13 ` Yakir Yang
2015-10-28 8:52 ` [PATCH v8 12/17] drm: rockchip: vop: add bpc and color mode setting Yakir Yang
2015-10-28 8:55 ` [PATCH v8 13/17] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang
2015-10-28 8:56 ` [PATCH v8 14/17] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Yakir Yang
2015-11-27 13:32 ` Heiko Stübner
2015-12-02 10:46 ` Yakir Yang
2015-10-28 9:12 ` [PATCH v8 16/17] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang
2015-10-28 9:13 ` [PATCH v8 17/17] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang
2015-10-29 1:58 ` [PATCH v9 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang
2015-11-03 4:38 ` Brian Norris [this message]
2015-11-04 0:48 ` Yakir Yang
2015-11-04 1:13 ` Brian Norris
2015-11-05 23:45 ` Brian Norris
2015-11-17 12:58 ` Yakir Yang
2015-10-29 17:49 ` [PATCH v8 0/17] Add Analogix Core Display Port Driver Heiko Stuebner
2015-10-30 1:05 ` Yakir Yang
2015-10-30 1:09 ` [PATCH v9 15/17] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang
2015-11-11 23:10 ` Rob Herring
[not found] ` <5643EAF9.9020508@rock-chips.com>
2015-11-12 23:38 ` Rob Herring
2015-10-31 6:30 ` [PATCH v9 09/17] dt-bindings: add document for rockchip variant of analogix_dp Yakir Yang
2015-10-31 6:40 ` Yakir Yang
2015-10-31 6:42 ` [PATCH v10 " Yakir Yang
2015-10-31 18:37 ` Rob Herring
2015-11-02 0:41 ` Yakir Yang
2015-11-17 13:09 ` [PATCH v10 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang
2015-11-17 13:31 ` [PATCH v8 0/17] Add Analogix Core Display Port Driver Yakir Yang
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