[PATCH v5 00/11] cpufreq: Introduce ST's CPUFreq driver

[PATCH v5 00/11] cpufreq: Introduce ST's CPUFreq driver

[Lee Jones]

This is a re-write of the original submission, hence why the
change-log is omitted.  Basically almost everything has changed.
We are now using the new OPP framework and generic bindings
written by Viresh.

There are 'ARM' patches in the set which are not necessarily
related to CPUFreq, but are required to get it to work. Anyone
who is not interested in general STi DT changes can safely
ignore these.

Lee Jones (11):
  ARM: multi_v7_defconfig: Enable ST's PWM driver
  ARM: multi_v7_defconfig: Enable ST's Power Reset driver
  ARM: multi_v7_defconfig: Enable support for PWM Regulators
  ARM: STi: STiH407: Provide generic (safe) DVFS configuration
  ARM: STi: STiH407: Provide CPU with clocking information
  ARM: STi: STiH407: Link CPU with its voltage supply
  ARM: STi: STiH407: Provide CPU with a means to look-up Major number
  ARM: STi: Register CPUFreq device
  cpufreq: st: Provide runtime initialised driver for ST's platforms
  dt: cpufreq: st: Provide bindings for ST's CPUFreq implementation
  MAINTAINERS: Add ST's CPUFreq driver to the STI file list

 .../devicetree/bindings/cpufreq/cpufreq-st.txt     |  91 +++++++
 MAINTAINERS                                        |   1 +
 arch/arm/boot/dts/stih407-family.dtsi              |  20 ++
 arch/arm/configs/multi_v7_defconfig                |   5 +-
 arch/arm/mach-sti/Makefile                         |   2 +-
 arch/arm/mach-sti/board-dt.c                       |   3 +-
 arch/arm/mach-sti/{platsmp.c => cpu.c}             |  17 +-
 arch/arm/mach-sti/{smp.h => cpu.h}                 |   1 +
 drivers/cpufreq/Kconfig.arm                        |   7 +
 drivers/cpufreq/Makefile                           |   1 +
 drivers/cpufreq/sti-cpufreq.c                      | 296 +++++++++++++++++++++
 11 files changed, 438 insertions(+), 6 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-st.txt
 rename arch/arm/mach-sti/{platsmp.c => cpu.c} (93%)
 rename arch/arm/mach-sti/{smp.h => cpu.h} (93%)
 create mode 100644 drivers/cpufreq/sti-cpufreq.c

-- 
1.9.1

[PATCH v5 01/11] ARM: multi_v7_defconfig: Enable ST's PWM driver

[Lee Jones]

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 arch/arm/configs/multi_v7_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 69a22fd..99b87b6 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -690,7 +690,7 @@ CONFIG_PWM_SUN4I=y
 CONFIG_PWM_TEGRA=y
 CONFIG_PWM_VT8500=y
 CONFIG_PHY_HIX5HD2_SATA=y
-CONFIG_PWM_STI=m
+CONFIG_PWM_STI=y
 CONFIG_OMAP_USB2=y
 CONFIG_TI_PIPE3=y
 CONFIG_PHY_BERLIN_USB=y
-- 
1.9.1

[PATCH v5 02/11] ARM: multi_v7_defconfig: Enable ST's Power Reset driver

[Lee Jones]

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 arch/arm/configs/multi_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 99b87b6..f62dcb1 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -371,6 +371,7 @@ CONFIG_POWER_RESET_GPIO=y
 CONFIG_POWER_RESET_GPIO_RESTART=y
 CONFIG_POWER_RESET_KEYSTONE=y
 CONFIG_POWER_RESET_RMOBILE=y
+CONFIG_POWER_RESET_ST=y
 CONFIG_SENSORS_LM90=y
 CONFIG_SENSORS_LM95245=y
 CONFIG_SENSORS_NTC_THERMISTOR=m
-- 
1.9.1

[PATCH v5 03/11] ARM: multi_v7_defconfig: Enable support for PWM Regulators

[Lee Jones]

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 arch/arm/configs/multi_v7_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index f62dcb1..648ef57 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -434,7 +434,7 @@ CONFIG_REGULATOR_MAX77693=m
 CONFIG_REGULATOR_MAX77802=m
 CONFIG_REGULATOR_PALMAS=y
 CONFIG_REGULATOR_PBIAS=y
-CONFIG_REGULATOR_PWM=m
+CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_QCOM_RPM=y
 CONFIG_REGULATOR_QCOM_SMD_RPM=y
 CONFIG_REGULATOR_S2MPS11=y
-- 
1.9.1

[PATCH v5 04/11] ARM: STi: STiH407: Provide generic (safe) DVFS configuration

[Lee Jones]

You'll notice that the voltage cell is populated with 0's.  Voltage
information is very platform specific, even depends on 'cut' and
'substrate' versions.  Thus it is left blank for a generic (safe)
implementation.  If other nodes/properties are provided by the
bootloader, the ST CPUFreq driver will over-ride these generic
values.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 arch/arm/boot/dts/stih407-family.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 81f8121..9fa1e58 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -22,15 +22,29 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <0>;
+
 			/* u-boot puts hpen in SBC dmem at 0xa4 offset */
 			cpu-release-addr = <0x94100A4>;
+
+					 /* kHz     uV   */
+			operating-points = <1500000 0
+					    1200000 0
+					    800000  0
+					    500000  0>;
 		};
 		cpu@1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <1>;
+
 			/* u-boot puts hpen in SBC dmem at 0xa4 offset */
 			cpu-release-addr = <0x94100A4>;
+
+					 /* kHz     uV   */
+			operating-points = <1500000 0
+					    1200000 0
+					    800000  0
+					    500000  0>;
 		};
 	};
 
-- 
1.9.1

[PATCH v5 05/11] ARM: STi: STiH407: Provide CPU with clocking information

[Lee Jones]

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 arch/arm/boot/dts/stih407-family.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 9fa1e58..af9233b 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -31,6 +31,10 @@
 					    1200000 0
 					    800000  0
 					    500000  0>;
+
+			clocks = <&clk_m_a9>;
+			clock-names = "cpu";
+			clock-latency = <100000>;
 		};
 		cpu@1 {
 			device_type = "cpu";
-- 
1.9.1

[PATCH v5 06/11] ARM: STi: STiH407: Link CPU with its voltage supply

[Lee Jones]

Used for Voltage Scaling using CPUFreq.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 arch/arm/boot/dts/stih407-family.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index af9233b..d0e639cd 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -35,6 +35,7 @@
 			clocks = <&clk_m_a9>;
 			clock-names = "cpu";
 			clock-latency = <100000>;
+			cpu0-supply = <&pwm_regulator>;
 		};
 		cpu@1 {
 			device_type = "cpu";
-- 
1.9.1

[PATCH v5 07/11] ARM: STi: STiH407: Provide CPU with a means to look-up Major number

[Lee Jones]

This is used for CPU Frequency Scaling.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 arch/arm/boot/dts/stih407-family.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index d0e639cd..eb2601f 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -36,6 +36,7 @@
 			clock-names = "cpu";
 			clock-latency = <100000>;
 			cpu0-supply = <&pwm_regulator>;
+			st,syscfg = <&syscfg_core 0x8e0>;
 		};
 		cpu@1 {
 			device_type = "cpu";
-- 
1.9.1

[PATCH v5 08/11] ARM: STi: Register CPUFreq device

[Lee Jones]

DT will not allow pseudo-devices.  Only devices which represent real
hardware are permitted.  So we have to register the CPUFreq driver
from platform code instead.

Rather than create a new file, we're bundling this in with the SMP
functionality and renaming it from 'smp' to the more generic 'cpu'.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 arch/arm/mach-sti/Makefile             |  2 +-
 arch/arm/mach-sti/board-dt.c           |  3 ++-
 arch/arm/mach-sti/{platsmp.c => cpu.c} | 17 +++++++++++++++--
 arch/arm/mach-sti/{smp.h => cpu.h}     |  1 +
 4 files changed, 19 insertions(+), 4 deletions(-)
 rename arch/arm/mach-sti/{platsmp.c => cpu.c} (93%)
 rename arch/arm/mach-sti/{smp.h => cpu.h} (93%)

diff --git a/arch/arm/mach-sti/Makefile b/arch/arm/mach-sti/Makefile
index acb3309..caaeeaa 100644
--- a/arch/arm/mach-sti/Makefile
+++ b/arch/arm/mach-sti/Makefile
@@ -1,2 +1,2 @@
-obj-$(CONFIG_SMP)		+= platsmp.o headsmp.o
+obj-$(CONFIG_SMP)		+= cpu.o headsmp.o
 obj-$(CONFIG_ARCH_STI) 		+= board-dt.o
diff --git a/arch/arm/mach-sti/board-dt.c b/arch/arm/mach-sti/board-dt.c
index ae10fb2..60b23a7 100644
--- a/arch/arm/mach-sti/board-dt.c
+++ b/arch/arm/mach-sti/board-dt.c
@@ -12,7 +12,7 @@
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/arch.h>
 
-#include "smp.h"
+#include "cpu.h"
 
 static const char *const stih41x_dt_match[] __initconst = {
 	"st,stih415",
@@ -31,4 +31,5 @@ DT_MACHINE_START(STM, "STiH415/416 SoC with Flattened Device Tree")
 			  L2C_AUX_CTRL_WAY_SIZE(4),
 	.l2c_aux_mask	= 0xc0000fff,
 	.smp		= smp_ops(sti_smp_ops),
+	.init_late	= init_cpufreq,
 MACHINE_END
diff --git a/arch/arm/mach-sti/platsmp.c b/arch/arm/mach-sti/cpu.c
similarity index 93%
rename from arch/arm/mach-sti/platsmp.c
rename to arch/arm/mach-sti/cpu.c
index c4ad6ea..335ecaf 100644
--- a/arch/arm/mach-sti/platsmp.c
+++ b/arch/arm/mach-sti/cpu.c
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/mach-sti/platsmp.c
+ * arch/arm/mach-sti/cpu.c
  *
  * Copyright (C) 2013 STMicroelectronics (R&D) Limited.
  *		http://www.st.com
@@ -13,6 +13,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+
 #include <linux/init.h>
 #include <linux/errno.h>
 #include <linux/delay.h>
@@ -21,13 +22,17 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/memblock.h>
+#include <linux/platform_device.h>
 
 #include <asm/cacheflush.h>
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 
-#include "smp.h"
+#include "cpu.h"
 
+/**
+ * SMP Operations
+ */
 static void write_pen_release(int val)
 {
 	pen_release = val;
@@ -161,3 +166,11 @@ struct smp_operations __initdata sti_smp_ops = {
 	.smp_secondary_init	= sti_secondary_init,
 	.smp_boot_secondary	= sti_boot_secondary,
 };
+
+/**
+ * CPUFreq Registration
+ */
+void init_cpufreq(void)
+{
+	platform_device_register_simple("sti-cpufreq", -1, NULL, 0);
+}
diff --git a/arch/arm/mach-sti/smp.h b/arch/arm/mach-sti/cpu.h
similarity index 93%
rename from arch/arm/mach-sti/smp.h
rename to arch/arm/mach-sti/cpu.h
index ae22707..957c4d1 100644
--- a/arch/arm/mach-sti/smp.h
+++ b/arch/arm/mach-sti/cpu.h
@@ -15,5 +15,6 @@
 extern struct smp_operations	sti_smp_ops;
 
 void sti_secondary_startup(void);
+extern void init_cpufreq(void);
 
 #endif
-- 
1.9.1

[PATCH v5 09/11] cpufreq: st: Provide runtime initialised driver for ST's platforms

[Lee Jones]

The bootloader is charged with the responsibility to provide platform
specific Dynamic Voltage and Frequency Scaling (DVFS) information via
Device Tree.  This driver takes the supplied configuration and
registers it with the new generic OPP framework, to then be used with
CPUFreq.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 drivers/cpufreq/Kconfig.arm   |   7 +
 drivers/cpufreq/Makefile      |   1 +
 drivers/cpufreq/sti-cpufreq.c | 296 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 304 insertions(+)
 create mode 100644 drivers/cpufreq/sti-cpufreq.c

diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 1582c1c..ccde41b 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -216,6 +216,13 @@ config ARM_SPEAR_CPUFREQ
 	help
 	  This adds the CPUFreq driver support for SPEAr SOCs.
 
+config ARM_STI_CPUFREQ
+	tristate "STi CPUFreq support"
+	depends on SOC_STIH407
+	help
+	  OPP list for cpufreq-dt driver can be provided through DT or can be
+	  created at runtime.  Select this if you want create OPP list at runtime.
+
 config ARM_TEGRA20_CPUFREQ
 	bool "Tegra20 CPUFreq support"
 	depends on ARCH_TEGRA
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index c0af1a1..9e63fb1 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -73,6 +73,7 @@ obj-$(CONFIG_ARM_SA1100_CPUFREQ)	+= sa1100-cpufreq.o
 obj-$(CONFIG_ARM_SA1110_CPUFREQ)	+= sa1110-cpufreq.o
 obj-$(CONFIG_ARM_SCPI_CPUFREQ)		+= scpi-cpufreq.o
 obj-$(CONFIG_ARM_SPEAR_CPUFREQ)		+= spear-cpufreq.o
+obj-$(CONFIG_ARM_STI_CPUFREQ)		+= sti-cpufreq.o
 obj-$(CONFIG_ARM_TEGRA20_CPUFREQ)	+= tegra20-cpufreq.o
 obj-$(CONFIG_ARM_TEGRA124_CPUFREQ)	+= tegra124-cpufreq.o
 obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ)	+= vexpress-spc-cpufreq.o
diff --git a/drivers/cpufreq/sti-cpufreq.c b/drivers/cpufreq/sti-cpufreq.c
new file mode 100644
index 0000000..9f6807e
--- /dev/null
+++ b/drivers/cpufreq/sti-cpufreq.c
@@ -0,0 +1,296 @@
+/*
+ * Create CPUFreq OPP list
+ *
+ * Author: Ajit Pal Singh <ajitpal.singh@st.com>
+ *         Lee Jones <lee.jones@linaro.org>
+ *
+ * Copyright (C) 2015 STMicroelectronics (R&D) Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the version 2 of the GNU General Public License as
+ * published by the Free Software Foundation
+ */
+
+#include <linux/cpu.h>
+#include <linux/clk.h>
+#include <linux/cpufreq.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/pm_opp.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/mfd/syscon.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
+
+#define VERSION_ELEMENTS	3
+
+#define VERSION_SHIFT		28
+#define HW_INFO_INDEX		1
+#define MAJOR_ID_INDEX		1
+#define MINOR_ID_INDEX		2
+
+/* Only match on "suitable for ALL versions" entries */
+#define DEFAULT_VERSION		31
+
+enum {
+	PCODE = 0,
+	SUBSTRATE,
+	DVFS_MAX_REGFIELDS,
+};
+
+/**
+ * ST CPUFreq Driver Data
+ *
+ * @cpu_node		CPU's OF node
+ * @syscfg_eng		Engineering Syscon register map
+ * @regmap		Syscon register map
+ */
+struct st_cpufreq_ddata {
+	struct device *cpu;
+	struct regmap *syscfg_eng;
+	struct regmap *syscfg;
+};
+
+static int st_cpufreq_fetch_major(struct platform_device *pdev)
+{
+	struct st_cpufreq_ddata *ddata = platform_get_drvdata(pdev);
+	struct device_node *cpu_np = ddata->cpu->of_node;
+	unsigned int major_offset;
+	unsigned int socid;
+	int ret;
+
+	ret = of_property_read_u32_index(cpu_np, "st,syscfg",
+					 MAJOR_ID_INDEX, &major_offset);
+	if (ret) {
+		dev_err(&pdev->dev,
+			"No major number offset provided in %s [%d]\n",
+			cpu_np->full_name, ret);
+		return ret;
+	}
+
+	ret = regmap_read(ddata->syscfg, major_offset, &socid);
+	if (ret) {
+		dev_err(&pdev->dev,
+			"Failed to read the major number from syscon [%d]\n",
+			ret);
+		return ret;
+	}
+
+	return ((socid >> VERSION_SHIFT) & 0xf) + 1;
+}
+
+static int st_cpufreq_fetch_minor(struct platform_device *pdev)
+{
+	struct st_cpufreq_ddata *ddata = platform_get_drvdata(pdev);
+	struct device_node *cpu_np = ddata->cpu->of_node;
+	unsigned int minor_offset;
+	unsigned int minid;
+	int ret;
+
+	ret = of_property_read_u32_index(cpu_np, "st,syscfg-eng",
+					 MINOR_ID_INDEX, &minor_offset);
+	if (ret) {
+		dev_err(&pdev->dev,
+			"No minor number offset provided %s [%d]\n",
+			cpu_np->full_name, ret);
+		return ret;
+	}
+
+	ret = regmap_read(ddata->syscfg_eng, minor_offset, &minid);
+	if (ret) {
+		dev_err(&pdev->dev,
+			"Failed to read the minor number from syscon [%d]\n",
+			ret);
+		return ret;
+	}
+
+	return minid & 0xf;
+}
+
+static int st_cpufreq_fetch_regmap_field(struct platform_device *pdev,
+					 const struct reg_field *reg_fields,
+					 int hw_info_offset, int field)
+{
+	struct st_cpufreq_ddata *ddata = platform_get_drvdata(pdev);
+	struct regmap_field *regmap_field;
+	struct reg_field reg_field = reg_fields[field];
+	unsigned int value;
+	int ret;
+
+	reg_field.reg = hw_info_offset;
+	regmap_field = devm_regmap_field_alloc(&pdev->dev,
+					       ddata->syscfg_eng,
+					       reg_field);
+	if (IS_ERR(regmap_field)) {
+		dev_err(&pdev->dev, "Failed to allocate reg field\n");
+		return PTR_ERR(regmap_field);
+	}
+
+	ret = regmap_field_read(regmap_field, &value);
+	if (ret) {
+		dev_err(&pdev->dev, "Failed to read %s code\n",
+			field ? "SUBSTRATE" : "PCODE");
+		return ret;
+	}
+
+	return value;
+}
+
+static const struct reg_field sti_stih407_dvfs_regfields[DVFS_MAX_REGFIELDS] = {
+	[PCODE]		= REG_FIELD(0, 16, 19),
+	[SUBSTRATE]	= REG_FIELD(0, 0, 2),
+};
+
+static const struct reg_field *sti_cpufreq_match(struct platform_device *pdev)
+{
+	if (of_machine_is_compatible("st,stih407") ||
+	    of_machine_is_compatible("st,stih410"))
+		return sti_stih407_dvfs_regfields;
+
+	return NULL;
+}
+
+static int sti_cpufreq_set_opp_info(struct platform_device *pdev)
+{
+	struct st_cpufreq_ddata *ddata = platform_get_drvdata(pdev);
+	struct device_node *cpu_np = ddata->cpu->of_node;
+	const struct reg_field *reg_fields;
+	unsigned int hw_info_offset;
+	unsigned int version[VERSION_ELEMENTS];
+	int pcode, substrate, major, minor;
+	int ret;
+	char name[7];
+
+	reg_fields = sti_cpufreq_match(pdev);
+	if (!reg_fields) {
+		dev_warn(&pdev->dev, "Machine not supported\n");
+		return -ENODEV;
+	}
+
+	ret = of_property_read_u32_index(cpu_np, "st,syscfg-eng",
+					 HW_INFO_INDEX, &hw_info_offset);
+	if (ret) {
+		dev_warn(&pdev->dev, "Failed to read HW info offset from DT\n");
+		substrate = DEFAULT_VERSION;
+		pcode = 0;
+		goto use_defaults;
+	}
+
+	pcode = st_cpufreq_fetch_regmap_field(pdev, reg_fields,
+					      hw_info_offset,
+					      PCODE);
+	if (pcode < 0) {
+		dev_warn(&pdev->dev, "Failed to obtain process code\n");
+		/* Use default pcode */
+		pcode = 0;
+	}
+
+	substrate = st_cpufreq_fetch_regmap_field(pdev, reg_fields,
+						  hw_info_offset,
+						  SUBSTRATE);
+	if (substrate) {
+		dev_warn(&pdev->dev, "Failed to obtain substrate code\n");
+		/* Use default substrate */
+		substrate = DEFAULT_VERSION;
+	}
+
+use_defaults:
+	major = st_cpufreq_fetch_major(pdev);
+	if (major < 0) {
+		dev_err(&pdev->dev, "Failed to obtain major version\n");
+		/* Use default major number */
+		major = DEFAULT_VERSION;
+	}
+
+	minor = st_cpufreq_fetch_minor(pdev);
+	if (minor < 0) {
+		dev_err(&pdev->dev, "Failed to obtain minor version\n");
+		/* Use default minor number */
+		minor = DEFAULT_VERSION;
+	}
+
+	sprintf(name, "pcode%d", pcode);
+
+	ret = dev_pm_opp_set_prop_name(ddata->cpu, name);
+	if (ret) {
+		dev_err(&pdev->dev, "Failed to set prop name\n");
+		return ret;
+	}
+
+	version[0] = BIT(major);
+	version[1] = BIT(minor);
+	version[2] = BIT(substrate);
+
+	ret = dev_pm_opp_set_supported_hw(ddata->cpu,
+					  version, VERSION_ELEMENTS);
+	if (ret) {
+		dev_err(&pdev->dev, "Failed to set supported hardware\n");
+		return ret;
+	}
+
+	dev_err(&pdev->dev, "pcode: %d major: %d minor: %d substrate: %d\n",
+		pcode, major, minor, substrate);
+	dev_err(&pdev->dev, "version[0]: %x version[1]: %x version[2]: %x\n",
+		version[0], version[1], version[2]);
+
+	return 0;
+}
+
+static void sti_cpufreq_fetch_syscon_regsiters(struct platform_device *pdev)
+{
+	struct st_cpufreq_ddata *ddata = platform_get_drvdata(pdev);
+	struct device_node *cpu_np = ddata->cpu->of_node;
+
+	ddata->syscfg =
+		syscon_regmap_lookup_by_phandle(cpu_np, "st,syscfg");
+	if (IS_ERR(ddata->syscfg))
+		dev_warn(&pdev->dev,  "\"st,syscfg\" not supplied\n");
+
+	ddata->syscfg_eng =
+		syscon_regmap_lookup_by_phandle(cpu_np, "st,syscfg-eng");
+	if (IS_ERR(ddata->syscfg_eng))
+		dev_warn(&pdev->dev, "\"st,syscfg-eng\" not supplied\n");
+}
+
+static int sti_cpufreq_probe(struct platform_device *pdev)
+{
+	struct st_cpufreq_ddata *ddata;
+	int ret;
+
+	ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
+	if (!ddata)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, ddata);
+
+	ddata->cpu = get_cpu_device(0);
+	if (!ddata->cpu) {
+		dev_err(&pdev->dev, "Failed to get cpu0 device\n");
+		return -ENODEV;
+	}
+
+	sti_cpufreq_fetch_syscon_regsiters(pdev);
+
+	ret = sti_cpufreq_set_opp_info(pdev);
+	if (ret)
+		dev_warn(&pdev->dev, "Not doing voltage scaling\n");
+
+	platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
+
+	return 0;
+}
+
+static struct platform_driver sti_cpufreq = {
+	.driver = {
+		.name = "sti-cpufreq",
+	},
+	.probe = sti_cpufreq_probe,
+};
+module_platform_driver(sti_cpufreq);
+
+MODULE_DESCRIPTION("STMicroelectronics CPUFreq/OPP driver");
+MODULE_AUTHOR("Ajitpal Singh <ajitpal.singh@st.com>");
+MODULE_AUTHOR("Lee Jones <lee.jones@linaro.org>");
+MODULE_LICENSE("GPL v2");
-- 
1.9.1

[PATCH v5 10/11] dt: cpufreq: st: Provide bindings for ST's CPUFreq implementation

[Lee Jones]

Cc: devicetree@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 .../devicetree/bindings/cpufreq/cpufreq-st.txt     | 91 ++++++++++++++++++++++
 1 file changed, 91 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-st.txt

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-st.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-st.txt
new file mode 100644
index 0000000..d91a02a
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-st.txt
@@ -0,0 +1,91 @@
+Binding for ST's CPUFreq driver
+===============================
+
+ST's CPUFreq driver attempts to read 'process' and 'version' attributes
+from the SoC, then supplies the OPP framework with 'prop' and 'supported
+hardware' information respectively.  The framework is then able to read
+the DT and operate in the usual way.
+
+For more information about the expected DT format [See: ../opp/opp.txt].
+
+Frequency Scaling only
+----------------------
+
+No vendor specific driver required for this.
+
+Located in CPU's node:
+
+- operating-points		: [See: ../power/opp.txt]
+
+Example [safe]
+--------------
+
+cpus {
+	cpu@0 {
+				 /* kHz     uV   */
+		operating-points = <1500000 0
+				    1200000 0
+				    800000  0
+				    500000  0>;
+	};
+};
+
+Dynamic Voltage and Frequency Scaling (DVFS)
+--------------------------------------------
+
+This requires the ST CPUFreq driver to supply 'process' and 'version' info.
+
+Located in CPU's node:
+
+- operating-points-v2		: [See ../power/opp.txt]
+
+Example [unsafe]
+----------------
+
+cpus {
+	cpu@0 {
+		operating-points-v2	= <&cpu0_opp_table>;
+	};
+};
+
+cpu0_opp_table: opp_table {
+	compatible = "operating-points-v2";
+
+	/* ############################################################### */
+	/* # WARNING: Do not attempt to copy/replicate these nodes,      # */
+	/* #          they are only to be supplied by the bootloader !!! # */
+	/* ############################################################### */
+	opp0 {
+		/*			   Major       Minor       Substrate */
+		/*			   2           all         all       */
+		opp-supported-hw	= <0x00000004  0xffffffff  0xffffffff>;
+		opp-hz			= /bits/ 64 <1500000000>;
+		clock-latency-ns	= <10000000>;
+
+		opp-microvolt-pcode0	= <1200000>;
+		opp-microvolt-pcode1	= <1200000>;
+		opp-microvolt-pcode2	= <1200000>;
+		opp-microvolt-pcode3	= <1200000>;
+		opp-microvolt-pcode4	= <1170000>;
+		opp-microvolt-pcode5	= <1140000>;
+		opp-microvolt-pcode6	= <1100000>;
+		opp-microvolt-pcode7	= <1070000>;
+	};
+
+	opp1 {
+		/*			   Major       Minor       Substrate */
+		/*			   all         all         all       */
+		opp-supported-hw	= <0xffffffff  0xffffffff  0xffffffff>;
+		opp-hz			= /bits/ 64 <1200000000>;
+		clock-latency-ns	= <10000000>;
+
+		opp-microvolt-pcode0	= <1110000>;
+		opp-microvolt-pcode1	= <1150000>;
+		opp-microvolt-pcode2	= <1100000>;
+		opp-microvolt-pcode3	= <1080000>;
+		opp-microvolt-pcode4	= <1040000>;
+		opp-microvolt-pcode5	= <1020000>;
+		opp-microvolt-pcode6	= <980000>;
+		opp-microvolt-pcode7	= <930000>;
+	};
+};
-- 
1.9.1

[PATCH v5 11/11] MAINTAINERS: Add ST's CPUFreq driver to the STI file list

[Lee Jones]

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index e9caa4b..ebc0562 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1562,6 +1562,7 @@ F:	arch/arm/boot/dts/sti*
 F:	drivers/char/hw_random/st-rng.c
 F:	drivers/clocksource/arm_global_timer.c
 F:	drivers/clocksource/clksrc_st_lpc.c
+F:	drivers/cpufreq/sti-cpufreq.c
 F:	drivers/i2c/busses/i2c-st.c
 F:	drivers/media/rc/st_rc.c
 F:	drivers/media/platform/sti/c8sectpfe/
-- 
1.9.1

Re: [PATCH v5 04/11] ARM: STi: STiH407: Provide generic (safe) DVFS configuration

[Viresh Kumar]

On 08-12-15, 14:31, Lee Jones wrote:
> diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
> index 81f8121..9fa1e58 100644
> --- a/arch/arm/boot/dts/stih407-family.dtsi
> +++ b/arch/arm/boot/dts/stih407-family.dtsi
> @@ -22,15 +22,29 @@
>  			device_type = "cpu";
>  			compatible = "arm,cortex-a9";
>  			reg = <0>;
> +
>  			/* u-boot puts hpen in SBC dmem at 0xa4 offset */
>  			cpu-release-addr = <0x94100A4>;
> +
> +					 /* kHz     uV   */
> +			operating-points = <1500000 0
> +					    1200000 0
> +					    800000  0
> +					    500000  0>;
>  		};
>  		cpu@1 {
>  			device_type = "cpu";
>  			compatible = "arm,cortex-a9";
>  			reg = <1>;
> +
>  			/* u-boot puts hpen in SBC dmem at 0xa4 offset */
>  			cpu-release-addr = <0x94100A4>;
> +
> +					 /* kHz     uV   */
> +			operating-points = <1500000 0
> +					    1200000 0
> +					    800000  0
> +					    500000  0>;

Why didn't you move to opp-v2 ?

-- 
viresh

Re: [PATCH v5 04/11] ARM: STi: STiH407: Provide generic (safe) DVFS configuration

[Lee Jones]

On Tue, 08 Dec 2015, Viresh Kumar wrote:

> On 08-12-15, 14:31, Lee Jones wrote:
> > diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
> > index 81f8121..9fa1e58 100644
> > --- a/arch/arm/boot/dts/stih407-family.dtsi
> > +++ b/arch/arm/boot/dts/stih407-family.dtsi
> > @@ -22,15 +22,29 @@
> >  			device_type = "cpu";
> >  			compatible = "arm,cortex-a9";
> >  			reg = <0>;
> > +
> >  			/* u-boot puts hpen in SBC dmem at 0xa4 offset */
> >  			cpu-release-addr = <0x94100A4>;
> > +
> > +					 /* kHz     uV   */
> > +			operating-points = <1500000 0
> > +					    1200000 0
> > +					    800000  0
> > +					    500000  0>;
> >  		};
> >  		cpu@1 {
> >  			device_type = "cpu";
> >  			compatible = "arm,cortex-a9";
> >  			reg = <1>;
> > +
> >  			/* u-boot puts hpen in SBC dmem at 0xa4 offset */
> >  			cpu-release-addr = <0x94100A4>;
> > +
> > +					 /* kHz     uV   */
> > +			operating-points = <1500000 0
> > +					    1200000 0
> > +					    800000  0
> > +					    500000  0>;
> 
> Why didn't you move to opp-v2 ?
 
Because we can't guarantee that the system was booted with a
bootloader which supports opp-v2.  This is the fall-back
configuration.  Please continue through the set.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH v5 08/11] ARM: STi: Register CPUFreq device

[Viresh Kumar]

On 08-12-15, 14:32, Lee Jones wrote:
> +/**
> + * SMP Operations
> + */

Why do you need a documentation style comment here?

>  static void write_pen_release(int val)
>  {
>  	pen_release = val;
> @@ -161,3 +166,11 @@ struct smp_operations __initdata sti_smp_ops = {
>  	.smp_secondary_init	= sti_secondary_init,
>  	.smp_boot_secondary	= sti_boot_secondary,
>  };
> +
> +/**
> + * CPUFreq Registration
> + */

Here too.

> +void init_cpufreq(void)
> +{
> +	platform_device_register_simple("sti-cpufreq", -1, NULL, 0);
> +}

I don't think you need this, as you can do all the stuff you want from
the module_init() function in the driver. You just have to make sure
that your driver is only compilable and workable on the right STi platform.

-- 
viresh

Re: [PATCH v5 09/11] cpufreq: st: Provide runtime initialised driver for ST's platforms

[Viresh Kumar]

Good work Lee, looks mostly okay. Few nits below.

On 08-12-15, 14:32, Lee Jones wrote:
> The bootloader is charged with the responsibility to provide platform
> specific Dynamic Voltage and Frequency Scaling (DVFS) information via
> Device Tree.  This driver takes the supplied configuration and
> registers it with the new generic OPP framework, to then be used with
> CPUFreq.
> 
> Signed-off-by: Lee Jones <lee.jones@linaro.org>
> ---
>  drivers/cpufreq/Kconfig.arm   |   7 +
>  drivers/cpufreq/Makefile      |   1 +
>  drivers/cpufreq/sti-cpufreq.c | 296 ++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 304 insertions(+)
>  create mode 100644 drivers/cpufreq/sti-cpufreq.c
> 
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 1582c1c..ccde41b 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -216,6 +216,13 @@ config ARM_SPEAR_CPUFREQ
>  	help
>  	  This adds the CPUFreq driver support for SPEAr SOCs.
>  
> +config ARM_STI_CPUFREQ
> +	tristate "STi CPUFreq support"
> +	depends on SOC_STIH407
> +	help
> +	  OPP list for cpufreq-dt driver can be provided through DT or can be
> +	  created at runtime.  Select this if you want create OPP list at runtime.

Really? Where are we creating the list at runtime ?

> +
>  config ARM_TEGRA20_CPUFREQ
>  	bool "Tegra20 CPUFreq support"
>  	depends on ARCH_TEGRA
> diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
> index c0af1a1..9e63fb1 100644
> --- a/drivers/cpufreq/Makefile
> +++ b/drivers/cpufreq/Makefile
> @@ -73,6 +73,7 @@ obj-$(CONFIG_ARM_SA1100_CPUFREQ)	+= sa1100-cpufreq.o
>  obj-$(CONFIG_ARM_SA1110_CPUFREQ)	+= sa1110-cpufreq.o
>  obj-$(CONFIG_ARM_SCPI_CPUFREQ)		+= scpi-cpufreq.o
>  obj-$(CONFIG_ARM_SPEAR_CPUFREQ)		+= spear-cpufreq.o
> +obj-$(CONFIG_ARM_STI_CPUFREQ)		+= sti-cpufreq.o
>  obj-$(CONFIG_ARM_TEGRA20_CPUFREQ)	+= tegra20-cpufreq.o
>  obj-$(CONFIG_ARM_TEGRA124_CPUFREQ)	+= tegra124-cpufreq.o
>  obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ)	+= vexpress-spc-cpufreq.o
> diff --git a/drivers/cpufreq/sti-cpufreq.c b/drivers/cpufreq/sti-cpufreq.c
> new file mode 100644
> index 0000000..9f6807e
> --- /dev/null
> +++ b/drivers/cpufreq/sti-cpufreq.c
> @@ -0,0 +1,296 @@
> +/*
> + * Create CPUFreq OPP list

No, that's not what we are doing.

> + *
> + * Author: Ajit Pal Singh <ajitpal.singh@st.com>
> + *         Lee Jones <lee.jones@linaro.org>
> + *
> + * Copyright (C) 2015 STMicroelectronics (R&D) Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the version 2 of the GNU General Public License as
> + * published by the Free Software Foundation
> + */
> +
> +#include <linux/cpu.h>
> +#include <linux/clk.h>
> +#include <linux/cpufreq.h>
> +#include <linux/module.h>
> +#include <linux/io.h>
> +#include <linux/pm_opp.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/regulator/consumer.h>

Keeping them in alphabetical order is considered better, as that is
more human-readable. Up to you.

> +
> +#define VERSION_ELEMENTS	3
> +
> +#define VERSION_SHIFT		28
> +#define HW_INFO_INDEX		1
> +#define MAJOR_ID_INDEX		1
> +#define MINOR_ID_INDEX		2
> +
> +/* Only match on "suitable for ALL versions" entries */
> +#define DEFAULT_VERSION		31

i.e. 0x1F. Is that sufficient for you? I mean, why not keep this value
as 0xFFFFFFFF to be future proof ? (I know there wouldn't be that many
versions, but still its better to use the full 32 bit field). Also
this should be in Hex I believe.

> +static const struct reg_field *sti_cpufreq_match(struct platform_device *pdev)
> +{
> +	if (of_machine_is_compatible("st,stih407") ||
> +	    of_machine_is_compatible("st,stih410"))
> +		return sti_stih407_dvfs_regfields;

You had Kconfig dependency on STI407 only and not 410. Perhaps there
is no STI410 config option?

> +
> +	return NULL;
> +}
> +
> +static int sti_cpufreq_set_opp_info(struct platform_device *pdev)
> +{
> +	struct st_cpufreq_ddata *ddata = platform_get_drvdata(pdev);
> +	struct device_node *cpu_np = ddata->cpu->of_node;
> +	const struct reg_field *reg_fields;
> +	unsigned int hw_info_offset;
> +	unsigned int version[VERSION_ELEMENTS];
> +	int pcode, substrate, major, minor;
> +	int ret;
> +	char name[7];
> +
> +	reg_fields = sti_cpufreq_match(pdev);
> +	if (!reg_fields) {
> +		dev_warn(&pdev->dev, "Machine not supported\n");

Continuing comments from the last patch, where I suggested not to
create a platform-device for this enabler driver..

You can make this dev_dbg(), so that we don't warn unnecessarily on
other STI407 platforms.

> +		return -ENODEV;
> +	}
> +
> +	ret = of_property_read_u32_index(cpu_np, "st,syscfg-eng",
> +					 HW_INFO_INDEX, &hw_info_offset);
> +	if (ret) {
> +		dev_warn(&pdev->dev, "Failed to read HW info offset from DT\n");
> +		substrate = DEFAULT_VERSION;
> +		pcode = 0;
> +		goto use_defaults;
> +	}
> +
> +	pcode = st_cpufreq_fetch_regmap_field(pdev, reg_fields,
> +					      hw_info_offset,
> +					      PCODE);
> +	if (pcode < 0) {
> +		dev_warn(&pdev->dev, "Failed to obtain process code\n");
> +		/* Use default pcode */
> +		pcode = 0;
> +	}
> +
> +	substrate = st_cpufreq_fetch_regmap_field(pdev, reg_fields,
> +						  hw_info_offset,
> +						  SUBSTRATE);
> +	if (substrate) {
> +		dev_warn(&pdev->dev, "Failed to obtain substrate code\n");
> +		/* Use default substrate */
> +		substrate = DEFAULT_VERSION;
> +	}
> +
> +use_defaults:
> +	major = st_cpufreq_fetch_major(pdev);
> +	if (major < 0) {
> +		dev_err(&pdev->dev, "Failed to obtain major version\n");
> +		/* Use default major number */
> +		major = DEFAULT_VERSION;
> +	}
> +
> +	minor = st_cpufreq_fetch_minor(pdev);
> +	if (minor < 0) {
> +		dev_err(&pdev->dev, "Failed to obtain minor version\n");
> +		/* Use default minor number */
> +		minor = DEFAULT_VERSION;
> +	}
> +
> +	sprintf(name, "pcode%d", pcode);
> +
> +	ret = dev_pm_opp_set_prop_name(ddata->cpu, name);
> +	if (ret) {
> +		dev_err(&pdev->dev, "Failed to set prop name\n");
> +		return ret;
> +	}
> +
> +	version[0] = BIT(major);
> +	version[1] = BIT(minor);
> +	version[2] = BIT(substrate);
> +
> +	ret = dev_pm_opp_set_supported_hw(ddata->cpu,
> +					  version, VERSION_ELEMENTS);
> +	if (ret) {
> +		dev_err(&pdev->dev, "Failed to set supported hardware\n");
> +		return ret;
> +	}
> +
> +	dev_err(&pdev->dev, "pcode: %d major: %d minor: %d substrate: %d\n",
> +		pcode, major, minor, substrate);
> +	dev_err(&pdev->dev, "version[0]: %x version[1]: %x version[2]: %x\n",
> +		version[0], version[1], version[2]);
> +
> +	return 0;
> +}
> +
> +static void sti_cpufreq_fetch_syscon_regsiters(struct platform_device *pdev)
> +{
> +	struct st_cpufreq_ddata *ddata = platform_get_drvdata(pdev);
> +	struct device_node *cpu_np = ddata->cpu->of_node;
> +
> +	ddata->syscfg =
> +		syscon_regmap_lookup_by_phandle(cpu_np, "st,syscfg");
> +	if (IS_ERR(ddata->syscfg))
> +		dev_warn(&pdev->dev,  "\"st,syscfg\" not supplied\n");
> +
> +	ddata->syscfg_eng =
> +		syscon_regmap_lookup_by_phandle(cpu_np, "st,syscfg-eng");
> +	if (IS_ERR(ddata->syscfg_eng))
> +		dev_warn(&pdev->dev, "\"st,syscfg-eng\" not supplied\n");
> +}

Looks good.

> +static int sti_cpufreq_probe(struct platform_device *pdev)
> +{
> +	struct st_cpufreq_ddata *ddata;
> +	int ret;
> +
> +	ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
> +	if (!ddata)
> +		return -ENOMEM;
> +
> +	platform_set_drvdata(pdev, ddata);

There is no ->remove() for this driver (and I don't want this to be a
platform-driver, just do all this from module_init() instead). And so
you don't need the above stuff at all. You also don't need to kzalloc
ddata as its never used past this function (and all functions that are
called from here).

> +
> +	ddata->cpu = get_cpu_device(0);
> +	if (!ddata->cpu) {
> +		dev_err(&pdev->dev, "Failed to get cpu0 device\n");
> +		return -ENODEV;
> +	}
> +
> +	sti_cpufreq_fetch_syscon_regsiters(pdev);
> +
> +	ret = sti_cpufreq_set_opp_info(pdev);
> +	if (ret)
> +		dev_warn(&pdev->dev, "Not doing voltage scaling\n");
> +
> +	platform_device_register_simple("cpufreq-dt", -1, NULL, 0);

Your work finishes here. Don't leave any resources behind :)

-- 
viresh

Re: [PATCH v5 09/11] cpufreq: st: Provide runtime initialised driver for ST's platforms

[Viresh Kumar]

On 09-12-15, 08:27, Viresh Kumar wrote:
> Good work Lee, looks mostly okay. Few nits below.

Also, it may make sense to quit early of opp-v2 isn't present in your
/cpus/cpuX node. As we wouldn't be using any of this then.

-- 
viresh

Re: [PATCH v5 10/11] dt: cpufreq: st: Provide bindings for ST's CPUFreq implementation

[Rob Herring]

On Tue, Dec 08, 2015 at 02:32:03PM +0000, Lee Jones wrote:
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Lee Jones <lee.jones@linaro.org>

Acked-by: Rob Herring <robh@kernel.org>

> ---
>  .../devicetree/bindings/cpufreq/cpufreq-st.txt     | 91 ++++++++++++++++++++++
>  1 file changed, 91 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-st.txt
> 
> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-st.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-st.txt
> new file mode 100644
> index 0000000..d91a02a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-st.txt
> @@ -0,0 +1,91 @@
> +Binding for ST's CPUFreq driver
> +===============================
> +
> +ST's CPUFreq driver attempts to read 'process' and 'version' attributes
> +from the SoC, then supplies the OPP framework with 'prop' and 'supported
> +hardware' information respectively.  The framework is then able to read
> +the DT and operate in the usual way.
> +
> +For more information about the expected DT format [See: ../opp/opp.txt].
> +
> +Frequency Scaling only
> +----------------------
> +
> +No vendor specific driver required for this.
> +
> +Located in CPU's node:
> +
> +- operating-points		: [See: ../power/opp.txt]
> +
> +Example [safe]
> +--------------
> +
> +cpus {
> +	cpu@0 {
> +				 /* kHz     uV   */
> +		operating-points = <1500000 0
> +				    1200000 0
> +				    800000  0
> +				    500000  0>;
> +	};
> +};
> +
> +Dynamic Voltage and Frequency Scaling (DVFS)
> +--------------------------------------------
> +
> +This requires the ST CPUFreq driver to supply 'process' and 'version' info.
> +
> +Located in CPU's node:
> +
> +- operating-points-v2		: [See ../power/opp.txt]
> +
> +Example [unsafe]
> +----------------
> +
> +cpus {
> +	cpu@0 {
> +		operating-points-v2	= <&cpu0_opp_table>;
> +	};
> +};
> +
> +cpu0_opp_table: opp_table {
> +	compatible = "operating-points-v2";
> +
> +	/* ############################################################### */
> +	/* # WARNING: Do not attempt to copy/replicate these nodes,      # */
> +	/* #          they are only to be supplied by the bootloader !!! # */
> +	/* ############################################################### */
> +	opp0 {
> +		/*			   Major       Minor       Substrate */
> +		/*			   2           all         all       */
> +		opp-supported-hw	= <0x00000004  0xffffffff  0xffffffff>;
> +		opp-hz			= /bits/ 64 <1500000000>;
> +		clock-latency-ns	= <10000000>;
> +
> +		opp-microvolt-pcode0	= <1200000>;
> +		opp-microvolt-pcode1	= <1200000>;
> +		opp-microvolt-pcode2	= <1200000>;
> +		opp-microvolt-pcode3	= <1200000>;
> +		opp-microvolt-pcode4	= <1170000>;
> +		opp-microvolt-pcode5	= <1140000>;
> +		opp-microvolt-pcode6	= <1100000>;
> +		opp-microvolt-pcode7	= <1070000>;
> +	};
> +
> +	opp1 {
> +		/*			   Major       Minor       Substrate */
> +		/*			   all         all         all       */
> +		opp-supported-hw	= <0xffffffff  0xffffffff  0xffffffff>;
> +		opp-hz			= /bits/ 64 <1200000000>;
> +		clock-latency-ns	= <10000000>;
> +
> +		opp-microvolt-pcode0	= <1110000>;
> +		opp-microvolt-pcode1	= <1150000>;
> +		opp-microvolt-pcode2	= <1100000>;
> +		opp-microvolt-pcode3	= <1080000>;
> +		opp-microvolt-pcode4	= <1040000>;
> +		opp-microvolt-pcode5	= <1020000>;
> +		opp-microvolt-pcode6	= <980000>;
> +		opp-microvolt-pcode7	= <930000>;
> +	};
> +};
> -- 
> 1.9.1
> 
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Re: [PATCH v5 08/11] ARM: STi: Register CPUFreq device

[Arnd Bergmann]

On Tuesday 08 December 2015 14:32:01 Lee Jones wrote:
> @@ -161,3 +166,11 @@ struct smp_operations __initdata sti_smp_ops = {
>         .smp_secondary_init     = sti_secondary_init,
>         .smp_boot_secondary     = sti_boot_secondary,
>  };
> +
> +/**
> + * CPUFreq Registration
> + */
> +void init_cpufreq(void)
> +{
> +       platform_device_register_simple("sti-cpufreq", -1, NULL, 0);
> +}
> 

Can you please do this under drivers/cpufreq somewhere?

I really don't want to any more of these in platform code. Requiring a
device to be created just to probe the driver is really silly.

	Arnd

Re: [PATCH v5 08/11] ARM: STi: Register CPUFreq device

[Viresh Kumar]

On 09-12-15, 10:15, Arnd Bergmann wrote:
> On Tuesday 08 December 2015 14:32:01 Lee Jones wrote:
> > @@ -161,3 +166,11 @@ struct smp_operations __initdata sti_smp_ops = {
> >         .smp_secondary_init     = sti_secondary_init,
> >         .smp_boot_secondary     = sti_boot_secondary,
> >  };
> > +
> > +/**
> > + * CPUFreq Registration
> > + */
> > +void init_cpufreq(void)
> > +{
> > +       platform_device_register_simple("sti-cpufreq", -1, NULL, 0);
> > +}
> > 
> 
> Can you please do this under drivers/cpufreq somewhere?
> 
> I really don't want to any more of these in platform code. Requiring a
> device to be created just to probe the driver is really silly.

He is actually creating two device right now..

- create sti-cpufreq device
  - so that sti-cpufreq driver get probed
    - And fix OPPs here first and then create cpufreq-dt device
      - so that cpufreq-dt driver get probed

:)

I already recommended him that he can replace the first two points by
doing things from module_init() instead. And then create cpufreq-dt
device.

-- 
viresh

Re: [PATCH v5 08/11] ARM: STi: Register CPUFreq device

[Lee Jones]

On Wed, 09 Dec 2015, Arnd Bergmann wrote:

> On Tuesday 08 December 2015 14:32:01 Lee Jones wrote:
> > @@ -161,3 +166,11 @@ struct smp_operations __initdata sti_smp_ops = {
> >         .smp_secondary_init     = sti_secondary_init,
> >         .smp_boot_secondary     = sti_boot_secondary,
> >  };
> > +
> > +/**
> > + * CPUFreq Registration
> > + */
> > +void init_cpufreq(void)
> > +{
> > +       platform_device_register_simple("sti-cpufreq", -1, NULL, 0);
> > +}
> > 
> 
> Can you please do this under drivers/cpufreq somewhere?
> 
> I really don't want to any more of these in platform code. Requiring a
> device to be created just to probe the driver is really silly.

Already on it.  Bear with.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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