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* [PATCH V2 0/3] mtd: spi-nor: add some new chip ids
@ 2016-12-21  7:23 John Crispin
  2016-12-21  7:23 ` [PATCH V2 1/3] mtd: spi-nor: add support for macronix mx25u25635f John Crispin
                   ` (2 more replies)
  0 siblings, 3 replies; 17+ messages in thread
From: John Crispin @ 2016-12-21  7:23 UTC (permalink / raw)
  To: Cyrille Pitchen, Marek Vasut; +Cc: linux-mtd, linux-kernel, John Crispin

These have been lingering inside the owrt and lede trees for a while.

André Valentin (1):
  mtd: spi-nor: add support for macronix mx25u3235f

Ash Benz (1):
  mtd: spi-nor: add support for macronix mx25u25635f

Larry D. Pinney (1):
  mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa

 drivers/mtd/spi-nor/spi-nor.c |    4 ++++
 1 file changed, 4 insertions(+)

-- 
1.7.10.4

^ permalink raw reply	[flat|nested] 17+ messages in thread

* [PATCH V2 1/3] mtd: spi-nor: add support for macronix mx25u25635f
  2016-12-21  7:23 [PATCH V2 0/3] mtd: spi-nor: add some new chip ids John Crispin
@ 2016-12-21  7:23 ` John Crispin
  2016-12-21  7:32   ` Marek Vasut
  2016-12-21 10:41   ` Cyrille Pitchen
  2016-12-21  7:23 ` [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f John Crispin
  2016-12-21  7:23 ` [PATCH V2 3/3] mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa John Crispin
  2 siblings, 2 replies; 17+ messages in thread
From: John Crispin @ 2016-12-21  7:23 UTC (permalink / raw)
  To: Cyrille Pitchen, Marek Vasut
  Cc: linux-mtd, linux-kernel, Ash Benz, John Crispin

From: Ash Benz <ash.benz@bk.ru>

This patch adds support for a new macronix spi flash chip. We have had this
patch inside our tree for a while and people are actively using routers
with this chip.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Ash Benz <ash.benz@bk.ru>
---
Changes in V2
* add description

 drivers/mtd/spi-nor/spi-nor.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index d0fc165..171adb3 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -872,6 +872,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
 	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
 	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
+	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, 0) },
 	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
 	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) },
 	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },
-- 
1.7.10.4

^ permalink raw reply	[flat|nested] 17+ messages in thread

* [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f
  2016-12-21  7:23 [PATCH V2 0/3] mtd: spi-nor: add some new chip ids John Crispin
  2016-12-21  7:23 ` [PATCH V2 1/3] mtd: spi-nor: add support for macronix mx25u25635f John Crispin
@ 2016-12-21  7:23 ` John Crispin
  2016-12-21  7:33   ` Marek Vasut
  2016-12-21 10:27   ` Cyrille Pitchen
  2016-12-21  7:23 ` [PATCH V2 3/3] mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa John Crispin
  2 siblings, 2 replies; 17+ messages in thread
From: John Crispin @ 2016-12-21  7:23 UTC (permalink / raw)
  To: Cyrille Pitchen, Marek Vasut
  Cc: linux-mtd, linux-kernel, André Valentin, John Crispin

From: André Valentin <avalentin@marcant.net>

This patch adds support for a new macronix spi flash chip. We have had this
patch inside our tree for a while and people are actively using routers
with this chip.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: André Valentin <avalentin@marcant.net>
---
Changes in V2
* add description
* add SECT_4K
* fix indenting

 drivers/mtd/spi-nor/spi-nor.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 171adb3..bfff159 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
 	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
+	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64, SECT_4K) },
 	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
 	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
 	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
-- 
1.7.10.4

^ permalink raw reply	[flat|nested] 17+ messages in thread

* [PATCH V2 3/3] mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa
  2016-12-21  7:23 [PATCH V2 0/3] mtd: spi-nor: add some new chip ids John Crispin
  2016-12-21  7:23 ` [PATCH V2 1/3] mtd: spi-nor: add support for macronix mx25u25635f John Crispin
  2016-12-21  7:23 ` [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f John Crispin
@ 2016-12-21  7:23 ` John Crispin
  2017-01-30 13:04   ` Cyrille Pitchen
  2 siblings, 1 reply; 17+ messages in thread
From: John Crispin @ 2016-12-21  7:23 UTC (permalink / raw)
  To: Cyrille Pitchen, Marek Vasut
  Cc: linux-mtd, linux-kernel, Larry D. Pinney, John Crispin

From: "Larry D. Pinney" <ldpinney@gmail.com>

Add Support for the ESMT_F25L32QA and ESMT_F25L64QA
These are 4MB and 8MB SPI NOR Chips from Elite Semiconductor Memory
Technology

Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Larry D. Pinney <ldpinney@gmail.com>
---
 drivers/mtd/spi-nor/spi-nor.c |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index bfff159..2b150b5 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -821,6 +821,8 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 
 	/* ESMT */
 	{ "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SECT_4K) },
+	{ "f25l32qa", INFO(0x8c4116, 0, 64 * 1024, 64, SECT_4K) },
+	{ "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128, SECT_4K) },
 
 	/* Everspin */
 	{ "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
-- 
1.7.10.4

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 1/3] mtd: spi-nor: add support for macronix mx25u25635f
  2016-12-21  7:23 ` [PATCH V2 1/3] mtd: spi-nor: add support for macronix mx25u25635f John Crispin
@ 2016-12-21  7:32   ` Marek Vasut
  2016-12-21 10:41   ` Cyrille Pitchen
  1 sibling, 0 replies; 17+ messages in thread
From: Marek Vasut @ 2016-12-21  7:32 UTC (permalink / raw)
  To: John Crispin, Cyrille Pitchen; +Cc: linux-mtd, linux-kernel, Ash Benz

On 12/21/2016 08:23 AM, John Crispin wrote:
> From: Ash Benz <ash.benz@bk.ru>
> 
> This patch adds support for a new macronix spi flash chip.


> We have had this
> patch inside our tree for a while and people are actively using routers
> with this chip.

I think this information shouldn't be part of the commit message, it's
just unrelated to this change.

> Signed-off-by: John Crispin <john@phrozen.org>
> Signed-off-by: Ash Benz <ash.benz@bk.ru>
> ---
> Changes in V2
> * add description
> 
>  drivers/mtd/spi-nor/spi-nor.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index d0fc165..171adb3 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -872,6 +872,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
>  	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
> +	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, 0) },
>  	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
>  	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) },
>  	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },
> 


-- 
Best regards,
Marek Vasut

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f
  2016-12-21  7:23 ` [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f John Crispin
@ 2016-12-21  7:33   ` Marek Vasut
  2016-12-21  7:36     ` John Crispin
  2016-12-21  8:11     ` André Valentin
  2016-12-21 10:27   ` Cyrille Pitchen
  1 sibling, 2 replies; 17+ messages in thread
From: Marek Vasut @ 2016-12-21  7:33 UTC (permalink / raw)
  To: John Crispin, Cyrille Pitchen
  Cc: linux-mtd, linux-kernel, André Valentin

On 12/21/2016 08:23 AM, John Crispin wrote:
> From: André Valentin <avalentin@marcant.net>
> 
> This patch adds support for a new macronix spi flash chip. We have had this
> patch inside our tree for a while and people are actively using routers
> with this chip.
> 
> Signed-off-by: John Crispin <john@phrozen.org>
> Signed-off-by: André Valentin <avalentin@marcant.net>
> ---
> Changes in V2
> * add description
> * add SECT_4K
> * fix indenting

Are you SURE this chip can do sect_4k ? The datasheet seems to imply
that, but I wonder why it wasn't in V1 of this patch then ? Esp. if
people are actively using this chip ...

>  drivers/mtd/spi-nor/spi-nor.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 171adb3..bfff159 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>  	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
>  	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
>  	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
> +	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64, SECT_4K) },
>  	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
> 


-- 
Best regards,
Marek Vasut

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f
  2016-12-21  7:33   ` Marek Vasut
@ 2016-12-21  7:36     ` John Crispin
  2016-12-21  8:11     ` André Valentin
  1 sibling, 0 replies; 17+ messages in thread
From: John Crispin @ 2016-12-21  7:36 UTC (permalink / raw)
  To: Marek Vasut, Cyrille Pitchen; +Cc: linux-mtd, linux-kernel, André Valentin



On 21/12/2016 08:33, Marek Vasut wrote:
> On 12/21/2016 08:23 AM, John Crispin wrote:
>> From: André Valentin <avalentin@marcant.net>
>>
>> This patch adds support for a new macronix spi flash chip. We have had this
>> patch inside our tree for a while and people are actively using routers
>> with this chip.
>>
>> Signed-off-by: John Crispin <john@phrozen.org>
>> Signed-off-by: André Valentin <avalentin@marcant.net>
>> ---
>> Changes in V2
>> * add description
>> * add SECT_4K
>> * fix indenting
> 
> Are you SURE this chip can do sect_4k ? The datasheet seems to imply
> that, but I wonder why it wasn't in V1 of this patch then ? Esp. if
> people are actively using this chip ...

i checked the datasheet just now and it says 4K sectors are supported.
generally we cannot runtime test every patch that we receive but need to
rely on the testing of the submitter. lets see what André has to say.

	John
> 
>>  drivers/mtd/spi-nor/spi-nor.c |    1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index 171adb3..bfff159 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>>  	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
>>  	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
>>  	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
>> +	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64, SECT_4K) },
>>  	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
>>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
>>
> 
> 

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f
  2016-12-21  7:33   ` Marek Vasut
  2016-12-21  7:36     ` John Crispin
@ 2016-12-21  8:11     ` André Valentin
  2016-12-21  8:18       ` John Crispin
  1 sibling, 1 reply; 17+ messages in thread
From: André Valentin @ 2016-12-21  8:11 UTC (permalink / raw)
  To: Marek Vasut, John Crispin, Cyrille Pitchen; +Cc: linux-mtd, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 1724 bytes --]

Hi!

I took these values from the manufacturer SDK (Qualcomm). I could not detect any problems with the setting.

Kind regards,

André

Am 21.12.2016 um 08:33 schrieb Marek Vasut:
> On 12/21/2016 08:23 AM, John Crispin wrote:
>> From: André Valentin <avalentin@marcant.net>
>>
>> This patch adds support for a new macronix spi flash chip. We have had this
>> patch inside our tree for a while and people are actively using routers
>> with this chip.
>>
>> Signed-off-by: John Crispin <john@phrozen.org>
>> Signed-off-by: André Valentin <avalentin@marcant.net>
>> ---
>> Changes in V2
>> * add description
>> * add SECT_4K
>> * fix indenting
> 
> Are you SURE this chip can do sect_4k ? The datasheet seems to imply
> that, but I wonder why it wasn't in V1 of this patch then ? Esp. if
> people are actively using this chip ...
> 
>>  drivers/mtd/spi-nor/spi-nor.c |    1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index 171adb3..bfff159 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>>  	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
>>  	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
>>  	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
>> +	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64, SECT_4K) },
>>  	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
>>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
>>
> 
> 


[-- Attachment #2: S/MIME Cryptographic Signature --]
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^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f
  2016-12-21  8:11     ` André Valentin
@ 2016-12-21  8:18       ` John Crispin
  2016-12-21 10:07         ` Marek Vasut
  0 siblings, 1 reply; 17+ messages in thread
From: John Crispin @ 2016-12-21  8:18 UTC (permalink / raw)
  To: André Valentin, Marek Vasut, Cyrille Pitchen; +Cc: linux-mtd, linux-kernel

Hi André

could you test if it also works when enabling SECT_4K please ?

	John

On 21/12/2016 09:11, André Valentin wrote:
> Hi!
> 
> I took these values from the manufacturer SDK (Qualcomm). I could not detect any problems with the setting.
> 
> Kind regards,
> 
> André
> 
> Am 21.12.2016 um 08:33 schrieb Marek Vasut:
>> On 12/21/2016 08:23 AM, John Crispin wrote:
>>> From: André Valentin <avalentin@marcant.net>
>>>
>>> This patch adds support for a new macronix spi flash chip. We have had this
>>> patch inside our tree for a while and people are actively using routers
>>> with this chip.
>>>
>>> Signed-off-by: John Crispin <john@phrozen.org>
>>> Signed-off-by: André Valentin <avalentin@marcant.net>
>>> ---
>>> Changes in V2
>>> * add description
>>> * add SECT_4K
>>> * fix indenting
>>
>> Are you SURE this chip can do sect_4k ? The datasheet seems to imply
>> that, but I wonder why it wasn't in V1 of this patch then ? Esp. if
>> people are actively using this chip ...
>>
>>>  drivers/mtd/spi-nor/spi-nor.c |    1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>>> index 171adb3..bfff159 100644
>>> --- a/drivers/mtd/spi-nor/spi-nor.c
>>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>>> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>>>  	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
>>>  	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
>>>  	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
>>> +	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64, SECT_4K) },
>>>  	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
>>>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>>>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
>>>
>>
>>
> 

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f
  2016-12-21  8:18       ` John Crispin
@ 2016-12-21 10:07         ` Marek Vasut
  2016-12-21 10:13           ` John Crispin
  0 siblings, 1 reply; 17+ messages in thread
From: Marek Vasut @ 2016-12-21 10:07 UTC (permalink / raw)
  To: John Crispin, André Valentin, Cyrille Pitchen
  Cc: linux-mtd, linux-kernel

On 12/21/2016 09:18 AM, John Crispin wrote:
> Hi André
> 
> could you test if it also works when enabling SECT_4K please ?

Yes, please test, thanks.

btw please do stop top-posting.

> 	John
> 
> On 21/12/2016 09:11, André Valentin wrote:
>> Hi!
>>
>> I took these values from the manufacturer SDK (Qualcomm). I could not detect any problems with the setting.
>>
>> Kind regards,
>>
>> André
>>
>> Am 21.12.2016 um 08:33 schrieb Marek Vasut:
>>> On 12/21/2016 08:23 AM, John Crispin wrote:
>>>> From: André Valentin <avalentin@marcant.net>
>>>>
>>>> This patch adds support for a new macronix spi flash chip. We have had this
>>>> patch inside our tree for a while and people are actively using routers
>>>> with this chip.
>>>>
>>>> Signed-off-by: John Crispin <john@phrozen.org>
>>>> Signed-off-by: André Valentin <avalentin@marcant.net>
>>>> ---
>>>> Changes in V2
>>>> * add description
>>>> * add SECT_4K
>>>> * fix indenting
>>>
>>> Are you SURE this chip can do sect_4k ? The datasheet seems to imply
>>> that, but I wonder why it wasn't in V1 of this patch then ? Esp. if
>>> people are actively using this chip ...
>>>
>>>>  drivers/mtd/spi-nor/spi-nor.c |    1 +
>>>>  1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>>>> index 171adb3..bfff159 100644
>>>> --- a/drivers/mtd/spi-nor/spi-nor.c
>>>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>>>> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>>>>  	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
>>>>  	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
>>>>  	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
>>>> +	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64, SECT_4K) },
>>>>  	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
>>>>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>>>>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
>>>>
>>>
>>>
>>


-- 
Best regards,
Marek Vasut

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f
  2016-12-21 10:07         ` Marek Vasut
@ 2016-12-21 10:13           ` John Crispin
  0 siblings, 0 replies; 17+ messages in thread
From: John Crispin @ 2016-12-21 10:13 UTC (permalink / raw)
  To: Marek Vasut, André Valentin, Cyrille Pitchen; +Cc: linux-mtd, linux-kernel



On 21/12/2016 11:07, Marek Vasut wrote:
> On 12/21/2016 09:18 AM, John Crispin wrote:
>> Hi André
>>
>> could you test if it also works when enabling SECT_4K please ?
> 
> Yes, please test, thanks.
> 
> btw please do stop top-posting.
> 
>> 	John
>>

Sorry about top posting. André will need a bit of time to test so i will
send a V3 with only the other 2 patches included today and then send
this patch later once tested.

	John

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f
  2016-12-21  7:23 ` [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f John Crispin
  2016-12-21  7:33   ` Marek Vasut
@ 2016-12-21 10:27   ` Cyrille Pitchen
  2016-12-21 13:16     ` John Crispin
  1 sibling, 1 reply; 17+ messages in thread
From: Cyrille Pitchen @ 2016-12-21 10:27 UTC (permalink / raw)
  To: John Crispin, Marek Vasut; +Cc: linux-mtd, linux-kernel, André Valentin

Hi all,

Le 21/12/2016 à 08:23, John Crispin a écrit :
> From: André Valentin <avalentin@marcant.net>
> 
> This patch adds support for a new macronix spi flash chip. We have had this
> patch inside our tree for a while and people are actively using routers
> with this chip.
> 
> Signed-off-by: John Crispin <john@phrozen.org>
> Signed-off-by: André Valentin <avalentin@marcant.net>
> ---
> Changes in V2
> * add description
> * add SECT_4K
> * fix indenting
> 
>  drivers/mtd/spi-nor/spi-nor.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 171adb3..bfff159 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>  	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
>  	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
>  	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
> +	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64, SECT_4K) },

According to its datasheet, the Macronix MX25U3235F also supports Fast Read
1-1-2 (3Bh) and Fast Read 1-1-4 (EBh) hence the SPI_NOR_DUAL_READ
and SPI_NOR_QUAD_READ flags should be set as well.

Best regards,

Cyrille

>  	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
> 

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 1/3] mtd: spi-nor: add support for macronix mx25u25635f
  2016-12-21  7:23 ` [PATCH V2 1/3] mtd: spi-nor: add support for macronix mx25u25635f John Crispin
  2016-12-21  7:32   ` Marek Vasut
@ 2016-12-21 10:41   ` Cyrille Pitchen
  1 sibling, 0 replies; 17+ messages in thread
From: Cyrille Pitchen @ 2016-12-21 10:41 UTC (permalink / raw)
  To: John Crispin, Marek Vasut; +Cc: linux-mtd, linux-kernel, Ash Benz

Hi all,

Le 21/12/2016 à 08:23, John Crispin a écrit :
> From: Ash Benz <ash.benz@bk.ru>
> 
> This patch adds support for a new macronix spi flash chip. We have had this
> patch inside our tree for a while and people are actively using routers
> with this chip.
> 
> Signed-off-by: John Crispin <john@phrozen.org>
> Signed-off-by: Ash Benz <ash.benz@bk.ru>
> ---
> Changes in V2
> * add description
> 
>  drivers/mtd/spi-nor/spi-nor.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index d0fc165..171adb3 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -872,6 +872,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
>  	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
> +	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, 0) },

According to its datasheet, the Macronix MX25U25635F, like the MX25U3235F,
supports Fast Read 1-1-2 (3Bh) and Fast Read 1-1-4 (6Bh) hence both
SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ flags should be set too.

Also extracted from the datasheet:
"Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or
Equal Blocks with 64K byte each"

Sector Erase 4K (20h) is supported hence the SECT_4K flag.

Best regards,

Cyrille


>  	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
>  	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) },
>  	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },
> 

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f
  2016-12-21 10:27   ` Cyrille Pitchen
@ 2016-12-21 13:16     ` John Crispin
  2016-12-21 13:38       ` Cyrille Pitchen
  0 siblings, 1 reply; 17+ messages in thread
From: John Crispin @ 2016-12-21 13:16 UTC (permalink / raw)
  To: Cyrille Pitchen, Marek Vasut; +Cc: linux-mtd, linux-kernel, André Valentin



On 21/12/2016 11:27, Cyrille Pitchen wrote:
> Hi all,
> 
> Le 21/12/2016 à 08:23, John Crispin a écrit :
>> From: André Valentin <avalentin@marcant.net>
>>
>> This patch adds support for a new macronix spi flash chip. We have had this
>> patch inside our tree for a while and people are actively using routers
>> with this chip.
>>
>> Signed-off-by: John Crispin <john@phrozen.org>
>> Signed-off-by: André Valentin <avalentin@marcant.net>
>> ---
>> Changes in V2
>> * add description
>> * add SECT_4K
>> * fix indenting
>>
>>  drivers/mtd/spi-nor/spi-nor.c |    1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index 171adb3..bfff159 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>>  	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
>>  	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
>>  	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
>> +	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64, SECT_4K) },
> 
> According to its datasheet, the Macronix MX25U3235F also supports Fast Read
> 1-1-2 (3Bh) and Fast Read 1-1-4 (EBh) hence the SPI_NOR_DUAL_READ
> and SPI_NOR_QUAD_READ flags should be set as well.
> 
> Best regards,
> 
> Cyrille

Hi Cyrille,

thanks for the help, I'll update the patches and get the original
submitters to test them before resending the series

	John

> 
>>  	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
>>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
>>
> 

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f
  2016-12-21 13:16     ` John Crispin
@ 2016-12-21 13:38       ` Cyrille Pitchen
  0 siblings, 0 replies; 17+ messages in thread
From: Cyrille Pitchen @ 2016-12-21 13:38 UTC (permalink / raw)
  To: John Crispin, Marek Vasut; +Cc: linux-mtd, linux-kernel, André Valentin

Le 21/12/2016 à 14:16, John Crispin a écrit :
> 
> 
> On 21/12/2016 11:27, Cyrille Pitchen wrote:
>> Hi all,
>>
>> Le 21/12/2016 à 08:23, John Crispin a écrit :
>>> From: André Valentin <avalentin@marcant.net>
>>>
>>> This patch adds support for a new macronix spi flash chip. We have had this
>>> patch inside our tree for a while and people are actively using routers
>>> with this chip.
>>>
>>> Signed-off-by: John Crispin <john@phrozen.org>
>>> Signed-off-by: André Valentin <avalentin@marcant.net>
>>> ---
>>> Changes in V2
>>> * add description
>>> * add SECT_4K
>>> * fix indenting
>>>
>>>  drivers/mtd/spi-nor/spi-nor.c |    1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>>> index 171adb3..bfff159 100644
>>> --- a/drivers/mtd/spi-nor/spi-nor.c
>>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>>> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>>>  	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
>>>  	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
>>>  	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
>>> +	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64, SECT_4K) },
>>
>> According to its datasheet, the Macronix MX25U3235F also supports Fast Read
>> 1-1-2 (3Bh) and Fast Read 1-1-4 (EBh) hence the SPI_NOR_DUAL_READ
>> and SPI_NOR_QUAD_READ flags should be set as well.
>>
>> Best regards,
>>
>> Cyrille
> 
> Hi Cyrille,
> 
> thanks for the help, I'll update the patches and get the original
> submitters to test them before resending the series
> 
> 	John
>

If they could test easily it's always a good thing. For 4K erase it should
be pretty straight forward but for dual and quad fast reads it depends on
the SPI controller hardware capabilities, whether the IO2 and IO3 lines are
physically connected to the relevant memory pins... So if it is too
difficult to find a proper board to do the tests, just tell us :)

Anyway, with Macronix memories, we don't take that much risk setting the
dual/quad flags referring only to the datasheet. For instance, we already
know that the Fast Read 1-y-4 commands work with Macronix mx25l25673g, so
it's very likely to work the same with mx25u*35f parts.

Still reading the datasheet, I've already checked the number of dummy
cycles needed with the factory settings: 8 dummy clock cycles (mode cycles
included) for both Fast Read 1-1-4 and Fast Read 1-1-2.

Best regards,

Cyrille


>>
>>>  	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
>>>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>>>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
>>>
>>
> 

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 3/3] mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa
  2016-12-21  7:23 ` [PATCH V2 3/3] mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa John Crispin
@ 2017-01-30 13:04   ` Cyrille Pitchen
  2017-02-14 11:49     ` Rafał Miłecki
  0 siblings, 1 reply; 17+ messages in thread
From: Cyrille Pitchen @ 2017-01-30 13:04 UTC (permalink / raw)
  To: John Crispin, Marek Vasut; +Cc: linux-mtd, linux-kernel, Larry D. Pinney

Hi all,

Le 21/12/2016 à 08:23, John Crispin a écrit :
> From: "Larry D. Pinney" <ldpinney@gmail.com>
> 
> Add Support for the ESMT_F25L32QA and ESMT_F25L64QA
> These are 4MB and 8MB SPI NOR Chips from Elite Semiconductor Memory
> Technology
> 
> Acked-by: Marek Vasut <marex@denx.de>
> Signed-off-by: John Crispin <john@phrozen.org>
> Signed-off-by: Larry D. Pinney <ldpinney@gmail.com>
> ---
>  drivers/mtd/spi-nor/spi-nor.c |    2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index bfff159..2b150b5 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -821,6 +821,8 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>  
>  	/* ESMT */
>  	{ "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SECT_4K) },
> +	{ "f25l32qa", INFO(0x8c4116, 0, 64 * 1024, 64, SECT_4K) },
> +	{ "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128, SECT_4K) },
>  

This patch cannot be applied to the github spi-nor tree.
Another recent patch [1] has updated the "f25l32pa" entry to add the
SPI_NOR_HAS_LOCK flag. I guess the "f25l{32|64}qa" entries need this flag
as well.

[1] on the spi-nor tree, commit 252c36bb9c7b ("mtd: spi-nor: Add
lock/unlock support for f25l32pa")

Best regards,

Cyrille


>  	/* Everspin */
>  	{ "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
> 

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH V2 3/3] mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa
  2017-01-30 13:04   ` Cyrille Pitchen
@ 2017-02-14 11:49     ` Rafał Miłecki
  0 siblings, 0 replies; 17+ messages in thread
From: Rafał Miłecki @ 2017-02-14 11:49 UTC (permalink / raw)
  To: Cyrille Pitchen, John Crispin, Marek Vasut
  Cc: linux-mtd, linux-kernel, Larry D. Pinney

On 01/30/2017 02:04 PM, Cyrille Pitchen wrote:
> Le 21/12/2016 à 08:23, John Crispin a écrit :
>> From: "Larry D. Pinney" <ldpinney@gmail.com>
>>
>> Add Support for the ESMT_F25L32QA and ESMT_F25L64QA
>> These are 4MB and 8MB SPI NOR Chips from Elite Semiconductor Memory
>> Technology
>>
>> Acked-by: Marek Vasut <marex@denx.de>
>> Signed-off-by: John Crispin <john@phrozen.org>
>> Signed-off-by: Larry D. Pinney <ldpinney@gmail.com>
>> ---
>>  drivers/mtd/spi-nor/spi-nor.c |    2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index bfff159..2b150b5 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -821,6 +821,8 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>>
>>  	/* ESMT */
>>  	{ "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SECT_4K) },
>> +	{ "f25l32qa", INFO(0x8c4116, 0, 64 * 1024, 64, SECT_4K) },
>> +	{ "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128, SECT_4K) },
>>
>
> This patch cannot be applied to the github spi-nor tree.
> Another recent patch [1] has updated the "f25l32pa" entry to add the
> SPI_NOR_HAS_LOCK flag. I guess the "f25l{32|64}qa" entries need this flag
> as well.
>
> [1] on the spi-nor tree, commit 252c36bb9c7b ("mtd: spi-nor: Add
> lock/unlock support for f25l32pa")

Hi Larry, I just realized you never resent rebased patch.

Can you do this, please?

^ permalink raw reply	[flat|nested] 17+ messages in thread

end of thread, other threads:[~2017-02-14 11:50 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-12-21  7:23 [PATCH V2 0/3] mtd: spi-nor: add some new chip ids John Crispin
2016-12-21  7:23 ` [PATCH V2 1/3] mtd: spi-nor: add support for macronix mx25u25635f John Crispin
2016-12-21  7:32   ` Marek Vasut
2016-12-21 10:41   ` Cyrille Pitchen
2016-12-21  7:23 ` [PATCH V2 2/3] mtd: spi-nor: add support for macronix mx25u3235f John Crispin
2016-12-21  7:33   ` Marek Vasut
2016-12-21  7:36     ` John Crispin
2016-12-21  8:11     ` André Valentin
2016-12-21  8:18       ` John Crispin
2016-12-21 10:07         ` Marek Vasut
2016-12-21 10:13           ` John Crispin
2016-12-21 10:27   ` Cyrille Pitchen
2016-12-21 13:16     ` John Crispin
2016-12-21 13:38       ` Cyrille Pitchen
2016-12-21  7:23 ` [PATCH V2 3/3] mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa John Crispin
2017-01-30 13:04   ` Cyrille Pitchen
2017-02-14 11:49     ` Rafał Miłecki

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