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From: Wu Hao <hao.wu@intel.com>
To: atull@kernel.org, mdf@kernel.org, linux-fpga@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: linux-api@vger.kernel.org, luwei.kang@intel.com,
	yi.z.zhang@intel.com, hao.wu@intel.com
Subject: [PATCH v3 03/21] fpga: mgr: add status for fpga-manager
Date: Mon, 27 Nov 2017 14:42:10 +0800	[thread overview]
Message-ID: <1511764948-20972-4-git-send-email-hao.wu@intel.com> (raw)
In-Reply-To: <1511764948-20972-1-git-send-email-hao.wu@intel.com>

This patch adds status to fpga-manager data structure, to allow
driver to store full/partial reconfiguration errors and other
status information, and adds one status callback to fpga_manager_ops
to allow fpga_manager to collect latest status when failures are
detected.

The following sysfs file is created:
* /sys/class/fpga_manager/<fpga>/status
  Return status of fpga manager, including reconfiguration errors.

Signed-off-by: Wu Hao <hao.wu@intel.com>
----
v3: add one line description for status
    add status callback function to fpga_manager_ops
    update fpga-mgr status if any failure or during initialization
    s/INCOMPATIBLE_BS_ERR/INCOMPATIBLE_IMAGE_ERR/
---
 Documentation/ABI/testing/sysfs-class-fpga-manager | 10 ++++++++
 drivers/fpga/fpga-mgr.c                            | 28 ++++++++++++++++++++++
 include/linux/fpga/fpga-mgr.h                      | 17 +++++++++++++
 3 files changed, 55 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-class-fpga-manager b/Documentation/ABI/testing/sysfs-class-fpga-manager
index 23056c5..01db14d 100644
--- a/Documentation/ABI/testing/sysfs-class-fpga-manager
+++ b/Documentation/ABI/testing/sysfs-class-fpga-manager
@@ -35,3 +35,13 @@ Description:	Read fpga manager state as a string.
 		* write complete	= Doing post programming steps
 		* write complete error	= Error while doing post programming
 		* operating		= FPGA is programmed and operating
+
+What:		/sys/class/fpga_manager/<fpga>/status
+Date:		November 2017
+KernelVersion:	4.15
+Contact:	Wu Hao <hao.wu@intel.com>
+Description:	Read fpga manager status as a string.
+		If FPGA programming operation fails, it could be due to crc
+		error or incompatible bitstream image. The intent of this
+		interface is to provide more detailed information for FPGA
+		programming errors to userspace.
diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c
index 1fd5494..8b583ba 100644
--- a/drivers/fpga/fpga-mgr.c
+++ b/drivers/fpga/fpga-mgr.c
@@ -88,6 +88,7 @@ static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
 	if (ret) {
 		dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
 		mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
+		fpga_mgr_update_status(mgr);
 		return ret;
 	}
 
@@ -148,6 +149,7 @@ static int fpga_mgr_write_complete(struct fpga_manager *mgr,
 	if (ret) {
 		dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
 		mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
+		fpga_mgr_update_status(mgr);
 		return ret;
 	}
 	mgr->state = FPGA_MGR_STATE_OPERATING;
@@ -225,6 +227,7 @@ static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
 	if (ret) {
 		dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
 		mgr->state = FPGA_MGR_STATE_WRITE_ERR;
+		fpga_mgr_update_status(mgr);
 		return ret;
 	}
 
@@ -397,12 +400,36 @@ static ssize_t state_show(struct device *dev,
 	return sprintf(buf, "%s\n", state_str[mgr->state]);
 }
 
+static ssize_t status_show(struct device *dev,
+			   struct device_attribute *attr, char *buf)
+{
+	struct fpga_manager *mgr = to_fpga_manager(dev);
+	int len = 0;
+
+	if (mgr->status & FPGA_MGR_STATUS_OPERATION_ERR)
+		len += sprintf(buf + len, "reconfig operation error\n");
+	if (mgr->status & FPGA_MGR_STATUS_CRC_ERR)
+		len += sprintf(buf + len, "reconfig CRC error\n");
+	if (mgr->status & FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR)
+		len += sprintf(buf + len, "reconfig incompatible image\n");
+	if (mgr->status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
+		len += sprintf(buf + len, "reconfig IP protocol error\n");
+	if (mgr->status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
+		len += sprintf(buf + len, "reconfig fifo overflow error\n");
+	if (mgr->status & FPGA_MGR_STATUS_SECURE_LOAD_ERR)
+		len += sprintf(buf + len, "reconfig secure load error\n");
+
+	return len;
+}
+
 static DEVICE_ATTR_RO(name);
 static DEVICE_ATTR_RO(state);
+static DEVICE_ATTR_RO(status);
 
 static struct attribute *fpga_mgr_attrs[] = {
 	&dev_attr_name.attr,
 	&dev_attr_state.attr,
+	&dev_attr_status.attr,
 	NULL,
 };
 ATTRIBUTE_GROUPS(fpga_mgr);
@@ -561,6 +588,7 @@ int fpga_mgr_register(struct fpga_manager *mgr)
 	 * by bootloader or EEPROM.
 	 */
 	mgr->state = mgr->mops->state(mgr);
+	fpga_mgr_update_status(mgr);
 
 	device_initialize(&mgr->dev);
 	mgr->dev.class = fpga_mgr_class;
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index 6e98b66..d4faf3d 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -112,6 +112,7 @@ struct fpga_image_info {
  * struct fpga_manager_ops - ops for low level fpga manager drivers
  * @initial_header_size: Maximum number of bytes that should be passed into write_init
  * @state: returns an enum value of the FPGA's state
+ * @status: returns status of the FPGA, including reconfiguration error code
  * @write_init: prepare the FPGA to receive confuration data
  * @write: write count bytes of configuration data to the FPGA
  * @write_sg: write the scatter list of configuration data to the FPGA
@@ -126,6 +127,7 @@ struct fpga_image_info {
 struct fpga_manager_ops {
 	size_t initial_header_size;
 	enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
+	u64 (*status)(struct fpga_manager *mgr);
 	int (*write_init)(struct fpga_manager *mgr,
 			  struct fpga_image_info *info,
 			  const char *buf, size_t count);
@@ -137,6 +139,14 @@ struct fpga_manager_ops {
 	const struct attribute_group **groups;
 };
 
+/* FPGA manager status: Partial/Full Reconfiguration errors */
+#define FPGA_MGR_STATUS_OPERATION_ERR		BIT(0)
+#define FPGA_MGR_STATUS_CRC_ERR			BIT(1)
+#define FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR	BIT(2)
+#define FPGA_MGR_STATUS_IP_PROTOCOL_ERR		BIT(3)
+#define FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR	BIT(4)
+#define FPGA_MGR_STATUS_SECURE_LOAD_ERR		BIT(5)
+
 /**
  * struct fpga_manager - fpga manager structure
  * @name: name of low level fpga manager
@@ -144,6 +154,7 @@ struct fpga_manager_ops {
  * @dev: fpga manager device
  * @ref_mutex: only allows one reference to fpga manager
  * @state: state of fpga manager
+ * @status: status of fpga manager, including reconfiguration error.
  * @mops: pointer to struct of fpga manager ops
  * @priv: low level driver private date
  */
@@ -153,6 +164,7 @@ struct fpga_manager {
 	struct device dev;
 	struct mutex ref_mutex;
 	enum fpga_mgr_states state;
+	u64 status;
 	const struct fpga_manager_ops *mops;
 	void *priv;
 };
@@ -177,4 +189,9 @@ struct fpga_manager {
 int fpga_mgr_register(struct fpga_manager *mgr);
 void fpga_mgr_unregister(struct fpga_manager *mgr);
 
+static inline void fpga_mgr_update_status(struct fpga_manager *mgr)
+{
+	if (mgr->mops->status)
+		mgr->status = mgr->mops->status(mgr);
+}
 #endif /*_LINUX_FPGA_MGR_H */
-- 
1.8.3.1

  parent reply	other threads:[~2017-11-27  6:52 UTC|newest]

Thread overview: 98+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-27  6:42 [PATCH v3 00/21] Intel FPGA Device Drivers Wu Hao
2017-11-27  6:42 ` [PATCH v3 01/21] docs: fpga: add a document for Intel FPGA driver overview Wu Hao
2017-12-04 19:55   ` Alan Tull
2017-12-05  3:57     ` Wu Hao
2017-12-06 10:04     ` David Laight
2017-12-20 22:31   ` Alan Tull
2017-12-21  6:02     ` Wu Hao
2017-11-27  6:42 ` [PATCH v3 02/21] fpga: mgr: add region_id to fpga_image_info Wu Hao
2017-11-29  6:11   ` Moritz Fischer
2017-12-04 20:26     ` Alan Tull
2017-12-05  3:36       ` Wu Hao
2018-01-31 15:35         ` Alan Tull
2018-02-01  5:05           ` Wu Hao
2017-11-27  6:42 ` Wu Hao [this message]
2017-12-04 20:55   ` [PATCH v3 03/21] fpga: mgr: add status for fpga-manager Alan Tull
2017-12-05  4:08     ` Wu Hao
2017-12-12 18:18   ` Alan Tull
2017-12-13  4:48     ` Wu Hao
2017-11-27  6:42 ` [PATCH v3 04/21] fpga: add device feature list support Wu Hao
2017-11-29  6:07   ` Moritz Fischer
2017-11-30  5:59     ` Wu Hao
2017-12-20 22:29   ` Alan Tull
2017-12-21  0:58     ` Alan Tull
2017-12-21  7:22       ` Wu Hao
2017-12-22  8:45         ` Wu Hao
2018-01-31 23:22           ` Alan Tull
2017-11-27  6:42 ` [PATCH v3 05/21] fpga: dfl: add chardev support for feature devices Wu Hao
2017-11-27  6:42 ` [PATCH v3 06/21] fpga: dfl: adds fpga_cdev_find_port Wu Hao
2018-02-05 22:08   ` Alan Tull
2018-02-06  2:37     ` Wu Hao
2017-11-27  6:42 ` [PATCH v3 07/21] fpga: dfl: add feature device infrastructure Wu Hao
2017-11-27  6:42 ` [PATCH v3 08/21] fpga: add Intel FPGA DFL PCIe device Wu Hao
2017-11-27 10:28   ` David Laight
2017-11-28  3:15     ` Wu Hao
2017-12-04 19:46       ` Alan Tull
2017-12-05  3:33         ` Wu Hao
2017-12-05 17:00           ` Alan Tull
2017-12-06  5:30             ` Wu Hao
2017-12-06  9:44               ` David Laight
2017-12-06 15:29                 ` Alan Tull
2017-12-06 16:28                   ` David Laight
2017-12-06 22:39                     ` Alan Tull
2018-02-01 21:59               ` Alan Tull
2018-02-13  9:36                 ` Wu Hao
2017-12-06  9:34           ` David Laight
2017-12-07  3:47             ` Wu Hao
2017-12-06  9:31         ` David Laight
2017-11-27  6:42 ` [PATCH v3 09/21] fpga: intel-dfl-pci: add enumeration for feature devices Wu Hao
2017-12-07 21:41   ` Alan Tull
2017-12-08  9:25     ` Wu Hao
2017-11-27  6:42 ` [PATCH v3 10/21] fpga: dfl: add FPGA Management Engine driver basic framework Wu Hao
2017-11-27  6:42 ` [PATCH v3 11/21] fpga: dfl: fme: add header sub feature support Wu Hao
2018-02-12 16:51   ` Alan Tull
2018-02-13  3:44     ` Wu Hao
2017-11-27  6:42 ` [PATCH v3 12/21] fpga: dfl: fme: add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-01-31 15:31   ` Alan Tull
2018-02-01  5:11     ` Wu Hao
2018-02-01 15:11       ` Moritz Fischer
2017-11-27  6:42 ` [PATCH v3 13/21] fpga: dfl: fme: add partial reconfiguration sub feature support Wu Hao
2017-11-27  6:42 ` [PATCH v3 14/21] fpga: dfl: add fpga manager platform driver for FME Wu Hao
2018-02-01 22:00   ` Alan Tull
2018-02-02  9:42     ` Wu Hao
2018-02-03  0:26       ` Luebbers, Enno
2018-02-03 10:41         ` Moritz Fischer
2018-02-04 10:05           ` Wu Hao
2018-02-05 17:21             ` Alan Tull
2018-02-06  2:17               ` Wu Hao
2018-02-06  4:25                 ` Alan Tull
2018-02-06  5:23                   ` Wu Hao
2018-02-06  6:44                   ` Moritz Fischer
2018-02-04  9:37         ` Wu Hao
2018-02-05 18:36           ` Luebbers, Enno
2018-02-06  1:47             ` Wu Hao
2018-02-06  4:25               ` Alan Tull
2018-02-06  6:47                 ` Wu Hao
2018-02-06 18:53                   ` Alan Tull
2018-02-07  4:52                     ` Wu Hao
2018-02-07 22:37                       ` Alan Tull
2017-11-27  6:42 ` [PATCH v3 15/21] fpga: dfl: add fpga bridge " Wu Hao
2018-01-31 15:16   ` Alan Tull
2018-02-01  5:15     ` Wu Hao
2018-02-01 15:11       ` Moritz Fischer
2017-11-27  6:42 ` [PATCH v3 16/21] fpga: dfl: add fpga region " Wu Hao
2018-01-31 20:46   ` Alan Tull
2018-02-01  5:23     ` Wu Hao
2018-02-01 15:13       ` Moritz Fischer
2017-11-27  6:42 ` [PATCH v3 17/21] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2017-11-27  6:42 ` [PATCH v3 18/21] fpga: dfl: afu: add header sub feature support Wu Hao
2018-02-12 17:43   ` Alan Tull
2018-02-13  3:33     ` Wu Hao
2017-11-27  6:42 ` [PATCH v3 19/21] fpga: dfl: afu: add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-01-31 14:52   ` Alan Tull
2018-02-01  5:16     ` Wu Hao
2018-02-01 15:13       ` Moritz Fischer
2018-02-02  9:08         ` Wu Hao
2017-11-27  6:42 ` [PATCH v3 20/21] fpga: dfl: afu: add user afu sub feature support Wu Hao
2017-11-27  6:42 ` [PATCH v3 21/21] fpga: dfl: afu: add FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2017-11-27 21:26 ` [PATCH v3 00/21] Intel FPGA Device Drivers Alan Tull

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