From: Wu Hao <hao.wu@intel.com>
To: Alan Tull <atull@kernel.org>
Cc: David Laight <David.Laight@aculab.com>,
"mdf@kernel.org" <mdf@kernel.org>,
"linux-fpga@vger.kernel.org" <linux-fpga@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-api@vger.kernel.org" <linux-api@vger.kernel.org>,
"luwei.kang@intel.com" <luwei.kang@intel.com>,
"yi.z.zhang@intel.com" <yi.z.zhang@intel.com>,
Tim Whisonant <tim.whisonant@intel.com>,
Enno Luebbers <enno.luebbers@intel.com>,
Shiva Rao <shiva.rao@intel.com>,
Christopher Rauer <christopher.rauer@intel.com>,
Xiao Guangrong <guangrong.xiao@linux.intel.com>
Subject: Re: [PATCH v3 08/21] fpga: add Intel FPGA DFL PCIe device
Date: Wed, 6 Dec 2017 13:30:15 +0800 [thread overview]
Message-ID: <20171206053015.GA19023@hao-dev> (raw)
In-Reply-To: <CANk1AXRdU6usqtsCUjjSC8Fk2SS8iKn+Ow4PvCiRpSBAcDwWjw@mail.gmail.com>
On Tue, Dec 05, 2017 at 11:00:22AM -0600, Alan Tull wrote:
> On Mon, Dec 4, 2017 at 9:33 PM, Wu Hao <hao.wu@intel.com> wrote:
> > On Mon, Dec 04, 2017 at 01:46:59PM -0600, Alan Tull wrote:
> >> On Mon, Nov 27, 2017 at 9:15 PM, Wu Hao <hao.wu@intel.com> wrote:
> >> > On Mon, Nov 27, 2017 at 10:28:04AM +0000, David Laight wrote:
> >> >> From: Wu Hao
> >> >> > Sent: 27 November 2017 06:42
> >> >> > From: Zhang Yi <yi.z.zhang@intel.com>
> >> >> >
> >> >> > The Intel FPGA device appears as a PCIe device on the system. This patch
> >> >> > implements the basic framework of the driver for Intel PCIe device which
> >> >> > is located between CPU and Accelerated Function Units (AFUs), and has
> >> >> > the Device Feature List (DFL) implemented in its MMIO space.
> >> >>
> >> >> This ought to have a better name than 'Intel FPGA'.
> >> >> An fpga can be used for all sorts of things, this looks like
> >> >> a very specific architecture using a common VHDL environment to
> >> >> allow certain types of user VHDL be accessed over PCIe.
> >> >
> >> > Hi David
> >> >
> >> > This patch adds a pcie device driver for Intel FPGA devices which implements
> >> > the DFL, e.g Intel Server Platform with In-package FPGA and Intel FPGA PCIe
> >> > Acceleration Cards. They are pcie devices, and all have DFL implemented in
> >> > the MMIO space, so we would like to use one kernel driver to handle them.
> >> >
> >> > With this full patchset, it just provides user the interfaces to configure
> >> > and access the FPGA accelerators on Intel DFL based FPGA devices. For sure,
> >> > users can develop and build their own logics via tools provided by Intel,
> >> > program them to accelerators on these Intel FPGA devices, and access them
> >> > for their workloads.
> >>
> >> I don't see anything Intel specific here. This could all be named dfl-*
> >
> > The maybe some device specific things, e.g Intel FPGA devices supported by this
> > driver always have FME DFL at the beginning on the BAR0 for PF device.
> >
> > But I think this should be the right direction for better code reuse, it could
> > save efforts for other vendors who want to use DFL and follow the same way.
> >
> > Thanks for the comments. I will rename this driver in the next version.
>
> Thanks!
>
> Regarding file names, it seems like the files added to drivers/fpga
> could be uniformly named dfl-*.[ch]. Some are fpga-dfl-*.[ch] while
> other are currently dfl-*.[ch] currently.
Sure, will have all related drivers files renamed to dfl-*.[ch].
Thanks
Hao
>
> Alan
>
> >
> > Hao
next prev parent reply other threads:[~2017-12-06 5:39 UTC|newest]
Thread overview: 98+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-27 6:42 [PATCH v3 00/21] Intel FPGA Device Drivers Wu Hao
2017-11-27 6:42 ` [PATCH v3 01/21] docs: fpga: add a document for Intel FPGA driver overview Wu Hao
2017-12-04 19:55 ` Alan Tull
2017-12-05 3:57 ` Wu Hao
2017-12-06 10:04 ` David Laight
2017-12-20 22:31 ` Alan Tull
2017-12-21 6:02 ` Wu Hao
2017-11-27 6:42 ` [PATCH v3 02/21] fpga: mgr: add region_id to fpga_image_info Wu Hao
2017-11-29 6:11 ` Moritz Fischer
2017-12-04 20:26 ` Alan Tull
2017-12-05 3:36 ` Wu Hao
2018-01-31 15:35 ` Alan Tull
2018-02-01 5:05 ` Wu Hao
2017-11-27 6:42 ` [PATCH v3 03/21] fpga: mgr: add status for fpga-manager Wu Hao
2017-12-04 20:55 ` Alan Tull
2017-12-05 4:08 ` Wu Hao
2017-12-12 18:18 ` Alan Tull
2017-12-13 4:48 ` Wu Hao
2017-11-27 6:42 ` [PATCH v3 04/21] fpga: add device feature list support Wu Hao
2017-11-29 6:07 ` Moritz Fischer
2017-11-30 5:59 ` Wu Hao
2017-12-20 22:29 ` Alan Tull
2017-12-21 0:58 ` Alan Tull
2017-12-21 7:22 ` Wu Hao
2017-12-22 8:45 ` Wu Hao
2018-01-31 23:22 ` Alan Tull
2017-11-27 6:42 ` [PATCH v3 05/21] fpga: dfl: add chardev support for feature devices Wu Hao
2017-11-27 6:42 ` [PATCH v3 06/21] fpga: dfl: adds fpga_cdev_find_port Wu Hao
2018-02-05 22:08 ` Alan Tull
2018-02-06 2:37 ` Wu Hao
2017-11-27 6:42 ` [PATCH v3 07/21] fpga: dfl: add feature device infrastructure Wu Hao
2017-11-27 6:42 ` [PATCH v3 08/21] fpga: add Intel FPGA DFL PCIe device Wu Hao
2017-11-27 10:28 ` David Laight
2017-11-28 3:15 ` Wu Hao
2017-12-04 19:46 ` Alan Tull
2017-12-05 3:33 ` Wu Hao
2017-12-05 17:00 ` Alan Tull
2017-12-06 5:30 ` Wu Hao [this message]
2017-12-06 9:44 ` David Laight
2017-12-06 15:29 ` Alan Tull
2017-12-06 16:28 ` David Laight
2017-12-06 22:39 ` Alan Tull
2018-02-01 21:59 ` Alan Tull
2018-02-13 9:36 ` Wu Hao
2017-12-06 9:34 ` David Laight
2017-12-07 3:47 ` Wu Hao
2017-12-06 9:31 ` David Laight
2017-11-27 6:42 ` [PATCH v3 09/21] fpga: intel-dfl-pci: add enumeration for feature devices Wu Hao
2017-12-07 21:41 ` Alan Tull
2017-12-08 9:25 ` Wu Hao
2017-11-27 6:42 ` [PATCH v3 10/21] fpga: dfl: add FPGA Management Engine driver basic framework Wu Hao
2017-11-27 6:42 ` [PATCH v3 11/21] fpga: dfl: fme: add header sub feature support Wu Hao
2018-02-12 16:51 ` Alan Tull
2018-02-13 3:44 ` Wu Hao
2017-11-27 6:42 ` [PATCH v3 12/21] fpga: dfl: fme: add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-01-31 15:31 ` Alan Tull
2018-02-01 5:11 ` Wu Hao
2018-02-01 15:11 ` Moritz Fischer
2017-11-27 6:42 ` [PATCH v3 13/21] fpga: dfl: fme: add partial reconfiguration sub feature support Wu Hao
2017-11-27 6:42 ` [PATCH v3 14/21] fpga: dfl: add fpga manager platform driver for FME Wu Hao
2018-02-01 22:00 ` Alan Tull
2018-02-02 9:42 ` Wu Hao
2018-02-03 0:26 ` Luebbers, Enno
2018-02-03 10:41 ` Moritz Fischer
2018-02-04 10:05 ` Wu Hao
2018-02-05 17:21 ` Alan Tull
2018-02-06 2:17 ` Wu Hao
2018-02-06 4:25 ` Alan Tull
2018-02-06 5:23 ` Wu Hao
2018-02-06 6:44 ` Moritz Fischer
2018-02-04 9:37 ` Wu Hao
2018-02-05 18:36 ` Luebbers, Enno
2018-02-06 1:47 ` Wu Hao
2018-02-06 4:25 ` Alan Tull
2018-02-06 6:47 ` Wu Hao
2018-02-06 18:53 ` Alan Tull
2018-02-07 4:52 ` Wu Hao
2018-02-07 22:37 ` Alan Tull
2017-11-27 6:42 ` [PATCH v3 15/21] fpga: dfl: add fpga bridge " Wu Hao
2018-01-31 15:16 ` Alan Tull
2018-02-01 5:15 ` Wu Hao
2018-02-01 15:11 ` Moritz Fischer
2017-11-27 6:42 ` [PATCH v3 16/21] fpga: dfl: add fpga region " Wu Hao
2018-01-31 20:46 ` Alan Tull
2018-02-01 5:23 ` Wu Hao
2018-02-01 15:13 ` Moritz Fischer
2017-11-27 6:42 ` [PATCH v3 17/21] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2017-11-27 6:42 ` [PATCH v3 18/21] fpga: dfl: afu: add header sub feature support Wu Hao
2018-02-12 17:43 ` Alan Tull
2018-02-13 3:33 ` Wu Hao
2017-11-27 6:42 ` [PATCH v3 19/21] fpga: dfl: afu: add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-01-31 14:52 ` Alan Tull
2018-02-01 5:16 ` Wu Hao
2018-02-01 15:13 ` Moritz Fischer
2018-02-02 9:08 ` Wu Hao
2017-11-27 6:42 ` [PATCH v3 20/21] fpga: dfl: afu: add user afu sub feature support Wu Hao
2017-11-27 6:42 ` [PATCH v3 21/21] fpga: dfl: afu: add FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2017-11-27 21:26 ` [PATCH v3 00/21] Intel FPGA Device Drivers Alan Tull
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171206053015.GA19023@hao-dev \
--to=hao.wu@intel.com \
--cc=David.Laight@aculab.com \
--cc=atull@kernel.org \
--cc=christopher.rauer@intel.com \
--cc=enno.luebbers@intel.com \
--cc=guangrong.xiao@linux.intel.com \
--cc=linux-api@vger.kernel.org \
--cc=linux-fpga@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=luwei.kang@intel.com \
--cc=mdf@kernel.org \
--cc=shiva.rao@intel.com \
--cc=tim.whisonant@intel.com \
--cc=yi.z.zhang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).