From: Krishna Yarlagadda <kyarlagadda@nvidia.com>
To: <gregkh@linuxfoundation.org>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <ldewangan@nvidia.com>, <jslaby@suse.com>
Cc: <linux-serial@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Shardar Shariff Md <smohammed@nvidia.com>,
Krishna Yarlagadda <kyarlagadda@nvidia.com>
Subject: [PATCH 10/14] serial: tegra: add support to use 8 bytes trigger
Date: Mon, 12 Aug 2019 16:58:19 +0530 [thread overview]
Message-ID: <1565609303-27000-11-git-send-email-kyarlagadda@nvidia.com> (raw)
In-Reply-To: <1565609303-27000-1-git-send-email-kyarlagadda@nvidia.com>
From: Shardar Shariff Md <smohammed@nvidia.com>
Add support to use 8 bytes trigger for Tegra186 SOC.
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
---
drivers/tty/serial/serial-tegra.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index 329923c..03d1d20 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -88,6 +88,7 @@ struct tegra_uart_chip_data {
bool support_clk_src_div;
bool fifo_mode_enable_status;
int uart_max_port;
+ int dma_burst_bytes;
};
struct tegra_uart_port {
@@ -933,7 +934,12 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup)
* programmed in the DMA registers.
*/
tup->fcr_shadow = UART_FCR_ENABLE_FIFO;
- tup->fcr_shadow |= UART_FCR_R_TRIG_01;
+
+ if (tup->cdata->dma_burst_bytes == 8)
+ tup->fcr_shadow |= UART_FCR_R_TRIG_10;
+ else
+ tup->fcr_shadow |= UART_FCR_R_TRIG_01;
+
tup->fcr_shadow |= TEGRA_UART_TX_TRIG_16B;
tegra_uart_write(tup, tup->fcr_shadow, UART_FCR);
@@ -1046,7 +1052,7 @@ static int tegra_uart_dma_channel_allocate(struct tegra_uart_port *tup,
}
dma_sconfig.src_addr = tup->uport.mapbase;
dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
- dma_sconfig.src_maxburst = 4;
+ dma_sconfig.src_maxburst = tup->cdata->dma_burst_bytes;
tup->rx_dma_chan = dma_chan;
tup->rx_dma_buf_virt = dma_buf;
tup->rx_dma_buf_phys = dma_phys;
@@ -1325,6 +1331,7 @@ static struct tegra_uart_chip_data tegra20_uart_chip_data = {
.support_clk_src_div = false,
.fifo_mode_enable_status = false,
.uart_max_port = 5,
+ .dma_burst_bytes = 4,
};
static struct tegra_uart_chip_data tegra30_uart_chip_data = {
@@ -1333,6 +1340,7 @@ static struct tegra_uart_chip_data tegra30_uart_chip_data = {
.support_clk_src_div = true,
.fifo_mode_enable_status = false,
.uart_max_port = 5,
+ .dma_burst_bytes = 4,
};
static struct tegra_uart_chip_data tegra186_uart_chip_data = {
@@ -1341,6 +1349,7 @@ static struct tegra_uart_chip_data tegra186_uart_chip_data = {
.support_clk_src_div = true,
.fifo_mode_enable_status = true,
.uart_max_port = 5,
+ .dma_burst_bytes = 8,
};
static const struct of_device_id tegra_uart_of_match[] = {
--
2.7.4
next prev parent reply other threads:[~2019-08-12 11:29 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-12 11:28 [PATCH 00/14] serial: tegra: Tegra186 support and fixes Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 01/14] serial: tegra: add internal loopback functionality Krishna Yarlagadda
2019-08-13 9:38 ` Thierry Reding
2019-08-12 11:28 ` [PATCH 02/14] serial: tegra: add support to ignore read Krishna Yarlagadda
2019-08-13 9:42 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 03/14] serial: tegra: avoid reg access when clk disabled Krishna Yarlagadda
2019-08-13 9:45 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 04/14] serial: tegra: protect IER against LCR.DLAB Krishna Yarlagadda
2019-08-13 9:46 ` Thierry Reding
2019-08-12 11:28 ` [PATCH 05/14] serial: tegra: flush the RX fifo on frame error Krishna Yarlagadda
2019-08-13 9:48 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 06/14] serial: tegra: report error to upper tty layer Krishna Yarlagadda
2019-08-13 9:52 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 07/14] serial: tegra: add compatible for new chips Krishna Yarlagadda
2019-08-13 9:55 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 08/14] serial: tegra: check for FIFO mode enabled status Krishna Yarlagadda
2019-08-13 10:03 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 09/14] serial: tegra: set maximum num of uart ports to 8 Krishna Yarlagadda
2019-08-13 10:19 ` Thierry Reding
2019-08-27 9:30 ` Krishna Yarlagadda
2019-08-12 11:28 ` Krishna Yarlagadda [this message]
2019-08-19 20:29 ` [PATCH 10/14] serial: tegra: add support to use 8 bytes trigger Jon Hunter
2019-08-27 9:31 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 11/14] serial: tegra: DT for Adjusted baud rates Krishna Yarlagadda
2019-08-13 10:24 ` Thierry Reding
2019-08-27 9:31 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 12/14] serial: tegra: add support to adjust baud rate Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 13/14] serial: tegra: report clk rate errors Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 14/14] serial: tegra: Add PIO mode support Krishna Yarlagadda
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