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From: Krishna Yarlagadda <kyarlagadda@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	"Laxman Dewangan" <ldewangan@nvidia.com>,
	"jslaby@suse.com" <jslaby@suse.com>,
	"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 11/14] serial: tegra: DT for Adjusted baud rates
Date: Tue, 27 Aug 2019 09:31:27 +0000	[thread overview]
Message-ID: <SN6PR12MB27349055DDF3C324B49E148EC3A00@SN6PR12MB2734.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20190813102448.GO1137@ulmo>

> -----Original Message-----
> From: Thierry Reding <thierry.reding@gmail.com>
> Sent: Tuesday, August 13, 2019 3:55 PM
> To: Krishna Yarlagadda <kyarlagadda@nvidia.com>
> Cc: gregkh@linuxfoundation.org; robh+dt@kernel.org;
> mark.rutland@arm.com; Jonathan Hunter <jonathanh@nvidia.com>; Laxman
> Dewangan <ldewangan@nvidia.com>; jslaby@suse.com; linux-
> serial@vger.kernel.org; devicetree@vger.kernel.org; linux-
> tegra@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 11/14] serial: tegra: DT for Adjusted baud rates
> 
> On Mon, Aug 12, 2019 at 04:58:20PM +0530, Krishna Yarlagadda wrote:
> > Tegra186 chip has a hardware issue resulting in frame errors when
> > tolerance level for baud rate is negative. Provided entries to adjust
> > baud rate to be within acceptable range and work with devices that can
> > send negative baud rate. Also report error when baud rate set is out
> > of tolerance range of controller updated in device tree.
> >
> > Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
> > ---
> >  .../bindings/serial/nvidia,tegra20-hsuart.txt      | 32
> ++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
> > b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
> > index 187ec78..1ce3fd4 100644
> > ---
> > a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
> > +++ b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.t
> > +++ xt
> > @@ -20,6 +20,37 @@ Required properties:
> >  Optional properties:
> >  - nvidia,enable-modem-interrupt: Enable modem interrupts. Should be
> enable
> >  		only if all 8 lines of UART controller are pinmuxed.
> > +- nvidia,adjust-baud-rates: List of entries providing percentage of
> > +baud rate
> > +  adjustment within a range.
> > +  Each entry contains sets of 3 values. Range low/high and adjusted rate.
> > +  <range_low range_high adjusted_rate>
> > +  When baud rate set on controller falls within the range mentioned
> > +in this
> > +  field, baud rate will be adjusted by percentage mentioned here.
> > +  Ex: <9600 115200 200>
> > +  Increase baud rate by 2% when set baud rate falls within range 9600
> > +to 115200
> > +
> > +Baud Rate tolerance:
> > +  Standard UART devices are expected to have tolerance for baud rate
> > +error by
> > +  -4 to +4 %. All Tegra devices till Tegra210 had this support.
> > +However,
> > +  Tegra186 chip has a known hardware issue. UART Rx baud rate
> > +tolerance level
> > +  is 0% to +4% in 1-stop config. Otherwise, the received data will
> > +have
> > +  corruption/invalid framing errors. Parker errata suggests adjusting
> > +baud
> > +  rate to be higher than the deviations observed in Tx.
> 
> The above sounds like the tolerance deviation is a characteristic of the
> Tegra186 chip. If the board design does not influence the deviation, why
> can't we encode this in the driver? Why do we need a description of this in
> device tree?
> 
> Thierry
> 
Tolerance is chip specific and info regarding this is part of chip data.
Explained it here to set context for adjusting baud rates based on slave device
as below. Slave device clock might not be accurate and if the actual clock of
slave device would end up out of tolernace range then we will see frame errors.

KY
> > +
> > +  Tx deviation of connected device can be captured over scope (or
> > + noted from  its spec) for valid range and Tegra baud rate has to be
> > + set above actual  Tx baud rate observed. To do this we use
> > + nvidia,adjust-baud-rates
> > +
> > +  As an example, consider there is deviation observed in Tx for baud
> > + rates as  listed below.
> > +  0 to 9600 has 1% deviation
> > +  9600 to 115200 2% deviation
> > +  This slight deviation is expcted and Tegra UART is expected to
> > + handle it. Due  to the issue stated above, baud rate on Tegra UART
> > + should be set equal to or  above deviation observed for avoiding frame
> errors.
> > +  Property should be set like this
> > +  nvidia,adjust-baud-rates = <0 9600 100>,
> > +  			     <9600 115200 200>;
> >
> >  Example:
> >
> > @@ -34,4 +65,5 @@ serial@70006000 {
> >  	reset-names = "serial";
> >  	dmas = <&apbdma 8>, <&apbdma 8>;
> >  	dma-names = "rx", "tx";
> > +	nvidia,adjust-baud-rates = <1000000 4000000 136>; /* 1.36% shift */
> >  };
> > --
> > 2.7.4
> >

  reply	other threads:[~2019-08-27  9:31 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-12 11:28 [PATCH 00/14] serial: tegra: Tegra186 support and fixes Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 01/14] serial: tegra: add internal loopback functionality Krishna Yarlagadda
2019-08-13  9:38   ` Thierry Reding
2019-08-12 11:28 ` [PATCH 02/14] serial: tegra: add support to ignore read Krishna Yarlagadda
2019-08-13  9:42   ` Thierry Reding
2019-08-27  9:29     ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 03/14] serial: tegra: avoid reg access when clk disabled Krishna Yarlagadda
2019-08-13  9:45   ` Thierry Reding
2019-08-27  9:29     ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 04/14] serial: tegra: protect IER against LCR.DLAB Krishna Yarlagadda
2019-08-13  9:46   ` Thierry Reding
2019-08-12 11:28 ` [PATCH 05/14] serial: tegra: flush the RX fifo on frame error Krishna Yarlagadda
2019-08-13  9:48   ` Thierry Reding
2019-08-27  9:29     ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 06/14] serial: tegra: report error to upper tty layer Krishna Yarlagadda
2019-08-13  9:52   ` Thierry Reding
2019-08-27  9:29     ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 07/14] serial: tegra: add compatible for new chips Krishna Yarlagadda
2019-08-13  9:55   ` Thierry Reding
2019-08-27  9:29     ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 08/14] serial: tegra: check for FIFO mode enabled status Krishna Yarlagadda
2019-08-13 10:03   ` Thierry Reding
2019-08-27  9:29     ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 09/14] serial: tegra: set maximum num of uart ports to 8 Krishna Yarlagadda
2019-08-13 10:19   ` Thierry Reding
2019-08-27  9:30     ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 10/14] serial: tegra: add support to use 8 bytes trigger Krishna Yarlagadda
2019-08-19 20:29   ` Jon Hunter
2019-08-27  9:31     ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 11/14] serial: tegra: DT for Adjusted baud rates Krishna Yarlagadda
2019-08-13 10:24   ` Thierry Reding
2019-08-27  9:31     ` Krishna Yarlagadda [this message]
2019-08-12 11:28 ` [PATCH 12/14] serial: tegra: add support to adjust baud rate Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 13/14] serial: tegra: report clk rate errors Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 14/14] serial: tegra: Add PIO mode support Krishna Yarlagadda

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