From: Thierry Reding <thierry.reding@gmail.com>
To: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org,
mark.rutland@arm.com, jonathanh@nvidia.com, ldewangan@nvidia.com,
jslaby@suse.com, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org,
Shardar Shariff Md <smohammed@nvidia.com>
Subject: Re: [PATCH 05/14] serial: tegra: flush the RX fifo on frame error
Date: Tue, 13 Aug 2019 11:48:32 +0200 [thread overview]
Message-ID: <20190813094832.GJ1137@ulmo> (raw)
In-Reply-To: <1565609303-27000-6-git-send-email-kyarlagadda@nvidia.com>
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On Mon, Aug 12, 2019 at 04:58:14PM +0530, Krishna Yarlagadda wrote:
> From: Shardar Shariff Md <smohammed@nvidia.com>
>
> FIFO reset/flush code implemented now does not follow programming
> guidelines. RTS line has to be turned off while flushing fifos to
> avoid new transfers. Also check LSR bits UART_LSR_TEMT and UART_LSR_DR
> to confirm fifos are flushed.
You use inconsistent spelling for FIFO here.
> Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
> Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
> ---
> drivers/tty/serial/serial-tegra.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
> index ae7225c..f6a3f4e 100644
> --- a/drivers/tty/serial/serial-tegra.c
> +++ b/drivers/tty/serial/serial-tegra.c
> @@ -266,6 +266,10 @@ static void tegra_uart_wait_sym_time(struct tegra_uart_port *tup,
> static void tegra_uart_fifo_reset(struct tegra_uart_port *tup, u8 fcr_bits)
> {
> unsigned long fcr = tup->fcr_shadow;
> + unsigned int lsr, tmout = 10000;
> +
> + if (tup->rts_active)
> + set_rts(tup, false);
>
> if (tup->cdata->allow_txfifo_reset_fifo_mode) {
> fcr |= fcr_bits & (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
> @@ -289,6 +293,17 @@ static void tegra_uart_fifo_reset(struct tegra_uart_port *tup, u8 fcr_bits)
> * to propagate, otherwise data could be lost.
> */
> tegra_uart_wait_cycle_time(tup, 32);
> +
> + do {
> + lsr = tegra_uart_read(tup, UART_LSR);
> + if (lsr | UART_LSR_TEMT)
> + if (!(lsr & UART_LSR_DR))
Can't both of these go on the same line?
Thierry
> + break;
> + udelay(1);
> + } while (--tmout);
> +
> + if (tup->rts_active)
> + set_rts(tup, true);
> }
>
> static int tegra_set_baudrate(struct tegra_uart_port *tup, unsigned int baud)
> --
> 2.7.4
>
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next prev parent reply other threads:[~2019-08-13 9:48 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-12 11:28 [PATCH 00/14] serial: tegra: Tegra186 support and fixes Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 01/14] serial: tegra: add internal loopback functionality Krishna Yarlagadda
2019-08-13 9:38 ` Thierry Reding
2019-08-12 11:28 ` [PATCH 02/14] serial: tegra: add support to ignore read Krishna Yarlagadda
2019-08-13 9:42 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 03/14] serial: tegra: avoid reg access when clk disabled Krishna Yarlagadda
2019-08-13 9:45 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 04/14] serial: tegra: protect IER against LCR.DLAB Krishna Yarlagadda
2019-08-13 9:46 ` Thierry Reding
2019-08-12 11:28 ` [PATCH 05/14] serial: tegra: flush the RX fifo on frame error Krishna Yarlagadda
2019-08-13 9:48 ` Thierry Reding [this message]
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 06/14] serial: tegra: report error to upper tty layer Krishna Yarlagadda
2019-08-13 9:52 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 07/14] serial: tegra: add compatible for new chips Krishna Yarlagadda
2019-08-13 9:55 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 08/14] serial: tegra: check for FIFO mode enabled status Krishna Yarlagadda
2019-08-13 10:03 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 09/14] serial: tegra: set maximum num of uart ports to 8 Krishna Yarlagadda
2019-08-13 10:19 ` Thierry Reding
2019-08-27 9:30 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 10/14] serial: tegra: add support to use 8 bytes trigger Krishna Yarlagadda
2019-08-19 20:29 ` Jon Hunter
2019-08-27 9:31 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 11/14] serial: tegra: DT for Adjusted baud rates Krishna Yarlagadda
2019-08-13 10:24 ` Thierry Reding
2019-08-27 9:31 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 12/14] serial: tegra: add support to adjust baud rate Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 13/14] serial: tegra: report clk rate errors Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 14/14] serial: tegra: Add PIO mode support Krishna Yarlagadda
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