From: Thierry Reding <thierry.reding@gmail.com>
To: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org,
mark.rutland@arm.com, jonathanh@nvidia.com, ldewangan@nvidia.com,
jslaby@suse.com, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org,
Shardar Shariff Md <smohammed@nvidia.com>
Subject: Re: [PATCH 06/14] serial: tegra: report error to upper tty layer
Date: Tue, 13 Aug 2019 11:52:19 +0200 [thread overview]
Message-ID: <20190813095219.GK1137@ulmo> (raw)
In-Reply-To: <1565609303-27000-7-git-send-email-kyarlagadda@nvidia.com>
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On Mon, Aug 12, 2019 at 04:58:15PM +0530, Krishna Yarlagadda wrote:
> Report overrun/parity/frame/break errors to top tty layer. Add support
> to ignore break character if IGNBRK is set.
>
> Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
> Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
> ---
> drivers/tty/serial/serial-tegra.c | 19 ++++++++++++++++---
> 1 file changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
> index f6a3f4e..7ab81bb 100644
> --- a/drivers/tty/serial/serial-tegra.c
> +++ b/drivers/tty/serial/serial-tegra.c
> @@ -374,13 +374,21 @@ static char tegra_uart_decode_rx_error(struct tegra_uart_port *tup,
> tup->uport.icount.frame++;
> dev_err(tup->uport.dev, "Got frame errors\n");
> } else if (lsr & UART_LSR_BI) {
> - dev_err(tup->uport.dev, "Got Break\n");
> - tup->uport.icount.brk++;
> - /* If FIFO read error without any data, reset Rx FIFO */
> + /*
> + * Break error
> + * If FIFO read error without any data, reset Rx FIFO
> + */
> if (!(lsr & UART_LSR_DR) && (lsr & UART_LSR_FIFOE))
> tegra_uart_fifo_reset(tup, UART_FCR_CLEAR_RCVR);
> + if (tup->uport.ignore_status_mask & UART_LSR_BI)
> + return TTY_BREAK;
> + flag = TTY_BREAK;
> + tup->uport.icount.brk++;
> + dev_err(tup->uport.dev, "Got Break\n");
I know this is preexisting, but why do we want to output an error
message in these cases. Isn't it perfectly legal for this to happen?
Thierry
> }
> + uart_insert_char(&tup->uport, lsr, UART_LSR_OE, 0, flag);
> }
> +
> return flag;
> }
>
> @@ -562,6 +570,9 @@ static void tegra_uart_handle_rx_pio(struct tegra_uart_port *tup,
> break;
>
> flag = tegra_uart_decode_rx_error(tup, lsr);
> + if (flag != TTY_NORMAL)
> + continue;
> +
> ch = (unsigned char) tegra_uart_read(tup, UART_RX);
> tup->uport.icount.rx++;
>
> @@ -1224,6 +1235,8 @@ static void tegra_uart_set_termios(struct uart_port *u,
> /* Ignore all characters if CREAD is not set */
> if ((termios->c_cflag & CREAD) == 0)
> tup->uport.ignore_status_mask |= UART_LSR_DR;
> + if (termios->c_iflag & IGNBRK)
> + tup->uport.ignore_status_mask |= UART_LSR_BI;
>
> spin_unlock_irqrestore(&u->lock, flags);
> }
> --
> 2.7.4
>
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next prev parent reply other threads:[~2019-08-13 9:52 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-12 11:28 [PATCH 00/14] serial: tegra: Tegra186 support and fixes Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 01/14] serial: tegra: add internal loopback functionality Krishna Yarlagadda
2019-08-13 9:38 ` Thierry Reding
2019-08-12 11:28 ` [PATCH 02/14] serial: tegra: add support to ignore read Krishna Yarlagadda
2019-08-13 9:42 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 03/14] serial: tegra: avoid reg access when clk disabled Krishna Yarlagadda
2019-08-13 9:45 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 04/14] serial: tegra: protect IER against LCR.DLAB Krishna Yarlagadda
2019-08-13 9:46 ` Thierry Reding
2019-08-12 11:28 ` [PATCH 05/14] serial: tegra: flush the RX fifo on frame error Krishna Yarlagadda
2019-08-13 9:48 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 06/14] serial: tegra: report error to upper tty layer Krishna Yarlagadda
2019-08-13 9:52 ` Thierry Reding [this message]
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 07/14] serial: tegra: add compatible for new chips Krishna Yarlagadda
2019-08-13 9:55 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 08/14] serial: tegra: check for FIFO mode enabled status Krishna Yarlagadda
2019-08-13 10:03 ` Thierry Reding
2019-08-27 9:29 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 09/14] serial: tegra: set maximum num of uart ports to 8 Krishna Yarlagadda
2019-08-13 10:19 ` Thierry Reding
2019-08-27 9:30 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 10/14] serial: tegra: add support to use 8 bytes trigger Krishna Yarlagadda
2019-08-19 20:29 ` Jon Hunter
2019-08-27 9:31 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 11/14] serial: tegra: DT for Adjusted baud rates Krishna Yarlagadda
2019-08-13 10:24 ` Thierry Reding
2019-08-27 9:31 ` Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 12/14] serial: tegra: add support to adjust baud rate Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 13/14] serial: tegra: report clk rate errors Krishna Yarlagadda
2019-08-12 11:28 ` [PATCH 14/14] serial: tegra: Add PIO mode support Krishna Yarlagadda
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