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From: kan.liang@linux.intel.com
To: peterz@infradead.org, mingo@kernel.org, linux-kernel@vger.kernel.org
Cc: acme@kernel.org, tglx@linutronix.de, bp@alien8.de,
	namhyung@kernel.org, jolsa@redhat.com, ak@linux.intel.com,
	yao.jin@linux.intel.com, alexander.shishkin@linux.intel.com,
	adrian.hunter@intel.com, ricardo.neri-calderon@linux.intel.com,
	Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH V6 15/25] perf/x86: Factor out x86_pmu_show_pmu_cap
Date: Mon, 12 Apr 2021 07:30:55 -0700	[thread overview]
Message-ID: <1618237865-33448-16-git-send-email-kan.liang@linux.intel.com> (raw)
In-Reply-To: <1618237865-33448-1-git-send-email-kan.liang@linux.intel.com>

From: Kan Liang <kan.liang@linux.intel.com>

The PMU capabilities are different among hybrid PMUs. Perf should dump
the PMU capabilities information for each hybrid PMU.

Factor out x86_pmu_show_pmu_cap() which shows the PMU capabilities
information. The function will be reused later when registering a
dedicated hybrid PMU.

Reviewed-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
 arch/x86/events/core.c       | 25 ++++++++++++++++---------
 arch/x86/events/perf_event.h |  3 +++
 2 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index fe811b5..bb375ab 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -1977,6 +1977,20 @@ static void _x86_pmu_read(struct perf_event *event)
 	x86_perf_event_update(event);
 }
 
+void x86_pmu_show_pmu_cap(int num_counters, int num_counters_fixed,
+			  u64 intel_ctrl)
+{
+	pr_info("... version:                %d\n",     x86_pmu.version);
+	pr_info("... bit width:              %d\n",     x86_pmu.cntval_bits);
+	pr_info("... generic registers:      %d\n",     num_counters);
+	pr_info("... value mask:             %016Lx\n", x86_pmu.cntval_mask);
+	pr_info("... max period:             %016Lx\n", x86_pmu.max_period);
+	pr_info("... fixed-purpose events:   %lu\n",
+			hweight64((((1ULL << num_counters_fixed) - 1)
+					<< INTEL_PMC_IDX_FIXED) & intel_ctrl));
+	pr_info("... event mask:             %016Lx\n", intel_ctrl);
+}
+
 static int __init init_hw_perf_events(void)
 {
 	struct x86_pmu_quirk *quirk;
@@ -2037,15 +2051,8 @@ static int __init init_hw_perf_events(void)
 
 	pmu.attr_update = x86_pmu.attr_update;
 
-	pr_info("... version:                %d\n",     x86_pmu.version);
-	pr_info("... bit width:              %d\n",     x86_pmu.cntval_bits);
-	pr_info("... generic registers:      %d\n",     x86_pmu.num_counters);
-	pr_info("... value mask:             %016Lx\n", x86_pmu.cntval_mask);
-	pr_info("... max period:             %016Lx\n", x86_pmu.max_period);
-	pr_info("... fixed-purpose events:   %lu\n",
-			hweight64((((1ULL << x86_pmu.num_counters_fixed) - 1)
-					<< INTEL_PMC_IDX_FIXED) & x86_pmu.intel_ctrl));
-	pr_info("... event mask:             %016Lx\n", x86_pmu.intel_ctrl);
+	x86_pmu_show_pmu_cap(x86_pmu.num_counters, x86_pmu.num_counters_fixed,
+			     x86_pmu.intel_ctrl);
 
 	if (!x86_pmu.read)
 		x86_pmu.read = _x86_pmu_read;
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index f04be6b..8523700 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -1093,6 +1093,9 @@ void x86_pmu_enable_event(struct perf_event *event);
 
 int x86_pmu_handle_irq(struct pt_regs *regs);
 
+void x86_pmu_show_pmu_cap(int num_counters, int num_counters_fixed,
+			  u64 intel_ctrl);
+
 extern struct event_constraint emptyconstraint;
 
 extern struct event_constraint unconstrained;
-- 
2.7.4


  parent reply	other threads:[~2021-04-12 14:39 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-12 14:30 [PATCH V6 00/25] Add Alder Lake support for perf (kernel) kan.liang
2021-04-12 14:30 ` [PATCH V6 01/25] x86/cpufeatures: Enumerate Intel Hybrid Technology feature bit kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Ricardo Neri
2021-04-12 14:30 ` [PATCH V6 02/25] x86/cpu: Add helper function to get the type of the current hybrid CPU kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Ricardo Neri
2021-04-12 14:30 ` [PATCH V6 03/25] perf/x86: Track pmu in per-CPU cpu_hw_events kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 04/25] perf/x86/intel: Hybrid PMU support for perf capabilities kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 05/25] perf/x86: Hybrid PMU support for intel_ctrl kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 06/25] perf/x86: Hybrid PMU support for counters kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 07/25] perf/x86: Hybrid PMU support for unconstrained kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 08/25] perf/x86: Hybrid PMU support for hardware cache event kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 09/25] perf/x86: Hybrid PMU support for event constraints kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 10/25] perf/x86: Hybrid PMU support for extra_regs kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 11/25] perf/x86/intel: Factor out intel_pmu_check_num_counters kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 12/25] perf/x86/intel: Factor out intel_pmu_check_event_constraints kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 13/25] perf/x86/intel: Factor out intel_pmu_check_extra_regs kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 14/25] perf/x86: Remove temporary pmu assignment in event_init kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` kan.liang [this message]
2021-04-20 10:46   ` [tip: perf/core] perf/x86: Factor out x86_pmu_show_pmu_cap tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 16/25] perf/x86: Register hybrid PMUs kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 17/25] perf/x86: Add structures for the attributes of Hybrid PMUs kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 18/25] perf/x86/intel: Add attr_update for " kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:30 ` [PATCH V6 19/25] perf/x86: Support filter_match callback kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:31 ` [PATCH V6 20/25] perf/x86/intel: Add Alder Lake Hybrid support kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:31 ` [PATCH V6 21/25] perf: Extend PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:31 ` [PATCH V6 22/25] perf/x86/intel/uncore: Add Alder Lake support kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:31 ` [PATCH V6 23/25] perf/x86/msr: Add Alder Lake CPU support kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:31 ` [PATCH V6 24/25] perf/x86/cstate: " kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-04-12 14:31 ` [PATCH V6 25/25] perf/x86/rapl: Add support for Intel Alder Lake kan.liang
2021-04-20 10:46   ` [tip: perf/core] " tip-bot2 for Zhang Rui

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